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公开(公告)号:US20240145543A1
公开(公告)日:2024-05-02
申请号:US18410063
申请日:2024-01-11
发明人: Hsin-Yi LEE , Cheng-Lung HUNG , Chi On CHUI
IPC分类号: H01L29/06 , H01L27/088 , H01L29/08 , H01L29/10 , H01L29/423 , H01L29/49 , H01L29/66 , H01L29/78 , H01L29/786
CPC分类号: H01L29/0673 , H01L27/0886 , H01L29/0843 , H01L29/1029 , H01L29/42392 , H01L29/4966 , H01L29/66439 , H01L29/66795 , H01L29/785 , H01L29/7851 , H01L29/78696
摘要: A semiconductor device includes source and drain regions, a channel region between the source and drain regions, and a gate structure over the channel region. The gate structure includes a gate dielectric over the channel region, a work function metal layer over the gate dielectric and comprising iodine, and a fill metal over the work function metal layer.
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公开(公告)号:US11973128B2
公开(公告)日:2024-04-30
申请号:US17332363
申请日:2021-05-27
发明人: Chang-Miao Liu , Wei-Lun Min
IPC分类号: H01L29/66 , H01L21/8234 , H01L29/78
CPC分类号: H01L29/6681 , H01L21/823412 , H01L21/823418 , H01L21/823431 , H01L29/66553 , H01L29/7851
摘要: A semiconductor device according to the present disclosure includes a channel member including a first connection portion, a second connection portion and a channel portion disposed between the first connection portion and the second connection portion, a first inner spacer feature disposed over and in contact with the first connection portion, a second inner spacer feature disposed under and in contact with the first connection portion, and a gate structure wrapping around the channel portion of the channel member. A shape of a cross-sectional view of the channel member includes a dog-bone shape. By providing the dog-bone shape channel member, a parasitic resistance of the semiconductor device is advantageously reduced, and performance of the semiconductor device may be significantly improved.
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公开(公告)号:US11973127B2
公开(公告)日:2024-04-30
申请号:US17089138
申请日:2020-11-04
IPC分类号: H01L29/417 , H01L21/265 , H01L21/3065 , H01L29/08 , H01L29/167 , H01L29/24 , H01L29/66 , H01L29/78
CPC分类号: H01L29/66803 , H01L21/26513 , H01L21/3065 , H01L29/0847 , H01L29/167 , H01L29/24 , H01L29/41791 , H01L29/66636 , H01L29/7851 , H01L29/7853
摘要: Semiconductor structures and method for forming the same are provide. The semiconductor structure includes a fin structure protruding from a substrate and a gate structure formed across the fin structure. The semiconductor structure further includes an Arsenic-doped region formed in the fin structure and a source/drain structure formed over the Arsenic-doped region. In addition, a bottommost portion of the Arsenic-doped region is lower than a bottommost portion of the source/drain structure.
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公开(公告)号:US11973109B2
公开(公告)日:2024-04-30
申请号:US17526840
申请日:2021-11-15
发明人: Young-Hun Kim , Jae Seok Yang , Hae Wang Lee
IPC分类号: H01L29/06 , H01L27/092 , H01L29/423 , H01L29/49 , H01L29/66 , H01L29/78 , H01L21/762
CPC分类号: H01L29/0649 , H01L27/0924 , H01L29/42376 , H01L29/4916 , H01L29/6656 , H01L29/6681 , H01L29/7851 , H01L21/76224 , H01L29/0653 , H01L29/66545
摘要: A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.
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公开(公告)号:US11967622B2
公开(公告)日:2024-04-23
申请号:US17466205
申请日:2021-09-03
发明人: Te-Chih Hsiung , Jyun-De Wu , Yi-Chen Wang , Yi-Chun Chang , Yuan-Tien Tu
IPC分类号: H01L21/8234 , H01L21/768 , H01L23/522 , H01L23/528 , H01L23/532 , H01L27/088 , H01L29/40 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/78
CPC分类号: H01L29/41791 , H01L21/76804 , H01L21/76816 , H01L21/76831 , H01L21/823418 , H01L21/823431 , H01L21/823475 , H01L23/5226 , H01L23/5283 , H01L23/53266 , H01L27/0886 , H01L29/401 , H01L29/4236 , H01L29/66795 , H01L29/7851
摘要: Embodiments provide a dielectric inter block disposed in a metallic region of a conductive line or source/drain contact. A first and second conductive structure over the metallic region may extend into the metallic region on either side of the inter block. The inter block can prevent etchant or cleaning solution from contacting an interface between the first conductive structure and the metallic region.
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公开(公告)号:US20240128376A1
公开(公告)日:2024-04-18
申请号:US18395892
申请日:2023-12-26
发明人: Shih-Chiang Chen , Wei-Yang Lee , Chia-Pin Lin , Yuan-Ching Peng
IPC分类号: H01L29/78 , H01L21/8234 , H01L27/088 , H01L29/08 , H01L29/423 , H01L29/49 , H01L29/66 , H01L29/786
CPC分类号: H01L29/7851 , H01L21/823418 , H01L21/823431 , H01L27/0886 , H01L29/0847 , H01L29/42392 , H01L29/4991 , H01L29/66795 , H01L29/78696
摘要: A device a includes a substrate, two source/drain (S/D) features over the substrate, and semiconductor layers suspended over the substrate and connecting the two S/D features. The device further includes a dielectric layer disposed between two adjacent layers of the semiconductor layers and an air gap between the dielectric layer and one of the S/D features, where a ratio between a length of the air gap to a thickness of the first dielectric layer is in a range of 0.1 to 1.0.
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公开(公告)号:US11961887B2
公开(公告)日:2024-04-16
申请号:US17993598
申请日:2022-11-23
发明人: Shu-Wen Shen
IPC分类号: H01L29/06 , H01L21/8234 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/786
CPC分类号: H01L29/0673 , H01L21/823418 , H01L21/823431 , H01L29/41791 , H01L29/42392 , H01L29/66742 , H01L29/66795 , H01L29/7851 , H01L29/78696
摘要: A semiconductor device structure is provided. The device includes a plurality of semiconductor layers and a gate electrode layer surrounding each semiconductor layer of the plurality of semiconductor layers. The gate electrode layer includes a first part, and a second part below the first part, the second part comprises a first portion, wherein an exterior surface of the first portion has a first radius of curvature, and a second portion below the first portion, and a third portion below the second portion, wherein an exterior surface of the third portion having a second radius of curvature different than the first radius of curvature.
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公开(公告)号:US11955554B2
公开(公告)日:2024-04-09
申请号:US17812997
申请日:2022-07-15
发明人: Huan-Sheng Wei , Hung-Li Chiang , Chia-Wen Liu , Yi-Ming Sheu , Zhiqiang Wu , Chung-Cheng Wu , Ying-Keung Leung
IPC分类号: H01L29/78 , H01L21/02 , H01L21/306 , H01L21/311 , H01L29/06 , H01L29/08 , H01L29/165 , H01L29/423 , H01L29/66 , H01L29/786
CPC分类号: H01L29/7851 , H01L21/02236 , H01L21/02532 , H01L21/30604 , H01L21/31111 , H01L29/0673 , H01L29/0847 , H01L29/165 , H01L29/42392 , H01L29/66545 , H01L29/66795 , H01L29/78654 , H01L29/78696 , H01L29/7848
摘要: A method of fabrication of a multi-gate semiconductor device that includes providing a fin having a plurality of a first type of epitaxial layers and a plurality of a second type of epitaxial layers. The plurality of the second type of epitaxial layers is oxidized in the source/drain region. A first portion of a first layer of the second type of epitaxial layers is removed in a channel region of the fin to form an opening between a first layer of the first type of epitaxial layer and a second layer of the first type of epitaxial layer. A portion of a gate structure is then formed in the opening.
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公开(公告)号:US11955534B2
公开(公告)日:2024-04-09
申请号:US18077142
申请日:2022-12-07
申请人: Intel Corporation
IPC分类号: H01L29/66 , H01L21/02 , H01L21/033 , H01L21/28 , H01L21/285 , H01L21/308 , H01L21/311 , H01L21/762 , H01L21/768 , H01L21/8234 , H01L21/8238 , H01L23/522 , H01L23/528 , H01L23/532 , H01L27/02 , H01L27/088 , H01L27/092 , H01L29/06 , H01L29/08 , H01L29/165 , H01L29/167 , H01L29/417 , H01L29/51 , H01L29/78 , H01L49/02 , H10B10/00 , H01L23/00
CPC分类号: H01L29/66545 , H01L21/02532 , H01L21/02636 , H01L21/0337 , H01L21/28247 , H01L21/28518 , H01L21/28568 , H01L21/3086 , H01L21/31105 , H01L21/31144 , H01L21/76224 , H01L21/76232 , H01L21/76801 , H01L21/76802 , H01L21/76816 , H01L21/76834 , H01L21/76846 , H01L21/76849 , H01L21/76877 , H01L21/76897 , H01L21/823431 , H01L21/823481 , H01L21/823807 , H01L21/823814 , H01L21/823821 , H01L21/823828 , H01L21/823842 , H01L21/823857 , H01L21/823871 , H01L21/823878 , H01L23/5226 , H01L23/528 , H01L23/5283 , H01L23/53209 , H01L23/53238 , H01L23/53266 , H01L23/5329 , H01L27/0207 , H01L27/0886 , H01L27/0922 , H01L27/0924 , H01L28/20 , H01L28/24 , H01L29/0649 , H01L29/0653 , H01L29/0847 , H01L29/165 , H01L29/167 , H01L29/41783 , H01L29/41791 , H01L29/516 , H01L29/6653 , H01L29/6656 , H01L29/66636 , H01L29/66795 , H01L29/66818 , H01L29/7843 , H01L29/7845 , H01L29/7846 , H01L29/7848 , H01L29/785 , H01L29/7851 , H01L29/7854 , H10B10/12 , H01L21/02164 , H01L21/0217 , H01L21/0332 , H01L21/76883 , H01L21/76885 , H01L21/823437 , H01L21/823475 , H01L24/16 , H01L24/32 , H01L24/73 , H01L29/665 , H01L29/7842 , H01L29/7853 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204
摘要: Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a first plurality of conductive interconnect lines in and spaced apart by a first ILD layer, wherein individual ones of the first plurality of conductive interconnect lines comprise a first conductive barrier material along sidewalls and a bottom of a first conductive fill material. A second plurality of conductive interconnect lines is in and spaced apart by a second ILD layer above the first ILD layer, wherein individual ones of the second plurality of conductive interconnect lines comprise a second conductive barrier material along sidewalls and a bottom of a second conductive fill material, wherein the second conductive fill material is different in composition from the first conductive fill material.
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公开(公告)号:US20240113221A1
公开(公告)日:2024-04-04
申请号:US18521913
申请日:2023-11-28
发明人: Chun-Hsiung TSAI , Shahaji B. MORE , Cheng-Yi PENG , Yu-Ming LIN , Kuo-Feng YU , Ziwei FANG
IPC分类号: H01L29/78 , H01L21/02 , H01L21/265 , H01L21/3065 , H01L21/8234 , H01L27/088 , H01L29/06 , H01L29/08 , H01L29/165 , H01L29/167 , H01L29/45 , H01L29/66
CPC分类号: H01L29/7848 , H01L21/02532 , H01L21/26513 , H01L21/3065 , H01L21/823418 , H01L21/823431 , H01L21/823437 , H01L27/0886 , H01L29/0649 , H01L29/0847 , H01L29/165 , H01L29/167 , H01L29/45 , H01L29/665 , H01L29/66545 , H01L29/6656 , H01L29/66636 , H01L29/66795 , H01L29/785 , H01L29/7851 , H01L21/0274
摘要: A fin field effect transistor (FinFET) device structure is provided. The FinFET device structure includes a plurality of fin structures above a substrate, an isolation structure over the substrate and between the fin structures, and a gate structure formed over the fin structure. The FinFET device structure includes a source/drain (S/D) structure over the fin structure, and the S/D structure is adjacent to the gate structure. The FinFET device structure also includes a metal silicide layer over the S/D structure, and the metal silicide layer is in contact with the isolation structure.
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