公开(公告)号：US07180183B2

公开(公告)日：2007-02-20

申请号：US10441677

申请日：2003-05-19

申请人： Ho-Yi Tsai ,  Chin-Ming Shih ,  Ying-Ren Lin

发明人： Ho-Yi Tsai ,  Chin-Ming Shih ,  Ying-Ren Lin

IPC分类号： H01L23/48

CPC分类号： H01L23/49816 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/17 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L25/18 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H05K3/3436 ,  H05K2201/094 ,  H05K2203/0465 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A semiconductor device with reinforced under-support structure and a method for fabricating the semiconductor device are provided, which can be used in the packaging of an MPBGA/TFBGA (Multi-Package Ball Grid Array & Thin Fine-pitch Ball Grid Array) module to help reinforce the TFBGA under-support structure therein. The proposed chip-packaging method is characterized by the provision of large-area solder pads at the corners of a solder-pad array used for TFBGA attaching application, in order to form solder bumps of a large cross section and volume during reflow process to help reinforce the TFBGA under-package structure. This feature can reinforce the TFBGA under-package structure without having to use flip-chip underfill technology, and without having to use extra large type solder balls and arrange pads into different pitches as in the prior art.

摘要翻译： 提供了一种具有加强的支撑下结构的半导体器件和一种制造该半导体器件的方法，可用于将MPBGA / TFBGA（多封装球栅阵列和薄型细间距球栅阵列）模块封装 有助于加强其中的TFBGA欠支撑结构。 所提出的芯片封装方法的特征在于在用于TFBGA连接应用的焊盘阵列的拐角处提供大面积焊盘，以便在回流过程中形成具有大横截面和体积的焊料凸块以帮助 加强TFBGA封装外结构。 该特征可以增强TFBGA欠包装结构，而不必使用倒装芯片底部填充技术，并且不必像现有技术那样使用额外的大型焊球和将焊盘排列成不同的间距。

公开(公告)号：US20060051954A1

公开(公告)日：2006-03-09

申请号：US11026919

申请日：2004-12-29

申请人： Ying-Ren Lin ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

发明人： Ying-Ren Lin ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/44

CPC分类号： H01L24/12 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/11902 ,  H01L2224/13018 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09845 ,  H05K2203/0723 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/013

摘要： A bump structure of a semiconductor package and a method for fabricating the same are provided. The bump structure is used to connect a semiconductor element to a carrier of the semiconductor package. The fabrication method primarily employs an electroplating process to form the bump structure including an under bump metallurgy (UBM) layer, at least one I-shaped conductive pillar, and a solder material. This allows fine-pitch electrical connection pads to be arranged in the semiconductor package, and also provides an enhanced support structure and a sufficient height between the semiconductor element and the carrier.

摘要翻译： 提供半导体封装的凸块结构及其制造方法。 凸块结构用于将半导体元件连接到半导体封装的载体。 该制造方法主要采用电镀工艺来形成凸块结构，其包括凸块下金属（UBM）层，至少一个I形导电柱和焊料材料。 这允许在半导体封装中布置细间距电连接焊盘，并且还提供增强的支撑结构和在半导体元件和载体之间的足够的高度。

公开(公告)号：US20050287713A1

公开(公告)日：2005-12-29

申请号：US11049054

申请日：2005-02-01

申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang

发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/56 ,  H01L21/60 ,  H01L23/31 ,  H01L23/433

CPC分类号： H01L21/4846 ,  H01L21/50 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/4334 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012

摘要： A method for fabricating semiconductor packages is proposed. A plurality of substrates are prepared each having a chip thereon. Length and width of each substrate are equal to predetermined length and width of the semiconductor package. A carrier having a plurality of openings is prepared. A protruded portion is formed at each corner of each opening, wherein a distance between two diagonal protruded portions is slightly larger than that between two diagonal corners of the substrate. The substrates are fixed in the openings of the carrier by means of the protruded portions, and gaps between the substrates and the carrier are sealed. An encapsulant is formed over each opening to encapsulate the corresponding chip by a molding process. An area on the carrier covered by the encapsulant is larger in length and width than the opening. A plurality of the semiconductor packages are formed after performing mold-releasing and singulation processes.

摘要翻译： 提出了制造半导体封装的方法。 准备了各自具有芯片的多个基板。 每个基片的长度和宽度等于半导体封装的预定长度和宽度。 制备具有多个开口的载体。 在每个开口的每个角部处形成突出部分，其中两个对角线突出部分之间的距离略大于基板的两个对角线之间的距离。 基板通过突出部固定在载体的开口中，基板和载体之间的间隙被密封。 在每个开口上形成密封剂，以通过模制工艺封装相应的芯片。 由密封剂覆盖的载体上的区域的长度和宽度大于开口的宽度。 在进行脱模和切割处理之后形成多个半导体封装。

公开(公告)号：US07348211B2

公开(公告)日：2008-03-25

申请号：US11117158

申请日：2005-04-27

申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/50 ,  H01L21/48 ,  H01L21/44

CPC分类号： H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for fabricating semiconductor packages is proposed. A plurality of substrates each having a chip thereon are prepared. Each substrate has similar length and width to the predetermined length and width of the semiconductor package. A carrier having a plurality of openings is prepared. Each opening is larger in length and width than the substrate. The substrates are positioned in the corresponding openings, and gaps between the substrates and the carrier are sealed. A molding process is performed to form an encapsulant over each opening to encapsulate the chip. An area on the carrier covered by the encapsulant is larger in length and width than the opening. After performing a mold-releasing process, a plurality of the semiconductor packages are formed by a singulation process to cut along substantially edges of each substrate according to the predetermined size of the semiconductor package. A waste of substrate material is avoided.

摘要翻译： 提出了制造半导体封装的方法。 制备各自具有芯片的多个基板。 每个衬底具有与半导体封装的预定长度和宽度相似的长度和宽度。 制备具有多个开口的载体。 每个开口的长度和宽度大于衬底。 基板定位在相应的开口中，基板和载体之间的间隙被密封。 执行成型工艺以在每个开口上形成密封剂以封装芯片。 由密封剂覆盖的载体上的区域的长度和宽度大于开口的宽度。 在执行脱模工艺之后，通过单片化工艺形成多个半导体封装，以根据半导体封装的预定尺寸沿着每个衬底的大致边缘切割。 避免了衬底材料的浪费。

公开(公告)号：US20050287707A1

公开(公告)日：2005-12-29

申请号：US11117158

申请日：2005-04-27

申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/56 ,  H01L21/68 ,  H01L23/31

CPC分类号： H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for fabricating semiconductor packages is proposed. A plurality of substrates each having a chip thereon are prepared. Each substrate has similar length and width to the predetermined length and width of the semiconductor package. A carrier having a plurality of openings is prepared. Each opening is larger in length and width than the substrate. The substrates are positioned in the corresponding openings, and gaps between the substrates and the carrier are sealed. A molding process is performed to form an encapsulant over each opening to encapsulate the chip. An area on the carrier covered by the encapsulant is larger in length and width than the opening. After performing a mold-releasing process, a plurality of the semiconductor packages are formed by a singulation process to cut along substantially edges of each substrate according to the predetermined size of the semiconductor package. A waste of substrate material is avoided.

摘要翻译： 提出了制造半导体封装的方法。 制备各自具有芯片的多个基板。 每个衬底具有与半导体封装的预定长度和宽度相似的长度和宽度。 制备具有多个开口的载体。 每个开口的长度和宽度大于衬底。 基板定位在相应的开口中，基板和载体之间的间隙被密封。 执行成型工艺以在每个开口上形成密封剂以封装芯片。 由密封剂覆盖的载体上的区域的长度和宽度大于开口的宽度。 在执行脱模工艺之后，通过单片化工艺形成多个半导体封装，以根据半导体封装的预定尺寸沿着每个衬底的大致边缘切割。 避免了衬底材料的浪费。

公开(公告)号：US07173828B2

公开(公告)日：2007-02-06

申请号：US10674317

申请日：2003-09-29

申请人： Ying-Ren Lin ,  Chih-Ming Huang ,  Ho-Yi Tsai

发明人： Ying-Ren Lin ,  Chih-Ming Huang ,  Ho-Yi Tsai

IPC分类号： H05K1/11

CPC分类号： H05K1/111 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/17 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16106 ,  H01L2224/16237 ,  H01L2224/17051 ,  H01L2224/17106 ,  H01L2924/01087 ,  H01L2924/15311 ,  H05K3/284 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/093 ,  H05K2201/09381 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2224/17104 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A ground pad structure for preventing solder extrusion and a semiconductor package having the ground pad structure are disclosed, wherein the ground pad structure has the ground pads located along the circumference of its ground plane be formed in a non-solder mask defined manner. Accordingly, a good grounding quality is maintained, and the occurrence of the electrical bridging among the adjacent conductive traces can be avoided as the extrusion of the molten solder bumps from the ground pads located along the ground pad structure's circumference toward their adjacent conductive traces is effectively prevented.

摘要翻译： 公开了一种用于防止焊料挤出的接地焊盘结构和具有接地焊盘结构的半导体封装，其中接地焊盘结构具有沿其接地平面的圆周定位的接地焊盘以非阻焊掩模定义的方式形成。 因此，保持良好的接地质量，并且可以避免相邻导电迹线之间的电桥接的发生，因为熔融焊料凸块从沿着接地焊盘结构的圆周朝向其相邻导电迹线的接地焊盘的挤出是有效的 防止了

公开(公告)号：US07129119B2

公开(公告)日：2006-10-31

申请号：US11049054

申请日：2005-02-01

申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang

发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang

IPC分类号： H01L21/50

CPC分类号： H01L21/4846 ,  H01L21/50 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/4334 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012

摘要： A method for fabricating semiconductor packages is proposed. A plurality of substrates are prepared each having a chip thereon. Length and width of each substrate are equal to predetermined length and width of the semiconductor package. A carrier having a plurality of openings is prepared. A protruded portion is formed at each corner of each opening, wherein a distance between two diagonal protruded portions is slightly larger than that between two diagonal corners of the substrate. The substrates are fixed in the openings of the carrier by means of the protruded portions, and gaps between the substrates and the carrier are sealed. An encapsulant is formed over each opening to encapsulate the corresponding chip by a molding process. An area on the carrier covered by the encapsulant is larger in length and width than the opening. A plurality of the semiconductor packages are formed after performing mold-releasing and singulation processes.

摘要翻译： 提出了制造半导体封装的方法。 准备了各自具有芯片的多个基板。 每个基片的长度和宽度等于半导体封装的预定长度和宽度。 制备具有多个开口的载体。 在每个开口的每个角部处形成突出部分，其中两个对角线突出部分之间的距离略大于基板的两个对角线之间的距离。 基板通过突出部固定在载体的开口中，基板和载体之间的间隙被密封。 在每个开口上形成密封剂，以通过模制工艺封装相应的芯片。 由密封剂覆盖的载体上的区域的长度和宽度大于开口的宽度。 在进行脱模和切割处理之后形成多个半导体封装。

公开(公告)号：US20050023704A1

公开(公告)日：2005-02-03

申请号：US10674317

申请日：2003-09-29

申请人： Ying-Ren Lin ,  Chih-Ming Huang ,  Ho-Yi Tsai

发明人： Ying-Ren Lin ,  Chih-Ming Huang ,  Ho-Yi Tsai

IPC分类号： H01L23/498 ,  H01L23/50 ,  H05K1/11 ,  H05K3/28 ,  H05K3/34 ,  H05K7/14 ,  H01L23/48

CPC分类号： H05K1/111 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/17 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16106 ,  H01L2224/16237 ,  H01L2224/17051 ,  H01L2224/17106 ,  H01L2924/01087 ,  H01L2924/15311 ,  H05K3/284 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/093 ,  H05K2201/09381 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2224/17104 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A ground pad structure for preventing solder extrusion and a semiconductor package having the ground pad structure are disclosed, wherein the ground pad structure has the ground pads located along the circumference of its ground plane be formed in a non-solder mask defined manner. Accordingly, a good grounding quality is maintained, and the occurrence of the electrical bridging among the adjacent conductive traces can be avoided as the extrusion of the molten solder bumps from the ground pads located along the ground pad structure's circumference toward their adjacent conductive traces is effectively prevented.

摘要翻译： 公开了一种用于防止焊料挤出的接地焊盘结构和具有接地焊盘结构的半导体封装，其中接地焊盘结构具有沿其接地平面的圆周定位的接地焊盘以非阻焊掩模定义的方式形成。 因此，保持良好的接地质量，并且可以避免相邻导电迹线之间的电桥接的发生，因为熔融焊料凸块从沿着接地焊盘结构的圆周朝向其相邻导电迹线的接地焊盘的挤出是有效的 防止了

公开(公告)号：US07271483B2

公开(公告)日：2007-09-18

申请号：US11026919

申请日：2004-12-29

申请人： Ying-Ren Lin ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

发明人： Ying-Ren Lin ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L23/40

CPC分类号： H01L24/12 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/11902 ,  H01L2224/13018 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09845 ,  H05K2203/0723 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/013

摘要： A bump structure of a semiconductor package and a method for fabricating the same are provided. The bump structure is used to connect a semiconductor element to a carrier of the semiconductor package. The fabrication method primarily employs an electroplating process to form the bump structure including an under bump metallurgy (UBM) layer, at least one I-shaped conductive pillar, and a solder material. This allows fine-pitch electrical connection pads to be arranged in the semiconductor package, and also provides an enhanced support structure and a sufficient height between the semiconductor element and the carrier.

摘要翻译： 提供半导体封装的凸块结构及其制造方法。 凸块结构用于将半导体元件连接到半导体封装的载体。 该制造方法主要采用电镀工艺来形成凸块结构，其包括凸块下金属（UBM）层，至少一个I形导电柱和焊料材料。 这允许在半导体封装中布置细间距电连接焊盘，并且还提供增强的支撑结构和在半导体元件和载体之间的足够的高度。

公开(公告)号：US20070141761A1

公开(公告)日：2007-06-21

申请号：US11703517

申请日：2007-02-06

申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/00

CPC分类号： H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for fabricating semiconductor packages includes the steps of: providing a plurality of substrates and a carrier having a plurality of openings, wherein, each of the substrates has at least one chip (die) disposed thereon, length and width of the substrates are approximately equal to the predefined length and width of semiconductor packages, and length and width of the openings of the carrier are bigger than length and width of the substrates; respectively positioning the substrates in the openings of the carrier and blocking the gaps between the substrates and the carrier so as to prevent the gaps from penetrating through the carrier; performing a mold press process so as to form an encapsulant on each of the openings for encapsulating the chip, wherein length and width of the area covered by the encapsulant are bigger than length and width of the opening; performing a mold releasing process; and cutting along edges of the substrates according to the predefined length and width of semiconductor packages, thereby obtaining a plurality of semiconductor packages. The present invention also discloses a structure and method for positioning the substrates.

摘要翻译： 一种制造半导体封装的方法包括以下步骤：提供多个基板和具有多个开口的载体，其中每个基板具有设置在其上的至少一个芯片（芯片），基板的长度和宽度大致为 等于半导体封装的预定长度和宽度，载体的开口的长度和宽度大于基板的长度和宽度; 分别将基板定位在载体的开口中并阻挡基板和载体之间的间隙，以防止间隙穿透载体; 进行模压加工，以在封装芯片的每个开口上形成密封剂，其中由密封剂覆盖的区域的长度和宽度大于开口的长度和宽度; 执行脱模工艺; 并且根据半导体封装的预定长度和宽度切割基板的边缘，从而获得多个半导体封装。 本发明还公开了一种用于定位基板的结构和方法。