公开(公告)号：US5041700A

公开(公告)日：1991-08-20

申请号：US588928

申请日：1990-09-27

申请人： Kiyoshi Iyogi ,  Takaaki Yasumoto ,  Toshirou Yanazawa ,  Nobuo Iwase

发明人： Kiyoshi Iyogi ,  Takaaki Yasumoto ,  Toshirou Yanazawa ,  Nobuo Iwase

IPC分类号： C04B37/02 ,  C04B41/52 ,  C04B41/89 ,  H01L23/15 ,  H01L23/498 ,  H05K1/03 ,  H05K3/38

CPC分类号： C04B41/009 ,  C04B41/52 ,  C04B41/89 ,  H01L23/15 ,  H01L23/49866 ,  H01L2924/0002 ,  H01L2924/15312 ,  H05K1/0306 ,  H05K3/38

摘要： A circuit board includes an aluminum nitride substrate, and a circuit pattern formed on the substrate and having a multilayered structure in which a metal oxynitride layer represented by formula Al.sub.u Ml.sub.v M2.sub.x O.sub.y N.sub.z (wherein M1 represents a metal selected from the group consisting of Ti, Cr, Ta, and Zr, M2 represents a metal selected from the group consisting of Ni, Pt, Pd, W, Nb, and Mo, u represents 3 to 50 atm %, v represents 3 to 78 atm %, x represents 0 to 50 atm %, y represents 0.005 to 25 atm %, and z represents 5 to 70 atm %), a bonding layer consisting essentially of a metal represented by M1, a barrier layer consisting essentially of a metal represented by M2, and a conductor layer consisting essentially of Au are stacked in the order named.

摘要翻译： 电路板包括氮化铝衬底和形成在衬底上并具有多层结构的电路图案，其中由式AluMlvM2xOyNz表示的金属氧氮化物层（其中M1表示选自Ti，Cr，Ta， Zr，M2表示选自Ni，Pt，Pd，W，Nb和Mo的金属，u表示3〜50atm％，v表示3〜78atm％，x表示0〜50atm％ y表示0.005〜25atm％，z表示5〜70atm％），基本上由M1表示的金属构成的接合层，基本上由M2表示的金属构成的阻挡层和基本上由Au构成的导体层 按照命名的顺序堆叠。

公开(公告)号：US4924033A

公开(公告)日：1990-05-08

申请号：US318331

申请日：1989-03-03

申请人： Kiyoshi Iyogi ,  Masako Nakahashi ,  Hiromitsu Takeda ,  Makoto Shirokane

发明人： Kiyoshi Iyogi ,  Masako Nakahashi ,  Hiromitsu Takeda ,  Makoto Shirokane

IPC分类号： B23K35/02 ,  B23K35/14 ,  B23K35/30 ,  C04B37/02 ,  H01L21/48

CPC分类号： B23K35/3006 ,  B23K35/025 ,  B23K35/302 ,  C04B37/026 ,  H01L21/4853 ,  C04B2237/123 ,  C04B2237/124 ,  C04B2237/125 ,  C04B2237/127 ,  C04B2237/366 ,  C04B2237/40 ,  C04B2237/568 ,  C04B2237/62 ,  C04B2237/72 ,  C04B2237/76 ,  C04B2237/80 ,  Y10T29/49149

摘要： According to the present invention, there is provided an electronic component part comprising (i) a high thermal conductivity ceramic circuit board, (ii) terminal pins located over said circuit board, and (iii) a metal brazing material having metal brazing powder, at least one element selected from the Group IVa elements and a metal having a melting point higher than that of the metal brazing powder, the metal brazing material bonding said board and said pins. According to the present invention, metal, such as input/output terminal pins can very firmly be bonded to ceramic, such as a circuit board, within an atmosphere of, for example, N.sub.2 gas without the scattering of any brazing material in which case, unlike the prior art method, vacuum furnace is not employed.

公开(公告)号：US4659611A

公开(公告)日：1987-04-21

申请号：US706280

申请日：1985-02-27

申请人： Nobuo Iwase ,  Kazuo Anzai ,  Kazuo Shinozaki ,  Akihiko Tsuge ,  Kazutaka Saitoh ,  Kiyoshi Iyogi ,  Noboru Sato ,  Mitsuo Kasori

发明人： Nobuo Iwase ,  Kazuo Anzai ,  Kazuo Shinozaki ,  Akihiko Tsuge ,  Kazutaka Saitoh ,  Kiyoshi Iyogi ,  Noboru Sato ,  Mitsuo Kasori

IPC分类号： C04B41/51 ,  C04B41/52 ,  C04B41/88 ,  C04B41/89 ,  H01L23/15 ,  H01L23/373 ,  H05K1/03 ,  C04B35/52 ,  B32B5/16 ,  B32B15/04 ,  C04B35/58

CPC分类号： C04B41/009 ,  C04B41/5111 ,  C04B41/52 ,  C04B41/88 ,  C04B41/89 ,  H01L23/15 ,  H01L23/3731 ,  C04B2111/00844 ,  H01L2924/0002 ,  H05K1/0306 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/24926

摘要： A high thermal conductivity circuit substrate is provided comprising a sintered aluminum nitride ceramic substrate consisting essentially of one member selected from the group of yttrium, the rare earth metals and the alkali earth metals and an electrically conductive thick film paste for a conductive layer formed on the substrate.

摘要翻译： 提供了一种高导热性电路基板，其包括基本上由选自钇，稀土金属和碱土金属的一种元素组成的烧结氮化铝陶瓷基板，以及形成在导电层上的导电厚膜糊 基质。

公开(公告)号：US5907187A

公开(公告)日：1999-05-25

申请号：US502587

申请日：1995-07-14

申请人： Kaoru Koiwa ,  Koji Yamakawa ,  Kiyoshi Iyogi ,  Takaaki Yasumoto ,  Nobuo Iwase

发明人： Kaoru Koiwa ,  Koji Yamakawa ,  Kiyoshi Iyogi ,  Takaaki Yasumoto ,  Nobuo Iwase

IPC分类号： H01L23/498 ,  H05K3/34 ,  H01L23/48 ,  H01L23/06 ,  H01L23/52 ,  H01L29/40

CPC分类号： H05K3/3436 ,  H01L23/49816 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K2201/094 ,  H05K2201/10992 ,  H05K2203/041 ,  H05K3/3463 ,  H05K3/3484 ,  Y02P70/613

摘要： In such electronic components as semiconductor packages and semiconductor chips which are possessed of groups of connecting bumps as input and output terminals, the groups of connecting bumps comprise not less than two kinds of connecting bumps different in melting point or not less than two kinds of connecting bumps different in mechanical strength. The groups of connecting bumps comprise connecting bumps made of high temperature solder or connecting bumps made of a high strength In type solder in the part of formation thereof. The connecting bumps made of high temperature solder are not directly affected by the influence of displacement because they retain the shape of a ball even after the step of connection such as solder reflow. The connecting bumps made of In type solder form connecting parts of high strength. These groups of connecting bumps contribute to exalt the reliability of the connecting parts without decreasing the number of input and output terminals.

摘要翻译： 在具有作为输入和输出端子的连接凸块组的半导体封装和半导体芯片的这种电子部件中，连接凸块组包括不少于两种不同熔点的连接凸块或不少于两种连接 不同的机械强度凸起。 连接凸块的组包括在其形成部分中由高温焊料或由高强度In型焊料制成的连接凸块形成的连接凸块。 由高温焊料制成的连接凸块不受位移影响的直接影响，因为即使在诸如焊料回流的连接步骤之后，它们保持了球的形状。 由In型焊料形成的连接凸块形成高强度的连接部件。 这些连接凸块组有助于提高连接部件的可靠性，而不会减少输入和输出端子的数量。

公开(公告)号：US5326623A

公开(公告)日：1994-07-05

申请号：US10298

申请日：1993-01-28

申请人： Koji Yamakawa ,  Kaoru Koiwa ,  Takaaki Yasumoto ,  Kiyoshi Iyogi ,  Nobuo Iwase

发明人： Koji Yamakawa ,  Kaoru Koiwa ,  Takaaki Yasumoto ,  Kiyoshi Iyogi ,  Nobuo Iwase

IPC分类号： C04B37/02 ,  H01L23/12 ,  H01L23/15 ,  H01L23/498 ,  H01L23/538 ,  H05K1/09 ,  H05K3/24 ,  B32B9/00

CPC分类号： H01L23/538 ,  H01L23/49866 ,  H01L2924/0002 ,  H01L2924/09701 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/24926

摘要： A circuit board including a circuit pattern adhered firmly to a ceramic substrate and capable of eliminating an increase in resistivity due to an influence of an external environment, particularly, a thermal influence is disclosed. The circuit board comprises a ceramic substrate, and a circuit pattern formed on the substrate and having a multilayered structure in which a bonding layer comprising Ti and at least one element selected from the group consisting of N and O, a conductor layer consisting essentially of Cu, and a protective layer comprising Ti and at least one element selected from the group consisting of N and O are stacked in the order named.

摘要翻译： 公开了一种电路板，其包括牢固地粘附在陶瓷基板上的电路图形，能够消除由外部环境的影响引起的电阻率的增加，特别是热影响。 电路板包括陶瓷基板和形成在基板上并具有多层结构的电路图案，其中包含Ti和至少一种选自N和O的元素的接合层，基本上由Cu组成的导体层 ，并且以所述顺序堆叠包含Ti和从N和O组成的组中选择的至少一种元素的保护层。

公开(公告)号：US4919731A

公开(公告)日：1990-04-24

申请号：US308450

申请日：1989-02-10

申请人： Kiyoshi Iyogi ,  Takaaki Yasumoto ,  Toshirou Yanazawa ,  Nobuo Iwase ,  Masako Nakahashi ,  Hiromitsu Takeda

发明人： Kiyoshi Iyogi ,  Takaaki Yasumoto ,  Toshirou Yanazawa ,  Nobuo Iwase ,  Masako Nakahashi ,  Hiromitsu Takeda

IPC分类号： H01R43/02 ,  B23K35/363 ,  H01L21/48 ,  H01L23/498 ,  H01L23/538 ,  H05K3/46

CPC分类号： H01L23/49827 ,  H01L21/4853 ,  H01L2924/00013 ,  H01L2924/0002 ,  Y10T29/49149

摘要： The present invention provides an electronic component part with terminal pins very closely and very strongly bonded to a high thermal conductivity ceramics circuit board and a method for simply and continuously manufacturing electronic component parts, with a high operability, each with terminal pins bonded to a high thermal conductivity ceramics circuit board. According to the present invention, an electronic component part is provided in which terminal pins are bonded to a high thermal conductivity ceramics circuit board by a brazing metal, containing at least one kind of Group IVa elements. In another aspect of the present invention a method is provided for manufacturing electronic component parts, which comprises the step of attaching terminal pins to a high thermal conductivity ceramics circuit board by a brazing paste layer comprised of brazing metal powder containing at least one kind of Group IVa elements, an acrylic binder with a carboxylic group as a substituent group and organic solvent, and heating the resultant structure in an atmosphere containing nitrogen as a principal element so that terminal pins are firmly bonded to a circuit board.

公开(公告)号：US06426154B1

公开(公告)日：2002-07-30

申请号：US09668747

申请日：2000-09-25

申请人： Takayuki Naba ,  Hiroshi Komorita ,  Noritaka Nakayama ,  Kiyoshi Iyogi

发明人： Takayuki Naba ,  Hiroshi Komorita ,  Noritaka Nakayama ,  Kiyoshi Iyogi

IPC分类号： B32B704

CPC分类号： H05K1/0271 ,  C04B37/026 ,  C04B2235/786 ,  C04B2237/12 ,  C04B2237/121 ,  C04B2237/123 ,  C04B2237/127 ,  C04B2237/128 ,  C04B2237/343 ,  C04B2237/366 ,  C04B2237/368 ,  C04B2237/402 ,  C04B2237/403 ,  C04B2237/405 ,  C04B2237/407 ,  C04B2237/408 ,  C04B2237/64 ,  C04B2237/704 ,  C04B2237/708 ,  C04B2237/72 ,  H01L23/13 ,  H01L23/3735 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K1/09 ,  H05K3/38 ,  H05K3/4629 ,  H05K2201/0355 ,  H05K2201/0969 ,  H05K2201/09745 ,  Y10T428/12028 ,  Y10T428/12069 ,  Y10T428/12201 ,  Y10T428/12396 ,  Y10T428/12528 ,  Y10T428/12576 ,  Y10T428/1259 ,  H01L2924/00

摘要： The present invention provides a ceramic circuit board comprising: a ceramic substrate and a metal circuit plate bonded to the ceramic substrate through a brazing material layer; wherein the brazing material layer is composed of Al—Si group brazing material and an amount of Si contained in the brazing material is 7 wt % or less. In addition, it is preferable to form a thinned portion, holes, or grooves to outer peripheral portion of the metal circuit plate. According to the above structure of the present invention, there can be provided a ceramic circuit board having both high bonding strength and high heat-cycle resistance, and capable of increasing an operating reliability as electronic device.

摘要翻译： 本发明提供一种陶瓷电路板，包括：陶瓷基板和金属电路板，通过钎料层与陶瓷基板接合; 其特征在于，所述钎焊材料层由Al-Si基钎焊材料构成，所述钎料中含有的Si的量为7重量％以下。 此外，优选在金属电路板的外周部形成薄壁部，孔或槽。 根据本发明的上述结构，可以提供一种具有高接合强度和高耐热循环性的陶瓷电路板，能够提高作为电子设备的操作可靠性。

公开(公告)号：US5736790A

公开(公告)日：1998-04-07

申请号：US710769

申请日：1996-09-20

申请人： Kiyoshi Iyogi ,  Kaoru Koiwa ,  Keiichi Yano ,  Hironori Asai

发明人： Kiyoshi Iyogi ,  Kaoru Koiwa ,  Keiichi Yano ,  Hironori Asai

IPC分类号： H01L23/485 ,  H05K1/11 ,  H05K3/34 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/10 ,  H01L24/13 ,  H05K1/111 ,  H05K3/3436 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/181 ,  H05K2201/0212 ,  H05K2201/0367 ,  H05K2201/09736 ,  H05K2201/09745 ,  H05K2201/10234 ,  H05K2201/10992 ,  H05K2203/041 ,  Y02P70/611 ,  Y02P70/613

摘要： Disclosed is a bump formed on a pad which is provided on either a semiconductor chip or a package or a wiring substrate for input or output thereof, for making electric connection on the pad. The bump has: a projection projecting from the pad; a ball having conductivity and located above the pad; and a conductive bonding material for bonding the pad for and the ball, wherein creep strength of the ball is larger than strength of the conductive bonding material. With another conductive bonding material provided on the other pad of a wiring substrate or a package, the ball of the bump of the semiconductor chip or the package is placed close to another pad of the wiring substrate or package. The conductive bonding material of the other pad is heated and melted to connect the ball and the other pad of the wiring substrate or package by the conductive bonding material.

摘要翻译： 公开了一种形成在焊盘上的凸块，其设置在半导体芯片或封装或其输入或输出的布线基板上，用于在焊盘上进行电连接。 凸起具有：从该垫突出的突起; 具有导电性并位于垫上方的球; 以及用于接合焊盘和球的导电接合材料，其中球的蠕变强度大于导电接合材料的强度。 通过设置在布线基板或封装的另一个焊盘上的另一个导电接合材料，将半导体芯片或封装的凸块的球放置成靠近布线基板或封装的另一个焊盘。 另一个焊盘的导电接合材料被加热熔化，以通过导电接合材料将接线衬底或封装的球和另一焊盘连接起来。

公开(公告)号：US5019187A

公开(公告)日：1991-05-28

申请号：US489532

申请日：1990-03-07

申请人： Kiyoshi Iyogi ,  Masako Nakahashi ,  Hiromitsu Takeda ,  Makoto Shirokane

发明人： Kiyoshi Iyogi ,  Masako Nakahashi ,  Hiromitsu Takeda ,  Makoto Shirokane

IPC分类号： B23K35/02 ,  B23K35/14 ,  B23K35/30 ,  C04B37/02 ,  H01L21/48

CPC分类号： B23K35/3006 ,  B23K35/025 ,  B23K35/302 ,  C04B37/026 ,  H01L21/4853 ,  C04B2237/123 ,  C04B2237/124 ,  C04B2237/125 ,  C04B2237/127 ,  C04B2237/366 ,  C04B2237/40 ,  C04B2237/568 ,  C04B2237/62 ,  C04B2237/72 ,  C04B2237/76 ,  C04B2237/80 ,  Y10T29/49149

摘要： According to the present invention, there is provided an electronic component part comprising (i) a high thermal conductivity ceramic circuit board, (ii) terminal pins located over said circuit board, and (iii) a metal brazing material having metal brazing powder, at least one element selected from the Group IVa elements and a metal having a melting point higher than that of the metal brazing powder, the metal brazing material bonding said board and said pins. According to the present invention, metal, such as input/output terminal pins can very firmly be bonded to ceramic, such as a circuit board, within an atmosphere of, for example, N.sub.2 gas without the scattering of any brazing material in which case, unlike the prior art method, any vacuum furnace is not employed.

公开(公告)号：US5714801A

公开(公告)日：1998-02-03

申请号：US624081

申请日：1996-03-29

申请人： Keiichi Yano ,  Jun-ichi Kudo ,  Koji Yamakawa ,  Kiyoshi Iyogi

发明人： Keiichi Yano ,  Jun-ichi Kudo ,  Koji Yamakawa ,  Kiyoshi Iyogi

IPC分类号： H01L23/498 ,  H01L23/52

CPC分类号： H01L23/49822 ,  H01L23/49838 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/15312 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/3011

摘要： A semiconductor package is disclosed which is provided with a multilayer ceramic substrate such as, for example, a multilayer aluminum nitride substrate having a surface for mounting a semiconductor device and, at the same time, having an inner wiring layer electrically connected to the semiconductor device. On the surface of the multilayer ceramic substrate for forming terminals thereon, input and output terminals such as, for example, pin terminals and bump terminals electrically connected to the inner wiring layer. The input and output terminals embrace signal terminals, ground terminals, and power source terminals. The signal terminals among other terminals are so disposed that they may be each positioned adjacently to at least one ground terminal or power source terminal. This semiconductor package possesses perfect transmission properties even for signals of such a high frequency as exceeds the order of GHz. The dispersion of the transmission properties is small.

摘要翻译： 公开了一种半导体封装，其具有多层陶瓷衬底，例如具有用于安装半导体器件的表面的多层氮化铝衬底，并且同时具有与半导体器件电连接的内部布线层 。 在用于在其上形成端子的多层陶瓷基板的表面上，诸如引脚端子和凸起端子的输入和输出端子电连接到内部布线层。 输入和输出端子包括信号端子，接地端子和电源端子。 其他端子之间的信号端子被布置成使得它们可以各自邻近于至少一个接地端子或电源端子。 该半导体封装即使对于超过GHz数量级的高频的信号也具有完美的传输特性。 透射性能的分散性很小。