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    Method of making a substrate having selectively releasing conductive runners
    2.
    发明授权
    Method of making a substrate having selectively releasing conductive runners 失效
    制造具有选择性释放导电流道的基板的方法

    公开(公告)号：US5338391A

    公开(公告)日：1994-08-16

    申请号：US134447

    申请日：1993-10-12

    申请人： Anthony B. Suppelsa ,  William B. Mullen, III ,  Glenn F. Urbish

    发明人： Anthony B. Suppelsa ,  William B. Mullen, III ,  Glenn F. Urbish

    IPC分类号： C23C14/02 ,  H01L21/48 ,  H01L21/60 ,  H05K3/38 ,  H05K3/40 ,  B44C1/22 ,  C23F1/00

    CPC分类号： H01L24/81 ,  C23C14/025 ,  H01L21/4846 ,  H05K3/4092 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/351 ,  H05K3/388

    摘要： A selectively releasing runner and substrate assembly (10) comprises a plurality of conductive runners (16) adhered to a substrate (12). A portion (18) of at least some of the conductive runners have a lower adhesion to the substrate for selectively releasing the conductive runner from the substrate when subjected to thermal stress. The selectively releasing runner and substrate assembly is made by selectively depositing an adhesion layer (14) of a first metal to portions of the surface of the substrate where maximum adhesion is desired. The other portions of the substrate are not covered with the first metal. The first metal layer and the uncovered portions of the substrate surface are covered with a second metal layer (16). The adhesion of the second metal layer to the substrate is less than the adhesion of the second metal layer to the first metal layer, and less than the adhesion of the first metal layer tot he substrate. The second metal layer may be copper. Additionally, an electronic component (22), such as an integrated circuit, may be attached to the selectively releasing metal portion.

    摘要翻译： 选择性释放流道和基底组件（10）包括粘附到基底（12）的多个导电流道（16）。 至少一些导电流道的一部分（18）对基底具有较低的粘合力，用于当受到热应力时从基底中选择性地释放导电流道。 通过选择性地将第一金属的粘合层（14）沉积到需要最大粘合力的基底表面的部分上来制备选择性释放流道和基底组件。 基板的其它部分不被第一金属覆盖。 衬底表面的第一金属层和未覆盖部分被第二金属层（16）覆盖。 第二金属层对基板的粘合力小于第二金属层与第一金属层的密合性，小于第一金属层与基板的粘合性。 第二金属层可以是铜。 此外，诸如集成电路的电子部件（22）可以附接到选择性释放金属部分。

    Selective bonding interconnection mask
    4.
    发明授权
    Selective bonding interconnection mask 失效
    选择性粘接互连面罩

    公开(公告)号：US4626309A

    公开(公告)日：1986-12-02

    申请号：US627127

    申请日：1984-07-02

    申请人： William B. Mullen, III ,  James H. Grotelueschen ,  Robert Henschel

    发明人： William B. Mullen, III ,  James H. Grotelueschen ,  Robert Henschel

    IPC分类号： C09J5/00 ,  H05K1/02 ,  H05K1/03 ,  H05K3/00 ,  H05K3/28 ,  H05K3/32 ,  B32B31/04 ,  B32B31/12

    CPC分类号： H05K3/0061 ,  C09J5/00 ,  H05K1/0271 ,  H05K1/0306 ,  H05K2201/0999 ,  H05K2203/0191 ,  H05K3/281 ,  H05K3/321 ,  Y10T29/49126 ,  Y10T428/24289 ,  Y10T428/24331

    摘要： An interconnection mask which is sandwiched between two members to be bonded together is comprised of a thin sheet of preselected material which has a plurality of apertures therein which are positioned, sized, and shaped to define the common bonding areas between the two members whereby structural failures induced by bonding and loading characteristics of the two members are minimized. A method for making an apparatus which utilizes the interconnection mask comprises the steps of preparing a mask of preselected material having a plurality of apertures therein, each aperture being positioned, sized and shaped to define a common bonding area between first and second members of the apparatus whereby the structural failures induced by the bonding and loading characteristics of the two members are minimized; placing a layer of bonding material on a surface of the first member; placing the interconnection mask over the layer of bonding material; placing the second member over the mask; bonding the first and second members together at each common bonding area defined by the apertures in the mask.

    摘要翻译： 被夹在两个待接合的构件之间的互连掩模由预选材料薄片组成，其中具有多个孔，其中定位，大小和成形以限定两个构件之间的共同接合区域，从而结构故障 通过两个构件的结合和加载特性引起的最小化。 制造利用所述互连掩模的装置的方法包括以下步骤：制备其中具有多个孔的预选材料的掩模，每个孔被定位，尺寸和形状以在所述装置的第一和第二构件之间限定公共粘合区域 由此两个构件的结合和加载特性引起的结构失效最小化; 在所述第一构件的表面上放置一层接合材料; 将互连掩模放置在结合材料层上; 将第二个成员放在面罩上; 在由掩模中的孔限定的每个公共接合区域处将第一和第二构件结合在一起。

    Tacking agent
    6.
    发明授权
    Tacking agent 失效
    取款代理

    公开(公告)号：US5177134A

    公开(公告)日：1993-01-05

    申请号：US622027

    申请日：1990-12-03

    申请人： William B. Mullen, III ,  Anthony B. Suppelsa ,  Robert W. Pennisi

    发明人： William B. Mullen, III ,  Anthony B. Suppelsa ,  Robert W. Pennisi

    IPC分类号： B23K35/363 ,  B23K35/14 ,  B23K35/36 ,  C08K5/00 ,  C08L69/00 ,  C09J109/00 ,  C09J133/00 ,  C09J133/04 ,  C09J167/00 ,  C09J167/02 ,  H05K3/30 ,  H05K3/34

    CPC分类号： B23K35/3612 ,  B23K35/3618 ,  H05K3/305 ,  H05K3/3489 ,  H05K2203/0485 ,  Y02P70/613

    摘要： A tacking agent is provided for use in temporarily adhering electronic components and providing fluxing properties for soldering electronic assemblies. The tacking agent comprises a fluxing agent and a tackifier. The fluxing agent is composed of one or more carboxylic acids having the formula ##STR1## where R is an alkyl group containing from 1 to 6 carbon atoms, R' is selected from the group consisting of hydrogen and hydroxyl, and R" is selected from the group consisting of hydrogen, hydroxyl and carboxyl. The tackifier comprises one or more alcohols, aromatic hydrocarbon solvents, aliphatic hydrocarbon solvents, or polymers. The tacking agent is deposited onto a printed circuit board or other substrate, the electronic components are placed into the deposited tacking agent and soldered. During solder reflow the fluxing agent provides fluxing action for the soldering process, and the tackifier volatilizes, leaving little or no residue on the printed circuit board.

    摘要翻译： 提供了一种用于临时粘附电子部件并提供焊接电子组件的助焊剂性质的粘合剂。 粘合剂包括助熔剂和增粘剂。 助熔剂由一种或多种具有式“IMAGE”的羧酸组成，其中R是含有1至6个碳原子的烷基，R'选自氢和羟基，R“被选择 由氢，羟基和羧基组成的组。 增粘剂包括一种或多种醇，芳烃溶剂，脂族烃溶剂或聚合物。 将定影剂沉积在印刷电路板或其它基底上，将电子部件放入沉积的粘合剂中并进行焊接。 在焊锡回流期间，助熔剂为焊接工艺提供助熔作用，增粘剂挥发，在印刷电路板上留下很少或没有残留物。

    Soldering process
    7.
    发明授权
    Soldering process 失效
    焊接工艺

    公开(公告)号：US5435481A

    公开(公告)日：1995-07-25

    申请号：US181724

    申请日：1994-01-18

    申请人： Francisco Da Costa Alves ,  William B. Mullen, III ,  John M. Nickelsen, Jr.

    发明人： Francisco Da Costa Alves ,  William B. Mullen, III ,  John M. Nickelsen, Jr.

    IPC分类号： B23K1/20 ,  H05K3/34

    CPC分类号： B23K1/20 ,  H05K3/3436 ,  H05K3/3489 ,  H05K2201/10719 ,  H05K2201/10727 ,  H05K2201/10734 ,  H05K2203/0485 ,  H05K3/3442 ,  H05K3/3473 ,  Y02P70/613

    摘要： A soldering process for use with solder clad printed circuit boards (10) uses a pin transfer means to apply a tacking agent to the substrate. An array of pins (24) is dipped into a film of tacking agent (22). The pins are removed from the tacking agent (26) carrying with them a predetermined amount of tacking agent. The pins are then contacted (27) to the printed circuit board and removed (28). During this process, a predetermined amount of tacking agent is deposited at selective locations on the printed circuit board. A component is placed (30) on the printed circuit board in the tacking agent and the circuit board and component are heated (40) in order to reflow the solder and effect the solder joint between the component and the board.

    摘要翻译： 与焊料包覆印刷电路板（10）一起使用的焊接工艺使用引脚传输装置将粘合剂施加到基底上。 销（24）的阵列被浸入粘合剂（22）的膜中。 销钉从与其一起携带预定量的粘合剂的粘合剂（26）中移除。 然后将引脚接触（27）到印刷电路板并移除（28）。 在该过程中，预定量的定影剂沉积在印刷电路板上的选择性位置。 将一个部件（30）放置在定影剂中的印刷电路板上，并且电路板和部件被加热（40）以便回流焊料并且实现部件和板之间的焊接接头。

    Integrated circuit chip carrier
    8.
    发明授权
    Integrated circuit chip carrier 失效
    集成电路芯片载体

    公开(公告)号：US5293067A

    公开(公告)日：1994-03-08

    申请号：US898231

    申请日：1992-06-12

    申请人： Kenneth R. Thompson ,  Kingshuk Banerji ,  William B. Mullen, III

    发明人： Kenneth R. Thompson ,  Kingshuk Banerji ,  William B. Mullen, III

    IPC分类号： H01L23/12 ,  H01L21/56 ,  H01L23/32 ,  H01L23/498 ,  H01L23/02

    CPC分类号： H01L23/49827 ,  H01L21/563 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/01004 ,  H01L2924/15311

    摘要： An integrated circuit chip carrier assembly, comprising a semiconductor device (10) having interconnection pads (14) disposed on an active surface (12) of the device. The device (10) is attached by means of electrically conducting bumps (26) to a circuitry pattern (18) on a first side of a circuit carrying substrate (16). The substrate is typically an aramid reinforced organic resin, such as epoxy. The circuitry (18, 20) is electrically connected by conductive through-holes (22) to an array of solder pads on a second side of the substrate. Some or all of the through-holes (22) are covered by the device. The overall length and width of the circuit carrying substrate (16) are each a maximum of about 0.15 inches greater than the equivalent dimensions of the device (10), creating a carrier that is only slightly larger than the semiconductor device itself.

    摘要翻译： 一种集成电路芯片载体组件，包括具有布置在所述装置的有效表面（12）上的互连焊盘（14）的半导体器件（10）。 装置（10）通过导电凸块（26）连接到电路承载衬底（16）的第一侧上的电路图案（18）。 基底通常是芳族聚酰胺增强的有机树脂，例如环氧树脂。 电路（18,20）通过导电通孔（22）电连接到衬底的第二侧上的焊盘阵列。 一些或全部通孔（22）被装置覆盖。 电路承载基板（16）的总长度和宽度各自最大大约为装置（10）的等效尺寸约0.15英寸，从而形成仅略大于半导体装置本身的载体。

    Method of making high density solder bumps and a substrate socket for high density solder bumps
    10.
    发明授权
    Method of making high density solder bumps and a substrate socket for high density solder bumps 失效
    制造高密度焊料凸块的方法和用于高密度焊料凸块的基板插座

    公开(公告)号：US5024372A

    公开(公告)日：1991-06-18

    申请号：US520995

    申请日：1990-05-09

    申请人： Leonard F. Altman ,  Jill L. Flaugher ,  Anthony B. Suppelsa ,  William B. Mullen, III

    发明人： Leonard F. Altman ,  Jill L. Flaugher ,  Anthony B. Suppelsa ,  William B. Mullen, III

    IPC分类号： G02B6/42 ,  H01L21/60 ,  H05K3/34

    CPC分类号： H01L24/16 ,  H01L24/11 ,  H01L24/81 ,  H05K3/3436 ,  H05K3/3484 ,  G02B6/4232 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/81801 ,  H01L2924/014 ,  H01L2924/14 ,  H05K2201/10734 ,  H05K2201/10992 ,  H05K2203/043 ,  H05K2203/0568 ,  H05K2203/0769 ,  H05K3/3452 ,  Y02P70/613

    摘要： A method of forming solder bumps includes the steps of applying a thick layer of solder resist to a substrate. The resist is selectively removed to provide wells at solder pads on the substrate. The solder paste is applied to the substrate in the wells. The solder paste is reflowed to form solder bumps on the pads. A socket for a solder bumped member is obtained by first providing a substrate having metalized pads corresponding to the solder bumps of the member. A thick layer of photo definable solder resist is applied to the substrate. The resist is selectively removed to provide wells at the metalized pads of the substrate. Solder paste is then deposited in the wells. The solder bumped member can then be positioned so that the solder bumps are located in the wells. The solder paste is reflowed to bond to the solder bumps and the metalized pads. The solder paste can be selected to have a lower melting temperature than the solder bumps. By reflowing the solder paste at a temperature lower than the melting temperature of the solder bumps, the paste can wet to and blend with the solder bumps while not causing the solder bumps to reflow.

    摘要翻译： 形成焊料凸块的方法包括以下步骤：将厚的阻焊剂涂覆在衬底上。 选择性去除抗蚀剂以在衬底上的焊盘处提供孔。 将焊膏施加到孔中的基底上。 焊膏被回流以在焊盘上形成焊料凸块。 通过首先提供具有与构件的焊料凸块相对应的金属化焊盘的衬底来获得用于焊料凸起构件的插座。 将厚层的光可定义阻焊剂施加到基板上。 选择性去除抗蚀剂以在基板的金属化焊盘处提供孔。 然后将焊膏沉积在孔中。 然后可以将焊料凸块构件定位成使得焊料凸块位于孔中。 焊膏被回流焊接到焊料凸块和金属化焊盘上。 可以选择焊膏具有比焊锡凸块更低的熔化温度。 通过在低于焊锡凸块的熔融温度的温度下回流焊膏，该膏可以在不引起焊料凸点回流的情况下润湿并与焊料凸块混合。