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    SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
    1.
    发明申请
    SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME 有权

    公开(公告)号：US20210125911A1

    公开(公告)日：2021-04-29

    申请号：US16664631

    申请日：2019-10-25

    申请人： Advanced Semiconductor Engineering, Inc.

    发明人： Chi-Tsung CHIU ,  Hui-Ying HSIEH ,  Kuo-Hua CHEN ,  Cheng Yuan CHEN

    IPC分类号： H01L23/498 ,  H01L23/495 ,  H01L21/768

    摘要： A semiconductor package structure includes a base, at least one semiconductor element, a first dielectric layer, a second dielectric layer and a circuit layer. The semiconductor element is disposed on the base and has an upper surface. The first dielectric layer covers at least a portion of a peripheral surface of the semiconductor element and has a top surface. The top surface is non-coplanar with the upper surface of the semiconductor element. The second dielectric layer covers the semiconductor element and the first dielectric layer. The circuit layer extends through the second dielectric layer to electrically connect the semiconductor element.

    SEMICONDUCTOR DEVICE PACKAGE
    2.
    发明申请
    SEMICONDUCTOR DEVICE PACKAGE 审中-公开

    公开(公告)号：US20170365543A1

    公开(公告)日：2017-12-21

    申请号：US15621970

    申请日：2017-06-13

    申请人： Advanced Semiconductor Engineering, Inc.

    发明人： Hui Hua LEE ,  Chun Hao CHIU ,  Hui-Ying Hsieh ,  Kuo-Hua CHEN ,  Chi-Tsung CHIU

    IPC分类号： H01L23/495

    摘要： A semiconductor device package includes a first conductive base, a first insulation layer and a second insulation layer. The first conductive base has a first surface, a second surface opposite to the first surface and a lateral surface extended between the first surface and the second surface. The lateral surface includes a first portion adjacent to the first surface and a second portion adjacent to the second surface. The first insulation layer comprises a first insulation material. The first insulation layer has a first surface and a second surface opposite to the first surface. The first insulation layer covers the first portion of the lateral surface of the first conductive base. The second insulation layer comprises a second insulation material and covers the second portion of the lateral surface of the first conductive base. The first insulation material is different from the second insulation material.

    SUBSTRATE STRUCTURE AND PACKAGE STRUCTURE USING THE SAME
    4.
    发明申请
    SUBSTRATE STRUCTURE AND PACKAGE STRUCTURE USING THE SAME 审中-公开
    基板结构和使用它的包装结构

    公开(公告)号：US20140144683A1

    公开(公告)日：2014-05-29

    申请号：US14169640

    申请日：2014-01-31

    申请人： Advanced Semiconductor Engineering, Inc.

    发明人： Kuo-Hua CHEN ,  Ming-Chiang LEE ,  Tsung-Hsun LEE ,  Chen-Chuan FAN

    IPC分类号： H05K1/02 ,  H05K1/11 ,  H05K1/09

    CPC分类号： H05K1/0298 ,  H01L23/3128 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K1/09 ,  H05K1/116 ,  H05K2201/09781

    摘要： A substrate structure is provided. The substrate structure includes a number of traces, a substrate core, a number of first metal tiles, a number of second metal tiles, a number of first electrically-functioning circuits, and a number of second electrically-functioning circuits. The substrate core has a first surface and a second surface opposite to the first surface. The traces, the first metal tiles, and the first electrically-functioning circuits are disposed on the first surface and add up to a first metal structure proportion, and the second metal tiles and the second electrically-functioning circuits are disposed on the second surface and add up to a second metal structure proportion. The difference between the first metal structure proportion and the second metal structure proportion is within 15%.

    摘要翻译： 提供了基板结构。 衬底结构包括多个迹线，衬底芯，多个第一金属瓦，多个第二金属瓦，多个第一电功能电路和多个第二电功能电路。 衬底芯具有与第一表面相对的第一表面和第二表面。 迹线，第一金属瓦片和第一电功能电路设置在第一表面上并且加到第一金属结构比例，并且第二金属瓦片和第二电功能电路设置在第二表面上， 加起来第二个金属结构比例。 第一金属结构比例与第二金属结构比例之差在15％以内。

    SEMICONDUCTOR DEVICE PACKAGE
    5.
    发明申请
    SEMICONDUCTOR DEVICE PACKAGE 审中-公开

    公开(公告)号：US20200243427A1

    公开(公告)日：2020-07-30

    申请号：US16846085

    申请日：2020-04-10

    申请人： Advanced Semiconductor Engineering, Inc.

    发明人： Hui Hua LEE ,  Chun Hao CHIU ,  Hui-Ying Hsieh ,  Kuo-Hua CHEN ,  Chi-Tsung CHIU

    IPC分类号： H01L23/495 ,  H01L23/00 ,  H01L23/538 ,  H01L23/498 ,  H01L25/065 ,  H01L21/48 ,  H01L25/16

    摘要： A semiconductor device package includes a first conductive base, a first insulation layer and a second insulation layer. The first conductive base has a first surface, a second surface opposite to the first surface and a lateral surface extended between the first surface and the second surface. The lateral surface includes a first portion adjacent to the first surface and a second portion adjacent to the second surface. The first insulation layer comprises a first insulation material. The first insulation layer has a first surface and a second surface opposite to the first surface. The first insulation layer covers the first portion of the lateral surface of the first conductive base. The second insulation layer comprises a second insulation material and covers the second portion of the lateral surface of the first conductive base. The first insulation material is different from the second insulation material.

    SEMICONDUCTOR PACKAGE STRUCTURE
    7.
    发明申请
    SEMICONDUCTOR PACKAGE STRUCTURE 有权
    半导体封装结构

    公开(公告)号：US20160079157A1

    公开(公告)日：2016-03-17

    申请号：US14486755

    申请日：2014-09-15

    申请人： ADVANCED SEMICONDUCTOR ENGINEERING, INC.

    发明人： Jen-Kuang FANG ,  Kuo-Hua CHEN

    IPC分类号： H01L23/528 ,  H01L23/522 ,  H01L23/00

    CPC分类号： H01L24/33 ,  H01L23/5226 ,  H01L24/05 ,  H01L24/09 ,  H01L24/17 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/06164 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2924/381

    摘要： The present disclosure relates to a semiconductor package structure, including a die and a package substrate. The die includes a semiconductor substrate, multiple interconnect metal layers, and at least one inter-level dielectric disposed between ones of the interconnect metal layers. Each inter-level dielectric is formed of a low k material. An outermost interconnect metal layer has multiple first conductive segments exposed from a surface of the inter-level dielectric. The package substrate includes a substrate body and multiple second conductive segments exposed from a surface of the substrate body. The second conductive segments are electrically connected to the first conductive segments.

    摘要翻译： 本公开涉及包括管芯和封装衬底的半导体封装结构。 芯片包括半导体衬底，多个互连金属层以及设置在互连金属层之间的至少一个层间电介质。 每个层间电介质由低k材料形成。 最外面的互连金属层具有从层间电介质的表面暴露的多个第一导电段。 封装衬底包括衬底主体和从衬底主体的表面暴露的多个第二导电段。 第二导电段电连接到第一导电段。