公开(公告)号：US5134462A

公开(公告)日：1992-07-28

申请号：US728822

申请日：1991-07-09

申请人： Bruce J. Freyman ,  Barry M. Miles ,  Jill L. Flaugher

发明人： Bruce J. Freyman ,  Barry M. Miles ,  Jill L. Flaugher

IPC分类号： H01L23/10 ,  H01L23/24 ,  H01L23/498

CPC分类号： H01L23/24 ,  H01L23/10 ,  H01L23/4985 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/181

摘要： A flexible film is made into a substrate (100) having metallization patterns. A semiconductor device (106) is affixed to the substrate, and the assembly is heated to expand the substrate. A cover (110) is attached to the substrate, over the device (106). Upon cooling, the substrate (100) shrinks and becomes taut and planar within the reinforced area. Alternatively, a reinforcing ring (210) can be attached to the substrate (200) either before or after attachment of the semiconductor device (206).

摘要翻译： 将柔性膜制成具有金属化图案的基板（100）。 将半导体器件（106）固定到衬底上，并且加热组件以使衬底膨胀。 覆盖物（110）在装置（106）上连接到基底。 在冷却时，衬底（100）在加强区域内收缩并且变得绷紧和平坦。 或者，可以在半导体器件（206）的附接之前或之后，将加强环（210）附接到基板（200）。

公开(公告)号：US5006673A

公开(公告)日：1991-04-09

申请号：US447349

申请日：1989-12-07

申请人： Bruce J. Freyman ,  Barry M. Miles ,  Jill L. Flaugher

发明人： Bruce J. Freyman ,  Barry M. Miles ,  Jill L. Flaugher

IPC分类号： H01L21/48 ,  H05K1/00 ,  H05K1/03 ,  H05K3/00 ,  H05K3/40

CPC分类号： H01L21/486 ,  H05K1/0287 ,  H05K1/0306 ,  H05K2201/09945 ,  H05K3/0097 ,  H05K3/4053 ,  Y10T29/49155

摘要： A method of manufacturing a chip carrier from a universal ceramic substrate provides for a universal ceramic substrate having first and second opposed sides and an array of conductively filled through-holes. On the first side, wire bond pads and conductors connected to the conductively filled through-holes are provided as required. Similarly, on the second side, solder pads on the conductively filled through-holes are provided as required. Finally, at least one insulating layer is provided over part of the first side for die attachment.

摘要翻译： 从通用陶瓷基板制造芯片载体的方法提供了具有第一和第二相对侧的通用陶瓷基板和导电填充的通孔阵列。 在第一面上，根据需要提供连接到导电填充通孔的导线接合焊盘和导体。 类似地，在第二面上，根据需要提供导电填充的通孔上的焊盘。 最后，在第一侧的一部分上设置至少一个绝缘层用于管芯附接。

公开(公告)号：US5198264A

公开(公告)日：1993-03-30

申请号：US584958

申请日：1990-09-19

申请人： Leonard F. Altman ,  Jill L. Flaugher ,  Barry M. Miles

发明人： Leonard F. Altman ,  Jill L. Flaugher ,  Barry M. Miles

IPC分类号： B05D3/10 ,  H05K1/03 ,  H05K3/16 ,  H05K3/38 ,  H05K3/46

CPC分类号： H05K3/382 ,  B05D3/104 ,  H05K3/16 ,  B05D2505/50 ,  H05K1/0306 ,  H05K1/0346 ,  H05K2201/0154 ,  H05K2201/2063 ,  H05K2203/072 ,  H05K3/4644

摘要： A method of adhering a polyimide to a substrate includes first placing the substrate in a dilute acid solution. The substrate is then placed in a palladium and tin solution followed by a rinse with water. The rinsed substrate is placed in an accelerator solution to substantially remove the tin from the substrate. The palladium which remains on the substrate surface provides nucleation sites for adhesion promotion and enhanced wetting of polyimide which is applied in a liquid form as by spraying or spinning. Adhesion of polyimide to metals such as gold, ceramics, alumina or polyimide is thereby provided.

摘要翻译： 将聚酰亚胺粘附到基板的方法包括首先将基板放置在稀酸溶液中。 然后将底物置于钯和锡溶液中，然后用水冲洗。 将冲洗的基材置于促进剂溶液中以从基材中基本上除去锡。 保留在基材表面上的钯提供用于粘合促进的成核位点和增强的通过喷雾或纺丝以液体形式施加的聚酰亚胺的润湿性。 因此，提供了聚酰亚胺与金，陶瓷，氧化铝或聚酰亚胺等金属的粘附性。

公开(公告)号：US5296738A

公开(公告)日：1994-03-22

申请号：US927774

申请日：1992-08-10

申请人： Bruce J. Freyman ,  Frank J. Juskey ,  Barry M. Miles

发明人： Bruce J. Freyman ,  Frank J. Juskey ,  Barry M. Miles

IPC分类号： H01L21/56 ,  H01L21/58 ,  H01L23/00 ,  H01L23/13 ,  H01L23/28 ,  H01L23/31 ,  H05K13/02

CPC分类号： H01L23/564 ,  H01L23/13 ,  H01L23/3121 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/4823 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/181

摘要： An integrated circuit package (10) comprises a semiconductor die (14) having a top surface and a bottom surface, and a substrate (16) for receiving the semiconductor die. The substrate should have an aperture(s) (18) below the semiconductor die for providing moisture relief during temperature excursions. An adhesive (20) applied to the substrate allows for mounting the semiconductor die to the substrate. Then, the semiconductor die is wirebonded to the substrate. Finally, an encapsulant (12) for sealing the top surface of the semiconductor die is formed over the semiconductor die and portions of the substrate.

摘要翻译： 集成电路封装（10）包括具有顶表面和底表面的半导体管芯（14）和用于接收半导体管芯的衬底（16）。 衬底应在半导体管芯下方具有一个（18）的孔口，用于在温度偏移期间提供湿气释放。 施加到基板上的粘合剂（20）允许将半导体管芯安装到基板上。 然后，半导体管芯与引线接合。 最后，在半导体管芯和衬底的部分之上形成用于密封半导体管芯的顶表面的密封剂（12）。

公开(公告)号：US5077633A

公开(公告)日：1991-12-31

申请号：US345280

申请日：1989-05-01

申请人： Bruce J. Freyman ,  Barry M. Miles ,  Frank J. Juskey

发明人： Bruce J. Freyman ,  Barry M. Miles ,  Frank J. Juskey

IPC分类号： H01L21/52 ,  H01L21/58 ,  H01L21/60 ,  H01L23/498 ,  H05K7/02

CPC分类号： H01L24/32 ,  H01L23/49827 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15787

摘要： A die pad (108) with a punched hole providing a throughway (110) is affixed upon the chip carrier base 100. Such throughway permits the electronic interconnection of the die backside (112) to a conductive runner (104) by electrically conductive material (110) set between the die backside (112) and the conductive runner (104).

摘要翻译： 具有提供通道（110）的冲孔的模垫（108）被固定在芯片载体基座100上。这样的通道允许模具背面（112）与导电流道（104）的电子互连通过导电材料 110）设置在模具背面（112）和导电浇道（104）之间。

公开(公告)号：US5166772A

公开(公告)日：1992-11-24

申请号：US658810

申请日：1991-02-22

申请人： Keith D. Soldner ,  Frank J. Juskey ,  Bruce J. Freyman ,  Barry M. Miles

发明人： Keith D. Soldner ,  Frank J. Juskey ,  Bruce J. Freyman ,  Barry M. Miles

IPC分类号： H01L23/31 ,  H01L23/552 ,  H01L23/60

CPC分类号： H01L23/3121 ,  H01L23/552 ,  H01L23/60 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025

摘要： A shielded semiconductor package and a method for manufacturing the package is provided. The shielded semiconductor package comprises a substrate (10) having a metallization pattern (12, 13), with one portion of the metallization pattern being a circuit ground (13). A semiconductor device (16) is electrically interconnected (17) to the metallization pattern (12). A perforated metal shield or screen (18) covers the semiconductor device (16) and is electrically and mechanically attached to the metallization circuit ground (13) in order to shield the semiconductor device (16) from radio frequency energy. A resin material (14) is transfer molded about the semiconductor device, the electrical interconnections, and the metal screen to form the completed package.

摘要翻译： 提供一种屏蔽半导体封装及其制造方法。 屏蔽半导体封装包括具有金属化图案（12,13）的衬底（10），金属化图案的一部分是电路接地（13）。 半导体器件（16）与金属化图案（12）电互连（17）。 穿孔的金属屏蔽或屏蔽（18）覆盖半导体器件（16）并且电气和机械地附接到金属化电路接地（13），以便屏蔽半导体器件（16）与射频能量。 树脂材料（14）围绕半导体器件，电互连和金属屏蔽传递模制以形成完成的封装。

公开(公告)号：US5535101A

公开(公告)日：1996-07-09

申请号：US970901

申请日：1992-11-03

申请人： Barry M. Miles ,  Frank J. Juskey ,  Kingshuk Banerji

发明人： Barry M. Miles ,  Frank J. Juskey ,  Kingshuk Banerji

IPC分类号： H01L21/56 ,  H01L23/13 ,  H01L23/31 ,  H05K7/10

CPC分类号： H01L23/13 ,  H01L21/563 ,  H01L23/3121 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15311

摘要： A semiconductor device package comprises an integrated circuit chip (10), a substrate (16), an encapsulant (30), and an organic coupling agent or underfill material (12) disposed between the integrated circuit chip and the first side of the substrate. The chip has a plurality of interconnection pads (14) disposed on an active surface of the chip at some minimum spacing "X." Each of the interconnect pads also has electrically conducting bumps (26) on them. The substrate has a circuit pattern (20) on a first side and an array of solder pads (23) spaced a certain distance apart on an opposite side of the substrate. The distance between these pads is greater than the minimum distance (X) between the interconnect pads on the IC. The circuit pattern is electrically connected to the array of solder pads by plated through holes (22). The length and width of the circuit carrying substrate is substantially greater than the length and width of the integrated circuit chip. The chip is mounted face down to the substrate with the electrically connecting bumps, such that at least some of the plated through holes in the substrate are covered by the chip. The polymeric encapsulant (30) covers the entire chip and substantially all of the first side of the substrate, providing a sealed package.

摘要翻译： 半导体器件封装包括集成电路芯片（10），衬底（16），密封剂（30）以及设置在集成电路芯片和衬底的第一侧之间的有机耦合剂或底部填充材料（12）。 芯片具有多个布置在芯片的有效表面上的互连焊盘（14），该互连焊盘以一定的最小间距“X” 每个互连焊盘在其上也具有导电凸块（26）。 衬底在第一侧具有电路图案（20）和在衬底的相对侧上间隔一定距离的焊盘（23）阵列。 这些焊盘之间的距离大于IC上的互连焊盘之间的最小距离（X）。 电路图案通过电镀通孔（22）电连接到焊盘阵列。 电路承载衬底的长度和宽度远大于集成电路芯片的长度和宽度。 芯片通过电连接凸块面向下安装到基板上，使得基板中的至少一些电镀通孔被芯片覆盖。 聚合物密封剂（30）覆盖基片的整个芯片和基本上所有的第一侧，提供密封的封装。

公开(公告)号：US06242802B1

公开(公告)日：2001-06-05

申请号：US08502993

申请日：1995-07-17

申请人： Barry M. Miles ,  William B. Mullen, III ,  Glenn E. Gold

发明人： Barry M. Miles ,  William B. Mullen, III ,  Glenn E. Gold

IPC分类号： H01L2348

CPC分类号： H01L23/564 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15312 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： An integrated circuit package (10) comprises a semiconductor die (14), and a substrate (16) for receiving the semiconductor die. The substrate has an aperture(s) (18) below the semiconductor die for providing moisture relief during temperature excursions. The semiconductor die is wirebonded to the substrate. An encapsulant (12) seals the top surface of the semiconductor die and serves to bond the semiconductor die to the substrate. The encapsulant also covers portions of the top side of the substrate.

摘要翻译： 集成电路封装（10）包括半导体管芯（14）和用于接收半导体管芯的衬底（16）。 衬底在半导体管芯下方具有一个（18）孔口，用于在温度偏移期间提供湿气释放。 半导体管芯与衬底导线接合。 密封剂（12）密封半导体管芯的顶表面并用于将半导体管芯结合到衬底。 密封剂还覆盖基底的顶侧的部分。

公开(公告)号：US5031027A

公开(公告)日：1991-07-09

申请号：US552039

申请日：1990-07-13

申请人： Dale W. Dorinski ,  Barry M. Miles ,  David E. Reiff

发明人： Dale W. Dorinski ,  Barry M. Miles ,  David E. Reiff

IPC分类号： H05K1/00 ,  H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K3/28 ,  H05K9/00

CPC分类号： H05K1/189 ,  H05K9/0039 ,  H05K1/0218 ,  H05K1/0393 ,  H05K2201/046 ,  H05K2201/0715 ,  H05K2201/09036 ,  H05K2201/09118 ,  H05K2201/0999 ,  H05K2201/2009 ,  H05K2203/1311 ,  H05K3/0058 ,  H05K3/284

摘要： A flexible substrate (100) carries circuitry (102) in one area of the substrate and other portions of the substrate are at least partially covered with conductive material (206) to provide a ground plane. The substrate is folded about the circuitry to form an enclosure shielding the circuit.

摘要翻译： 柔性基板（100）在基板的一个区域中承载电路（102），并且基板的其它部分至少部分地被导电材料（206）覆盖以提供接地平面。 基板围绕电路折叠以形成屏蔽电路的外壳。

公开(公告)号：US5515188A

公开(公告)日：1996-05-07

申请号：US254000

申请日：1994-06-03

申请人： Barry M. Miles ,  Robert B. Akins

发明人： Barry M. Miles ,  Robert B. Akins

IPC分类号： B29C65/00 ,  B29C65/48 ,  G02F1/1339 ,  G02F1/13

CPC分类号： G02F1/1339 ,  B29C65/4835 ,  B29C65/4875 ,  B29C65/7826 ,  B29C66/1122 ,  B29C66/45 ,  B29C66/81455 ,  B29C66/82661

摘要： A liquid crystal device (5) is made by providing an LCD sandwich made of two glass substrates (20) with electrodes, spacers (21), and an uncured sealant (22). A gap (26) with a specified internal volume lies between the two glass substrates. A vacuum reservoir (23) having an internal volume substantially larger than the internal volume of the gap is temporarily attached to the LCD sandwich to align the glass substrates and hold them in place. The LCD sandwich and vacuum reservoir are placed into a conformable container or vacuum bag (24). A vacuum is drawn on the bag so that the bag walls contact the LCD sandwich, and the bag is sealed to maintain the vacuum. The assembly is then heated while under vacuum for a time and a temperature sufficient to cause the gap in the LCD sandwich to decrease to a desired final gap and to cure the sealant.

摘要翻译： 通过提供由两个玻璃基板（20）制成的具有电极，间隔物（21）和未固化的密封剂（22）的LCD夹层来制造液晶装置（5）。 具有特定内部体积的间隙（26）位于两个玻璃基板之间。 具有基本上大于间隙的内部体积的内部体积的真空容器（23）临时附接到LCD夹层板以使玻璃基板对准并将其保持在适当的位置。 LCD夹层和真空储存器放置在一个适合的容器或真空袋（24）中。 在袋子上抽真空，使得袋壁与LCD夹层接触，袋被密封以保持真空。 然后将组件在真空下加热一段时间，并使温度足以使LCD夹层中的间隙减小到期望的最终间隙并固化密封剂。