公开(公告)号：US11430730B2

公开(公告)日：2022-08-30

申请号：US17121222

申请日：2020-12-14

Applicant: DAI NIPPON PRINTING CO., LTD.

Inventor： Yuki Aritsuka ,  Takamasa Takano ,  Masaya Tanaka ,  Yumi Yoshii ,  Miyuki Suzuki ,  Shuji Sagara

IPC: H01L23/522 ,  H01L49/02 ,  H01L21/3105

Abstract: A wiring substrate of the present disclosure includes a substrate, a first conductive layer, a first insulating layer, and a second conductive layer. The substrate has an insulating surface. The first conductive layer is disposed on the substrate and includes a first part and a second part. The first part has a first thickness. The second part has a second thickness thinner than the first thickness and is adjacent to the first part. The first insulating layer is disposed on the first part and apart from the second part. The first insulating layer is disposed between the second conducting layer and the first part.

公开(公告)号：US11069618B2

公开(公告)日：2021-07-20

申请号：US16736946

申请日：2020-01-08

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Hiroshi Kudo ,  Takamasa Takano

IPC: H01L23/532 ,  H01L23/522 ,  H01L21/768 ,  H01L21/02 ,  H01L23/498 ,  H05K3/46 ,  H01L21/3105 ,  H01L21/311 ,  H05K1/02

Abstract: A multi-layer line structure including a substrate, a lower layer Cu line located on the substrate, an upper layer Cu line located on an insulating layer including an inorganic film located on the lower layer Cu line and an organic resin film located on the inorganic film, and a via connection part located in a via connection hole running in an up-down direction through the insulating layer in an area where the lower layer Cu line and the upper layer Cu line overlap each other is provided. The via connection part includes a barrier conductive layer located on a part of the lower layer Cu line exposed to a bottom part of the via connection hole and on an inner wall of the via connection hole.

公开(公告)号：US20150235955A1

公开(公告)日：2015-08-20

申请号：US14704096

申请日：2015-05-05

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Hiroshi Kudo ,  Takamasa Takano

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L23/53238 ,  H01L21/02063 ,  H01L21/02071 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/31058 ,  H01L21/31116 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/7685 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/49822 ,  H01L23/5226 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H05K1/0231 ,  H05K3/4679 ,  H05K3/4688 ,  H05K2201/068 ,  H01L2924/00

Abstract: A multi-layer line structure including a substrate, a lower layer Cu line located on the substrate, an upper layer Cu line located on an insulating layer including an inorganic film located on the lower layer Cu line and an organic resin film located on the inorganic film, and a via connection part located in a via connection hole running in an up-down direction through the insulating layer in an area where the lower layer Cu line and the upper layer Cu line overlap each other is provided. The via connection part includes a barrier conductive layer located on a part of the lower layer Cu line exposed to a bottom part of the via connection hole and on an inner wall of the via connection hole.

Abstract translation: 一种多层线结构，包括基板，位于基板上的下层Cu线，位于包含位于下层Cu线上的无机膜的绝缘层上的上层Cu线以及位于无机层上的有机树脂膜 设置有位于通过连接孔的通孔连接部，该通孔连接孔在下层Cu线和上层Cu线重叠的区域中通过绝缘层沿上下方向延伸。 通孔连接部包括位于下层Cu线的暴露于通孔连接孔的底部的部分上的阻挡导电层和通孔连接孔的内壁。

公开(公告)号：US20130328214A1

公开(公告)日：2013-12-12

申请号：US13966633

申请日：2013-08-14

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Takamasa Takano

IPC: H01L23/48

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/17 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15786 ,  H01L2924/1579 ,  H05K1/113 ,  H05K3/426 ,  H05K3/445 ,  H05K2201/09436 ,  H05K2201/09581 ,  H05K2201/09609 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/10378 ,  H05K2203/0733 ,  H05K2203/1178 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49165 ,  H01L2224/05647 ,  H01L2924/01024 ,  H01L2924/01079

Abstract: A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole electrodes by filling a conductive material into the plurality of through-holes, forming a first insulation layer on one surface of the substrate, forming a plurality of first openings which expose the plurality of through-hole electrodes corresponding to each of the plurality of through-hole electrodes, on the first insulation layer and correcting a position of the plurality of first openings using the relationship between a misalignment amount of a measured distance value of an open position of a leaning through-hole among the plurality of through-holes and of a design distance value of the open position of the leaning through-hole among the plurality of through-holes with respect to a center position of the substrate.

Abstract translation: 一种制造通孔电极基板的方法包括在基板上形成多个通孔，通过在多个通孔中填充导电材料形成多个通孔电极，在一个通孔上形成第一绝缘层 在所述第一绝缘层上形成多个第一开口，所述多个第一开口将与所述多个通孔电极中的每一个相对应的多个通孔电极暴露在所述第一绝缘层上，并且使用所述关系来校正所述多个第一开口的位置 在多个通孔中的倾斜通孔的打开位置的测量距离值的偏移量与多个通孔中的倾斜通孔的打开位置的设计距离值之间， 相对于基板的中心位置。

公开(公告)号：US11742273B2

公开(公告)日：2023-08-29

申请号：US17168631

申请日：2021-02-05

Applicant: DAI NIPPON PRINTING CO., LTD.

Inventor： Takamasa Takano ,  Satoru Kuramochi

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L25/16 ,  H01L49/02 ,  H05K1/11 ,  H01L23/12 ,  H05K3/28

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L23/12 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5384 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/16 ,  H01L28/10 ,  H01L28/40 ,  H01L28/60 ,  H05K1/11 ,  H05K3/28 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48225 ,  H01L2224/73257 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042

Abstract: A through electrode substrate includes: a substrate having a first surface and a second surface facing the first surface; through electrodes penetrating through the substrate; and a first capacitor including a first conductive layer, an insulating layer, and a second conductive layer, arranged on the first surface side of the substrate, and electrically connected with at least one of the through electrodes. The first conductive layer is arranged on the first surface side of the substrate and is electrically connected with the through electrode. The insulating layer includes a first part and a second part and is arranged on the first conductive layer. The second conductive layer is arranged on the insulating layer. The first part is arranged between the first conductive layer and the second conductive layer. The second part covers at least a part of a side surface of the first conductive layer.

公开(公告)号：US11373906B2

公开(公告)日：2022-06-28

申请号：US17178659

申请日：2021-02-18

Applicant: DAI NIPPON PRINTING CO., LTD.

Inventor： Shinji Maekawa ,  Hiroshi Kudo ,  Takamasa Takano ,  Hiroshi Mawatari ,  Masaaki Asano

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/768 ,  H01L21/3205 ,  H01L23/13 ,  H01L23/14 ,  H01L23/532 ,  H05K1/11 ,  H01L23/522 ,  H01L23/12 ,  H05K3/40

Abstract: A method of manufacturing a through electrode substrate, the method includes: preparing a substrate including a first surface positioned on a first side, and a second surface positioned on a second side opposite to the first side, the substrate being provided with a through hole; forming a through electrode having a sidewall portion extending along a sidewall of the through hole, and a first portion positioned on the first surface of the substrate and connected to the sidewall portion; forming an organic film inside the through hole; forming an inorganic film at least partially covering the first portion of the through electrode from the first side; forming an insulation layer positioned to the first side of the inorganic film; and forming an electroconductive layer passing through the inorganic film and the insulation layer so as to be connected to the first portion of the through electrode.

公开(公告)号：US11217530B2

公开(公告)日：2022-01-04

申请号：US16736973

申请日：2020-01-08

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Hiroshi Kudo ,  Takamasa Takano

IPC: H01L23/532 ,  H01L23/498 ,  H01L21/768 ,  H01L21/02 ,  H01L23/522 ,  H01L21/311 ,  H05K3/46 ,  H01L21/3105 ,  H05K1/02

Abstract: A multi-layer line structure including a substrate, a lower layer Cu line located on the substrate, an upper layer Cu line located on an insulating layer including an inorganic film located on the lower layer Cu line and an organic resin film located on the inorganic film, and a via connection part located in a via connection hole running in an up-down direction through the insulating layer in an area where the lower layer Cu line and the upper layer Cu line overlap each other is provided. The via connection part includes a barrier conductive layer located on a part of the lower layer Cu line exposed to a bottom part of the via connection hole and on an inner wall of the via connection hole.

公开(公告)号：US10957592B2

公开(公告)日：2021-03-23

申请号：US16325911

申请日：2017-08-21

Applicant: DAI NIPPON PRINTING CO., LTD.

Inventor： Shinji Maekawa ,  Hiroshi Kudo ,  Takamasa Takano ,  Hiroshi Mawatari ,  Masaaki Asano

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/768 ,  H01L21/3205 ,  H01L23/13 ,  H01L23/14 ,  H01L23/532 ,  H05K1/11 ,  H01L23/522 ,  H01L23/12 ,  H05K3/40

Abstract: A through electrode substrate includes: a substrate including first and second surfaces respectively on a first side and a second side opposite to the first, the substrate having a through hole; and a through electrode. The through electrode has a sidewall portion along the through hole sidewall, and a first portion the first surface and connected to the sidewall portion. The through electrode substrate includes: an organic film inside the through hole; an inorganic film that at least partially covers the through electrode first portion from the first side and has an opening on the first portion; and a first wiring layer having an insulation layer to the inorganic film first side and includes an organic layer with an opening communicating with the inorganic film opening, and an electroconductive layer connected to the through electrode first portion through the inorganic film opening and the insulation layer opening.

公开(公告)号：US10586768B2

公开(公告)日：2020-03-10

申请号：US16151543

申请日：2018-10-04

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Hiroshi Kudo ,  Takamasa Takano

IPC: H01L23/532 ,  H01L23/522 ,  H01L21/768 ,  H01L23/498 ,  H01L21/02 ,  H05K3/46 ,  H01L21/3105 ,  H01L21/311 ,  H05K1/02

Abstract: A multi-layer line structure including a substrate, a lower layer Cu line located on the substrate, an upper layer Cu line located on an insulating layer including an inorganic film located on the lower layer Cu line and an organic resin film located on the inorganic film, and a via connection part located in a via connection hole running in an up-down direction through the insulating layer in an area where the lower layer Cu line and the upper layer Cu line overlap each other is provided. The via connection part includes a barrier conductive layer located on a part of the lower layer Cu line exposed to a bottom part of the via connection hole and on an inner wall of the via connection hole.

公开(公告)号：US09443788B2

公开(公告)日：2016-09-13

申请号：US13966633

申请日：2013-08-14

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Takamasa Takano

IPC: H05K1/11 ,  H01L23/48 ,  H01L21/48 ,  H01L21/768 ,  H01L23/14 ,  H01L23/498 ,  H05K3/42 ,  H05K3/44

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/17 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15786 ,  H01L2924/1579 ,  H05K1/113 ,  H05K3/426 ,  H05K3/445 ,  H05K2201/09436 ,  H05K2201/09581 ,  H05K2201/09609 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/10378 ,  H05K2203/0733 ,  H05K2203/1178 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49165 ,  H01L2224/05647 ,  H01L2924/01024 ,  H01L2924/01079

Abstract: A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole electrodes by filling a conductive material into the plurality of through-holes, forming a first insulation layer on one surface of the substrate, forming a plurality of first openings which expose the plurality of through-hole electrodes corresponding to each of the plurality of through-hole electrodes, on the first insulation layer and correcting a position of the plurality of first openings using the relationship between a misalignment amount of a measured distance value of an open position of a leaning through-hole among the plurality of through-holes and of a design distance value of the open position of the leaning through-hole among the plurality of through-holes with respect to a center position of the substrate.

Abstract translation: 一种制造通孔电极基板的方法包括在基板上形成多个通孔，通过在多个通孔中填充导电材料形成多个通孔电极，在一个通孔上形成第一绝缘层 在所述第一绝缘层上形成多个第一开口，所述多个第一开口将与所述多个通孔电极中的每一个相对应的多个通孔电极暴露在所述第一绝缘层上，并且使用所述关系来校正所述多个第一开口的位置 在多个通孔中的倾斜通孔的打开位置的测量距离值的偏移量与多个通孔中的倾斜通孔的打开位置的设计距离值之间， 相对于基板的中心位置。