公开(公告)号：US09082887B1

公开(公告)日：2015-07-14

申请号：US13966259

申请日：2013-08-13

申请人： DaeSik Choi ,  Taewoo Lee ,  KyuWon Lee ,  SungWon Cho

发明人： DaeSik Choi ,  Taewoo Lee ,  KyuWon Lee ,  SungWon Cho

IPC分类号： H01L23/50 ,  H01L21/56 ,  H01L23/00

CPC分类号： H01L24/94 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/50 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05548 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81805 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05147

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a semiconductor wafer having a chip pad; attaching a wafer frame to the semiconductor wafer, the wafer frame having a horizontal cover integral to a protruding connector with the protruding connector on the chip pad; forming an underfill around the protruding connector and between the horizontal cover and the semiconductor wafer; removing the horizontal cover exposing the underfill and the protruding connector; and singulating an integrated circuit package from the semiconductor wafer.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有芯片焊盘的半导体晶片; 将晶片框架附接到半导体晶片，晶片框架具有与突出连接器成一体的水平盖，突出连接器在芯片垫上; 在所述突出连接器周围和所述水平盖和所述半导体晶片之间形成底部填充物; 移除露出底部填充物和突出连接器的水平盖; 以及从半导体晶片分离集成电路封装。

公开(公告)号：US08574964B2

公开(公告)日：2013-11-05

申请号：US12760428

申请日：2010-04-14

申请人： SungWon Cho ,  TaeWoo Lee ,  DaeSik Choi ,  KyuWon Lee

发明人： SungWon Cho ,  TaeWoo Lee ,  DaeSik Choi ,  KyuWon Lee

IPC分类号： H01L21/00 ,  H01L21/3205 ,  H01L21/4763 ,  H01L21/44

CPC分类号： H01L23/48 ,  H01L24/05 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/05568 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/165 ,  H01L2224/29 ,  H01L2224/29099 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29298 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81101 ,  H01L2224/81193 ,  H01L2224/83889 ,  H01L2224/92125 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/05552 ,  H01L2224/81805

摘要： A semiconductor device has a flipchip type semiconductor die with contact pads and substrate with contact pads. A flux material is deposited over the contact pads of the semiconductor die and contact pads of the substrate. A solder tape formed as a continuous body of solder material with a plurality of recesses is disposed between the contact pads of the semiconductor die and substrate. The solder tape is brought to a liquidus state to separate a portion of the solder tape outside a footprint of the contact pads of the semiconductor die and substrate under surface tension and coalesce the solder material as an electrical interconnect substantially within the footprint of the contact pads of the semiconductor die and substrate. The contact pads on the semiconductor die and substrate can be formed with an extension or recess to increase surface area of the contact pads.

摘要翻译： 半导体器件具有带有接触焊盘和具有接触焊盘的衬底的倒装芯片型半导体管芯。 焊剂材料沉积在半导体管芯的接触焊盘和衬底的接触焊盘上。 形成为具有多个凹部的焊料材料的连续体的焊料带设置在半导体管芯和衬底的接触焊盘之间。 焊带被带到液相线状态，以将表面张力下的半导体管芯和衬底的接触焊盘的一部分焊接区分隔开，并将焊料材料作为基本上在接触焊盘的覆盖区内的电互连 的半导体管芯和衬底。 半导体管芯和衬底上的接触焊盘可以形成有延伸部或凹部，以增加接触焊盘的表面积。

公开(公告)号：US20110291264A1

公开(公告)日：2011-12-01

申请号：US12791865

申请日：2010-06-01

申请人： DaeSik Choi ,  Taewoo Lee ,  KyuWon Lee ,  SungWon Cho

发明人： DaeSik Choi ,  Taewoo Lee ,  KyuWon Lee ,  SungWon Cho

IPC分类号： H01L23/50 ,  H01L21/56

CPC分类号： H01L24/94 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/50 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05548 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81805 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05147

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a semiconductor wafer having a chip pad; attaching a wafer frame to the semiconductor wafer, the wafer frame having a horizontal cover integral to a protruding connector with the protruding connector on the chip pad; forming an underfill around the protruding connector and between the horizontal cover and the semiconductor wafer; removing the horizontal cover exposing the underfill and the protruding connector; and singulating an integrated circuit package from the semiconductor wafer.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有芯片焊盘的半导体晶片; 将晶片框架附接到半导体晶片，晶片框架具有与突出连接器成一体的水平盖，突出连接器在芯片垫上; 在所述突出连接器周围和所述水平盖和所述半导体晶片之间形成底部填充物; 移除露出底部填充物和突出连接器的水平盖; 以及从半导体晶片分离集成电路封装。

公开(公告)号：US20120146235A1

公开(公告)日：2012-06-14

申请号：US12964617

申请日：2010-12-09

申请人： DaeSik Choi ,  Taewoo Lee ,  KyuWon Lee ,  SungWon Cho

发明人： DaeSik Choi ,  Taewoo Lee ,  KyuWon Lee ,  SungWon Cho

IPC分类号： H01L23/50 ,  H01L21/50

CPC分类号： H01L23/49816 ,  H01L21/4832 ,  H01L21/4853 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2224/48248 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/83001 ,  H01L2224/85001 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/1011 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18165 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacture of an integrated circuit packaging system includes: forming an outer contact pad having an outer pad top side; mounting an integrated circuit above the outer pad top side; forming an encapsulation having an encapsulation top side and an encapsulation bottom side, the encapsulation over the integrated circuit with the encapsulation bottom side coplanar with the outer pad top side; and forming a vertical interconnect through the encapsulation, the vertical interconnect having an interconnect bottom side directly on the outer pad top side and an interconnect top side exposed from the encapsulation.

摘要翻译： 一种集成电路封装系统的制造方法，包括：形成具有外垫顶侧的外接触垫; 在外垫顶侧上安装集成电路; 形成具有封装顶侧和封装底侧的封装，所述封装在所述集成电路上，所述封装底侧与所述外焊盘顶侧共面; 并且通过封装形成垂直互连，垂直互连具有直接在外焊盘顶侧上的互连底侧和从封装暴露的互连顶侧。

公开(公告)号：US20110254146A1

公开(公告)日：2011-10-20

申请号：US12760428

申请日：2010-04-14

申请人： SungWon Cho ,  TaeWoo Lee ,  DaeSik Choi ,  KyuWon Lee

发明人： SungWon Cho ,  TaeWoo Lee ,  DaeSik Choi ,  KyuWon Lee

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H01L23/48 ,  H01L24/05 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/05568 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/165 ,  H01L2224/29 ,  H01L2224/29099 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29298 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81101 ,  H01L2224/81193 ,  H01L2224/83889 ,  H01L2224/92125 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/05552 ,  H01L2224/81805

摘要： A semiconductor device has a flipchip type semiconductor die with contact pads and substrate with contact pads. A flux material is deposited over the contact pads of the semiconductor die and contact pads of the substrate. A solder tape formed as a continuous body of solder material with a plurality of recesses is disposed between the contact pads of the semiconductor die and substrate. The solder tape is brought to a liquidus state to separate a portion of the solder tape outside a footprint of the contact pads of the semiconductor die and substrate under surface tension and coalesce the solder material as an electrical interconnect substantially within the footprint of the contact pads of the semiconductor die and substrate. The contact pads on the semiconductor die and substrate can be formed with an extension or recess to increase surface area of the contact pads.

摘要翻译： 半导体器件具有带有接触焊盘和具有接触焊盘的衬底的倒装芯片型半导体管芯。 焊剂材料沉积在半导体管芯的接触焊盘和衬底的接触焊盘上。 形成为具有多个凹部的焊料材料的连续体的焊料带设置在半导体管芯和衬底的接触焊盘之间。 焊带被带到液相线状态，以将表面张力下的半导体管芯和衬底的接触焊盘的一部分焊接区分隔开，并将焊料材料作为基本上在接触焊盘的覆盖区内的电互连 的半导体管芯和衬底。 半导体管芯和衬底上的接触焊盘可以形成有延伸部或凹部，以增加接触焊盘的表面积。

公开(公告)号：US08502387B2

公开(公告)日：2013-08-06

申请号：US12964617

申请日：2010-12-09

申请人： DaeSik Choi ,  Taewoo Lee ,  KyuWon Lee ,  SungWon Cho

发明人： DaeSik Choi ,  Taewoo Lee ,  KyuWon Lee ,  SungWon Cho

IPC分类号： H01L29/40

CPC分类号： H01L23/49816 ,  H01L21/4832 ,  H01L21/4853 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2224/48248 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/83001 ,  H01L2224/85001 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/1011 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18165 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacture of an integrated circuit packaging system includes: forming an outer contact pad having an outer pad top side; mounting an integrated circuit above the outer pad top side; forming an encapsulation having an encapsulation top side and an encapsulation bottom side, the encapsulation over the integrated circuit with the encapsulation bottom side coplanar with the outer pad top side; and forming a vertical interconnect through the encapsulation, the vertical interconnect having an interconnect bottom side directly on the outer pad top side and an interconnect top side exposed from the encapsulation.

摘要翻译： 一种集成电路封装系统的制造方法，包括：形成具有外垫顶侧的外接触垫; 在外垫顶侧上安装集成电路; 形成具有封装顶侧和封装底侧的封装，所述封装在所述集成电路上，所述封装底侧与所述外焊盘顶侧共面; 并且通过封装形成垂直互连，垂直互连具有直接在外焊盘顶侧上的互连底侧和从封装暴露的互连顶侧。

公开(公告)号：US08519544B2

公开(公告)日：2013-08-27

申请号：US13570979

申请日：2012-08-09

申请人： OhHan Kim ,  SungWon Cho ,  DaeSik Choi ,  KyuWon Lee ,  DongSoo Moo

发明人： OhHan Kim ,  SungWon Cho ,  DaeSik Choi ,  KyuWon Lee ,  DongSoo Moo

IPC分类号： H01L23/48

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/73 ,  H01L24/82 ,  H01L24/96 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/24145 ,  H01L2224/24146 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2224/82 ,  H01L2924/00014 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/03

摘要： A semiconductor device can include a carrier substrate, and a first semiconductor die disposed on a surface of the carrier substrate. An encapsulant can be disposed over the first semiconductor die and the carrier substrate. The semiconductor device can include first vias disposed through the encapsulant as well as second vias disposed through the encapsulant to expose first contact pads. The first contact pads are on upper surfaces of the first semiconductor die. The semiconductor device can include conductive pillars that fill the first vias, and first conductive metal vias (CMVs) that fill the second vias. The conductive pillar can include a first conductive material, and the first CMVs can be in contact with the first contact pads. The semiconductor device can include a conductive layer disposed over the encapsulant. The conductive layer can electrically connect one of the first CMVs with one of the conductive pillars.

摘要翻译： 半导体器件可以包括载体衬底和设置在载体衬底的表面上的第一半导体管芯。 密封剂可以设置在第一半导体管芯和载体衬底之上。 半导体器件可以包括通过密封剂设置的第一通孔以及通过密封剂设置的第二通孔，以暴露第一接触焊盘。 第一接触垫位于第一半导体管芯的上表面上。 半导体器件可以包括填充第一通孔的导电柱和填充第二通孔的第一导电金属通孔（CMV）。 导电柱可以包括第一导电材料，并且第一CMV可以与第一接触垫接触。 半导体器件可以包括设置在密封剂上的导电层。 导电层可以将第一CMV之一与导电柱之一电连接。

公开(公告)号：US20120211892A1

公开(公告)日：2012-08-23

申请号：US13032536

申请日：2011-02-22

申请人： OhHan Kim ,  SungWon Cho ,  DaeSik Choi ,  KyuWon Lee ,  DongSoo Moo

发明人： OhHan Kim ,  SungWon Cho ,  DaeSik Choi ,  KyuWon Lee ,  DongSoo Moo

IPC分类号： H01L21/784 ,  H01L23/485

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/73 ,  H01L24/82 ,  H01L24/96 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/24145 ,  H01L2224/24146 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2224/82 ,  H01L2924/00014 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/03

摘要： A semiconductor device can include a carrier substrate, and a first semiconductor die disposed on a surface of the carrier substrate. An encapsulant can be disposed over the first semiconductor die and the carrier substrate. The semiconductor device can include first vias disposed through the encapsulant as well as second vias disposed through the encapsulant to expose first contact pads. The first contact pads are on upper surfaces of the first semiconductor die. The semiconductor device can include conductive pillars that fill the first vias, and first conductive metal vias (CMVs) that fill the second vias. The conductive pillar can include a first conductive material, and the first CMVs can be in contact with the first contact pads. The semiconductor device can include a conductive layer disposed over the encapsulant. The conductive layer can electrically connect one of the first CMVs with one of the conductive pillars.

摘要翻译： 半导体器件可以包括载体衬底和设置在载体衬底的表面上的第一半导体管芯。 密封剂可以设置在第一半导体管芯和载体衬底之上。 半导体器件可以包括通过密封剂设置的第一通孔以及通过密封剂设置的第二通孔，以暴露第一接触焊盘。 第一接触垫位于第一半导体管芯的上表面上。 半导体器件可以包括填充第一通孔的导电柱和填充第二通孔的第一导电金属通孔（CMV）。 导电柱可以包括第一导电材料，并且第一CMV可以与第一接触垫接触。 半导体器件可以包括设置在密封剂上的导电层。 导电层可以将第一CMV之一与导电柱之一电连接。

公开(公告)号：US20120306097A1

公开(公告)日：2012-12-06

申请号：US13570979

申请日：2012-08-09

申请人： OhHan Kim ,  SungWon Cho ,  DaeSik Choi ,  KyuWon Lee ,  DongSoo Moo

发明人： OhHan Kim ,  SungWon Cho ,  DaeSik Choi ,  KyuWon Lee ,  DongSoo Moo

IPC分类号： H01L23/48

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/73 ,  H01L24/82 ,  H01L24/96 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/24145 ,  H01L2224/24146 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2224/82 ,  H01L2924/00014 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/03

摘要： A semiconductor device can include a carrier substrate, and a first semiconductor die disposed on a surface of the carrier substrate. An encapsulant can be disposed over the first semiconductor die and the carrier substrate. The semiconductor device can include first vias disposed through the encapsulant as well as second vias disposed through the encapsulant to expose first contact pads. The first contact pads are on upper surfaces of the first semiconductor die. The semiconductor device can include conductive pillars that fill the first vias, and first conductive metal vias (CMVs) that fill the second vias. The conductive pillar can include a first conductive material, and the first CMVs can be in contact with the first contact pads. The semiconductor device can include a conductive layer disposed over the encapsulant. The conductive layer can electrically connect one of the first CMVs with one of the conductive pillars.

摘要翻译： 半导体器件可以包括载体衬底和设置在载体衬底的表面上的第一半导体管芯。 密封剂可以设置在第一半导体管芯和载体衬底之上。 半导体器件可以包括通过密封剂设置的第一通孔以及通过密封剂设置的第二通孔，以暴露第一接触焊盘。 第一接触垫位于第一半导体管芯的上表面上。 半导体器件可以包括填充第一通孔的导电柱和填充第二通孔的第一导电金属通孔（CMV）。 导电柱可以包括第一导电材料，并且第一CMV可以与第一接触垫接触。 半导体器件可以包括设置在密封剂上的导电层。 导电层可以将第一CMV之一与导电柱之一电连接。

公开(公告)号：US08273604B2

公开(公告)日：2012-09-25

申请号：US13032536

申请日：2011-02-22

申请人： OhHan Kim ,  SungWon Cho ,  DaeSik Choi ,  KyuWon Lee ,  DongSoo Moo

发明人： OhHan Kim ,  SungWon Cho ,  DaeSik Choi ,  KyuWon Lee ,  DongSoo Moo

IPC分类号： H01L21/00

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/73 ,  H01L24/82 ,  H01L24/96 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/24145 ,  H01L2224/24146 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2224/82 ,  H01L2924/00014 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/03

摘要： A semiconductor device can include a carrier substrate, and a first semiconductor die disposed on a surface of the carrier substrate. An encapsulant can be disposed over the first semiconductor die and the carrier substrate. The semiconductor device can include first vias disposed through the encapsulant as well as second vias disposed through the encapsulant to expose first contact pads. The first contact pads are on upper surfaces of the first semiconductor die. The semiconductor device can include conductive pillars that fill the first vias, and first conductive metal vias (CMVs) that fill the second vias. The conductive pillar can include a first conductive material, and the first CMVs can be in contact with the first contact pads. The semiconductor device can include a conductive layer disposed over the encapsulant. The conductive layer can electrically connect one of the first CMVs with one of the conductive pillars.

摘要翻译： 半导体器件可以包括载体衬底和设置在载体衬底的表面上的第一半导体管芯。 密封剂可以设置在第一半导体管芯和载体衬底之上。 半导体器件可以包括通过密封剂设置的第一通孔以及通过密封剂设置的第二通孔，以暴露第一接触焊盘。 第一接触垫位于第一半导体管芯的上表面上。 半导体器件可以包括填充第一通孔的导电柱和填充第二通孔的第一导电金属通孔（CMV）。 导电柱可以包括第一导电材料，并且第一CMV可以与第一接触垫接触。 半导体器件可以包括设置在密封剂上的导电层。 导电层可以将第一CMV之一与导电柱之一电连接。