公开(公告)号：US06829273B2

公开(公告)日：2004-12-07

申请号：US10040328

申请日：2001-12-19

申请人： Hiroshi Amano ,  Isamu Akasaki ,  Yawara Kaneko ,  Norihide Yamada ,  Tetsuya Takeuchi ,  Satoshi Watanabe

发明人： Hiroshi Amano ,  Isamu Akasaki ,  Yawara Kaneko ,  Norihide Yamada ,  Tetsuya Takeuchi ,  Satoshi Watanabe

IPC分类号： H01S500

CPC分类号： B82Y20/00 ,  H01S5/2004 ,  H01S5/2009 ,  H01S5/3215 ,  H01S5/32341 ,  H01S5/34333 ,  H01S2301/173

摘要： The nitride semiconductor layer structure comprises a buffer layer and a composite layer on the buffer layer. The buffer layer is a layer of a low-temperature-deposited nitride semiconductor material that includes AlN. The composite layer is a layer of a single-crystal nitride semiconductor material that includes AlN. The composite layer includes a first sub-layer adjacent the buffer layer and a second sub-layer over the first sub-layer. The single-crystal nitride semiconductor material of the composite layer has a first AlN molar fraction in the first sub-layer and has a second AlN molar fraction in the second sub-layer. The second AlN molar fraction is greater than the first AlN molar fraction. The nitride semiconductor laser comprises a portion of the above-described nitride semiconductor layer structure, and additionally comprises an optical waveguide layer over the composite layer and an active layer over the optical waveguide layer.

摘要翻译： 氮化物半导体层结构包括缓冲层和缓冲层上的复合层。 缓冲层是包含AlN的低温沉积氮化物半导体材料的层。 复合层是包含AlN的单晶氮化物半导体材料层。 复合层包括邻近缓冲层的第一子层和第一子层上的第二子层。 复合层的单晶氮化物半导体材料在第一子层中具有第一AlN摩尔分数，并且在第二子层中具有第二AlN摩尔分数。 第二AlN摩尔分数大于第一AlN摩尔分数。 氮化物半导体激光器包括上述氮化物半导体层结构的一部分，并且还包括复合层上的光波导层和光波导层上的有源层。

公开(公告)号：US06690700B2

公开(公告)日：2004-02-10

申请号：US09833243

申请日：2001-04-10

申请人： Tetsuya Takeuchi ,  Yawara Kaneko ,  Norihide Yamada ,  Hiroshi Amano ,  Isamu Akasaki

发明人： Tetsuya Takeuchi ,  Yawara Kaneko ,  Norihide Yamada ,  Hiroshi Amano ,  Isamu Akasaki

IPC分类号： H01S500

CPC分类号： H01S5/20 ,  H01L33/007 ,  H01L33/0075 ,  H01S5/2004 ,  H01S5/32341 ,  H01S2301/18

摘要： A nitride semiconductor device that comprises a first layer, a second layer and a buffer layer sandwiched between the first layer and the second layer. The second layer is a layer of a single-crystal nitride semiconductor material including AlN and has a thickness greater than the thickness at which cracks would form if the second layer were grown directly on the first layer. The buffer layer is a layer of a low-temperature-deposited nitride semiconductor material that includes AlN. Incorporating the nitride semiconductor device into a semiconductor laser diode enables the laser diode to generate coherent light having a far-field pattern that exhibits a single peak.

摘要翻译： 一种氮化物半导体器件，包括夹在第一层和第二层之间的第一层，第二层和缓冲层。 第二层是包括AlN的单晶氮化物半导体材料的层，并且其厚度大于如果第二层直接在第一层上生长则形成裂纹的厚度。 缓冲层是包含AlN的低温沉积氮化物半导体材料的层。 将氮化物半导体器件并入半导体激光二极管使得激光二极管能够产生具有单峰的远场图案的相干光。

公开(公告)号：US06229151B1

公开(公告)日：2001-05-08

申请号：US09162708

申请日：1998-09-29

申请人： Tetsuya Takeuchi ,  Norihide Yamada ,  Hiroshi Amano ,  Isamu Akasaki

发明人： Tetsuya Takeuchi ,  Norihide Yamada ,  Hiroshi Amano ,  Isamu Akasaki

IPC分类号： H01L2906

CPC分类号： H01L33/32 ,  B82Y20/00 ,  H01L33/16 ,  H01L33/18 ,  H01L33/24 ,  H01S5/021 ,  H01S5/0213 ,  H01S5/3201 ,  H01S5/3202 ,  H01S5/343 ,  H01S5/34333

摘要： An optical semiconductor device having a plurality of GaN-based semiconductor layers containing a strained quantum well layer in which the strained quantum well layer has a piezoelectric field that depends on the orientation of the strained quantum well layer when the quantum layer is grown. In the present invention, the strained quantum well layer is grown with an orientation at which the piezoelectric field is less than the maximum value of the piezoelectric field strength as a function of the orientation. In devices having GaN-based semiconductor layers with a wurtzite crystal structure, the growth orientation of the strained quantum well layer is tilted at least 1° from the {0001} direction of the wurtzite crystal structure. In devices having GaN-based semiconductor layers with a zincblende crystal structure, the growth orientation of the strained quantum well layer is tilted at least 1° from the {111} direction of the zincblende crystal structure. In the preferred embodiment of the present invention, the growth orientation is chosen to minimize the piezoelectric field in the strained quantum well layer.

摘要翻译： 一种具有多个GaN基半导体层的光半导体器件，其含有应变量子阱层，其中应变量子阱层具有取决于量子层生长时应变量子阱层的取向的压电场。 在本发明中，应变量子阱层以压电场小于压电场强度的最大值作为取向的方向生长。 在具有纤锌矿晶体结构的GaN基半导体层的器件中，应变量子阱层的生长方向从纤锌矿晶体结构的{0001}方向倾斜至少1°。 在具有锌辉石晶体结构的GaN基半导体层的器件中，应变量子阱层的生长取向从闪锌矿晶体结构的{111}方向倾斜至少1°。 在本发明的优选实施例中，选择生长方向以最小化应变量子阱层中的压电场。

公开(公告)号：US06569704B1

公开(公告)日：2003-05-27

申请号：US09717647

申请日：2000-11-21

申请人： Tetsuya Takeuchi ,  Norihide Yamada ,  Hiroshi Amano ,  Isamu Akasaki

发明人： Tetsuya Takeuchi ,  Norihide Yamada ,  Hiroshi Amano ,  Isamu Akasaki

IPC分类号： H01L2118

CPC分类号： H01L33/32 ,  B82Y20/00 ,  H01L33/16 ,  H01L33/18 ,  H01L33/24 ,  H01S5/021 ,  H01S5/0213 ,  H01S5/3201 ,  H01S5/3202 ,  H01S5/343 ,  H01S5/34333

摘要： An optical semiconductor device having a plurality of GaN-based semiconductor layers containing a strained quantum well layer in which the strained quantum well layer has a piezoelectric field that depends on the orientation of the strained quantum well layer when the quantum layer is grown. In the present invention, the strained quantum well layer is grown with an orientation at which the piezoelectric field is less than the maximum value of the piezoelectric field strength as a function of the orientation. In devices having GaN-based semiconductor layers with a wurtzite crystal structure, the growth orientation of the strained quantum well layer is tilted at least 1° from the {0001} direction of the wurtzite crystal structure. In devices having GaN-based semiconductor layers with a zincblende crystal structure, the growth orientation of the strained quantum well layer is tilted at least 1° from the {111} direction of the zincblende crystal structure. In the preferred embodiment of the present invention, the growth orientation is chosen to minimize the piezoelectric field in the strained quantum well layer.

摘要翻译： 一种具有多个GaN基半导体层的光半导体器件，其含有应变量子阱层，其中应变量子阱层具有取决于量子层生长时应变量子阱层的取向的压电场。 在本发明中，应变量子阱层以压电场小于压电场强度的最大值作为取向的方向生长。 在具有纤锌矿晶体结构的GaN基半导体层的器件中，应变量子阱层的生长方向从纤锌矿晶体结构的{0001}方向倾斜至少1°。 在具有锌辉石晶体结构的GaN基半导体层的器件中，应变量子阱层的生长取向从闪锌矿晶体结构的{111}方向倾斜至少1°。 在本发明的优选实施例中，选择生长方向以最小化应变量子阱层中的压电场。

公开(公告)号：US06849472B2

公开(公告)日：2005-02-01

申请号：US09992192

申请日：2001-11-13

申请人： Michael R. Krames ,  Tetsuya Takeuchi ,  Norihide Yamada ,  Hiroshi Amano ,  Isamu Akasaki

发明人： Michael R. Krames ,  Tetsuya Takeuchi ,  Norihide Yamada ,  Hiroshi Amano ,  Isamu Akasaki

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L31/18 ,  H01L33/00 ,  H01L33/06 ,  H01L33/16 ,  H01L33/18 ,  H01L33/24 ,  H01L33/32 ,  H01S5/02 ,  H01S5/32 ,  H01S5/343 ,  H01L21/00

CPC分类号： H01L33/16 ,  B82Y20/00 ,  H01L21/0237 ,  H01L21/02378 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02516 ,  H01L21/0254 ,  H01L21/02609 ,  H01L31/1844 ,  H01L31/1852 ,  H01L33/0062 ,  H01L33/06 ,  H01L33/18 ,  H01L33/24 ,  H01L33/32 ,  H01S5/021 ,  H01S5/0213 ,  H01S5/3201 ,  H01S5/3202 ,  H01S5/343 ,  H01S5/34333 ,  Y02E10/544

摘要： A method for fabricating a light-emitting semiconductor device including a III-Nitride quantum well layer includes selecting a facet orientation of the quantum well layer to control a field strength of a piezoelectric field and/or a field strength of a spontaneous electric field in the quantum well layer, and growing the quantum well layer with the selected facet orientation. The facet orientation may be selected to reduce the magnitude of a piezoelectric field and/or the magnitude of a spontaneous electric field, for example. The facet orientation may also be selected to control or reduce the magnitude of the combined piezoelectric and spontaneous electric field strength.

摘要翻译： 一种制造包括III-氮化物量子阱层的发光半导体器件的方法包括选择量子阱层的面取向以控制压电场的场强和/或自发电场的场强 量子阱层，并用选定的面取向生长量子阱层。 例如，可以选择小面取向以减小压电场的大小和/或自发电场的大小。 也可以选择面取向以控制或减小组合的压电和自发电场强度的大小。

公开(公告)号：US5239188A

公开(公告)日：1993-08-24

申请号：US971208

申请日：1992-11-04

申请人： Tetsuya Takeuchi ,  Hiroshi Amano ,  Isamu Akasaki ,  Atsushi Watanabe ,  Katsuhide Manabe

发明人： Tetsuya Takeuchi ,  Hiroshi Amano ,  Isamu Akasaki ,  Atsushi Watanabe ,  Katsuhide Manabe

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L29/20 ,  H01L29/201 ,  H01L33/00 ,  H01L33/32 ,  H01L33/34 ,  H01L33/40 ,  H01S5/02 ,  H01S5/323

CPC分类号： H01L33/32 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L29/201 ,  H01L33/007 ,  H01L29/2003 ,  Y10S148/065 ,  Y10S148/113 ,  Y10S438/933

摘要： Disclosed are a gallium nitride type semiconductor device that has a single crystal of (Ga.sub.l-x Al.sub.x).sub.l-y In.sub.y N, which suppresses the occurrence of crystal defects and thus has very high crystallization and considerably excellent flatness, and a method of fabricating the same. The gallium nitride type semiconductor device comprises a silicon substrate, an intermediate layer consisting of a compound containing at least aluminum and nitrogen and formed on the silicon substrate, and a crystal layer of (Ga.sub.l-x Al.sub.x).sub.l-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, excluding the case of x=1 and y=0). According to the method of fabricating a gallium nitride base semiconductor device, a silicon single crystal substrate is kept at a temperature of 400 to 1300.degree. C. and is held in the atmosphere where a metaloganic compound containing at least aluminum and a nitrogen-containing compound are present to form a thin intermediate layer containing at least aluminum and nitrogen on a part or the entirety of the surface of the single crystal substrate, and then at least one layer or multiple layers of a single crystal of (Ga.sub.l- x Al.sub.x).sub.l-y In.sub.y N are formed on the intermediate layer.

公开(公告)号：US06537513B1

公开(公告)日：2003-03-25

申请号：US09562978

申请日：2000-04-27

申请人： Hiroshi Amano ,  Tetsuya Takeuchi ,  Isamu Akasaki

发明人： Hiroshi Amano ,  Tetsuya Takeuchi ,  Isamu Akasaki

IPC分类号： C01B3326

CPC分类号： H01L33/007 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/205

摘要： A substrate for fabricating semiconductor devices based on Group III semiconductors and the method for making the same. A substrate according to the present invention includes a base substrate, a first buffer layer, and a first single crystal layer. The first buffer layer includes a Group III material deposited on the base substrate at a temperature below that at which the Group III material crystallizes. The Group III material is crystallized by heating the buffer layer to a temperature above that at which the Group III material crystallizes to form a single crystal after the Group III material has been deposited. The first single crystal layer includes a Group III-V semiconducting material deposited on the first buffer layer at a temperature above that at which the Group III semiconducting material crystallizes. In one embodiment of the present invention, a second buffer layer and a second single crystal layer are deposited on the first single crystal layer. The second buffer layer includes a Group III material deposited on the first single crystal layer at a temperature below that at which the Group III material crystallizes. The Group III material is then crystallized by heating the buffer layer to a temperature above that at which the Group III material crystallizes to form a single crystal. The second single crystal layer includes a Group III-V semiconducting material deposited on the second buffer layer at a temperature above that at which the Group III semiconducting material crystallizes.

摘要翻译： 一种用于制造基于III族半导体的半导体器件的衬底及其制造方法。 根据本发明的基板包括基底，第一缓冲层和第一单晶层。 第一缓冲层包括在低于III族材料结晶温度的温度下沉积在基底基材上的III族材料。 第III组材料通过将缓冲层加热至高于第III族材料结晶后形成单晶的温度而结晶，此后III族材料已沉积。 第一单晶层包括在高于III族半导体材料结晶温度的温度下沉积在第一缓冲层上的III-V族半导体材料。 在本发明的一个实施例中，在第一单晶层上沉积第二缓冲层和第二单晶层。 第二缓冲层包括沉积在第一单晶层上的III族材料，其温度低于III族材料结晶的温度。 然后通过将缓冲层加热到高于III族材料结晶以形成单晶的温度，使第III族材料结晶。 第二单晶层包括在高于III族半导体材料结晶的温度的第二缓冲层上沉积的III-V族半导体材料。

公开(公告)号：US06534791B1

公开(公告)日：2003-03-18

申请号：US09856724

申请日：2001-09-06

申请人： Nobuaki Hayashi ,  Tetsuya Takeuchi ,  Hiroshi Amano ,  Isamu Akasaki

发明人： Nobuaki Hayashi ,  Tetsuya Takeuchi ,  Hiroshi Amano ,  Isamu Akasaki

IPC分类号： H01L2906

CPC分类号： H01L21/0242 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254

摘要： A nitride semiconductor epitaxial substrate includes a low-temperature-deposited buffer layer, the composition of which is AlxGa1−xN, where 0≦x≦1, and a single crystalline layer, the composition of which is AlyGa1−yN, where 0>y≦1. The single crystalline layer is deposited directly over the low-temperature-deposited buffer layer, wherein the buffer layer has a mole fraction x satisfying (y−0.3)≦x>y.

摘要翻译： 氮化物半导体外延衬底包括其组成为Al x Ga 1-x N的低温沉积缓冲层，其中0 <= x <= 1，以及组成为Al y Ga 1-y N的单晶层，其中0 > y <= 1。 单晶层直接沉积在低温沉积缓冲层上，其中缓冲层的摩尔分数x满足（y-0.3）≤y> y。

公开(公告)号：US5389571A

公开(公告)日：1995-02-14

申请号：US46960

申请日：1993-04-16

申请人： Tetsuya Takeuchi ,  Hiroshi Amano ,  Isamu Akasaki ,  Atsushi Watanabe ,  Katsuhide Manabe

发明人： Tetsuya Takeuchi ,  Hiroshi Amano ,  Isamu Akasaki ,  Atsushi Watanabe ,  Katsuhide Manabe

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L29/20 ,  H01L29/201 ,  H01L33/00 ,  H01L33/32 ,  H01L33/34 ,  H01L33/40 ,  H01S5/02 ,  H01S5/323

CPC分类号： H01L33/32 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L29/201 ,  H01L33/007 ,  H01L29/2003 ,  Y10S148/065 ,  Y10S148/113 ,  Y10S438/933

摘要： Disclosed are a gallium nitride type semiconductor device that has a single crystal of (Ga.sub.1-x Al.sub.x).sub.1-y In.sub.y N, which suppresses the occurrence of crystal defects and thus has very high crystallization and considerably excellent flatness, and a method of fabricating the same. The gallium nitride type semiconductor device comprises a silicon substrate, an intermediate layer consisting of a compound containing at least aluminum and nitrogen and formed on the silicon substrate, and a crystal layer of (Ga.sub.1-x Al.sub.x).sub.1-y In.sub.y N (0.ltoreq.x.gtoreq.1, 0.ltoreq.y.ltoreq.1, excluding the case of x=1 and y=0). According to the method of fabricating a gallium nitride base semiconductor device, a silicon single crystal substrate is kept at a temperature of 400.degree. to 1300.degree. C. and is held in the atmosphere where a metaloganic compound containing at least aluminum and a nitrogen-containing compound are present to form a thin intermediate layer containing at least aluminum and nitrogen on a part or the entirety of the surface of the single crystal substrate, and then at least one layer or multiple layers of a single crystal of (Ga.sub.1-x Al.sub.x).sub. 1-y In.sub.y N are formed on the intermediate layer.

摘要翻译： 公开了具有（Ga1-xAlx）1-yInyN的单晶的氮化镓型半导体器件及其制造方法，其抑制晶体缺陷的发生，因此具有非常高的结晶度和相当优异的平坦度。 氮化镓型半导体器件包括硅衬底，由至少包含铝和氮并且形成在硅衬底上的化合物组成的中间层和（Ga1-xAlx）1-yInyN（0≤x≤1）的晶体层 > / = 1，0

公开(公告)号：US20130330913A1

公开(公告)日：2013-12-12

申请号：US14001454

申请日：2011-02-25

申请人： Motoaki Iwaya ,  Hiroshi Amano ,  Isamu Akasaki

发明人： Motoaki Iwaya ,  Hiroshi Amano ,  Isamu Akasaki

IPC分类号： H01L21/02

CPC分类号： H01L21/02365 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003 ,  H01L33/007 ,  H01L33/0079 ,  H01L2224/16225

摘要： A structure includes a substrate, a template layer formed on the surface of the substrate and including an AlN layer, and a device structure portion formed by stacking AlGaN semiconductor layers on the template layer. For the structure, the AlN layer is irradiated from a side close to the substrate with a laser light with a wavelength by which the laser light passes through the substrate and the laser light is absorbed by the AlN layer, in a state in which the AlN layer receives compressive stress from the substrate. This allows the AlN layer to expand more than the surface of the substrate on at least an interface between the AlN layer and the substrate so as to increase the compressive stress, in order to remove the substrate from the AlN layer.

摘要翻译： 一种结构包括基板，形成在基板的表面上并包括AlN层的模板层，以及通过在模板层上堆叠AlGaN半导体层而形成的器件结构部分。 对于该结构，通过激光通过基板的激光的激光和激光被AlN层吸收，AlN层从靠近基板的一侧照射，其中AlN 层从基底接收压应力。 这允许AlN层在AlN层和衬底之间的至少一个界面上比衬底的表面更多地膨胀，以便增加压缩应力，以便从AlN层去除衬底。