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    Semiconductor laser
    2.
    发明授权
    Semiconductor laser 失效
    半导体激光器

    公开(公告)号：US5805628A

    公开(公告)日：1998-09-08

    申请号：US735637

    申请日：1996-10-23

    申请人： Shoichi Karakida ,  Norio Hayafuji ,  Tatsuya Kimura ,  Motoharu Miyashita ,  Hirotaka Kizuki ,  Takashi Nishimura

    发明人： Shoichi Karakida ,  Norio Hayafuji ,  Tatsuya Kimura ,  Motoharu Miyashita ,  Hirotaka Kizuki ,  Takashi Nishimura

    IPC分类号： H01S5/00 ,  H01S5/10 ,  H01S5/16 ,  H01S5/20 ,  H01S5/223 ,  H01S5/343 ,  H01S3/19

    CPC分类号： B82Y20/00 ,  H01S5/10 ,  H01S5/16 ,  H01S5/2231 ,  H01S5/1064 ,  H01S5/2077 ,  H01S5/3432

    摘要： A semiconductor laser device includes a semiconductor substrate of a first conductivity type; opposed light emitting facets; a double heterojunction structure disposed on the semiconductor substrate and including an optical waveguide that extends between the facets and comprises a light emitting region and a lens region, the lens region being between the light emitting region and one of the facets, the double heterojunction structure including a plurality of AlGaAs series compound semiconductor layers which are thicker in the light emitting region than in the lens region; and a current blocking structure disposed on both sides of the double heterojunction structure and including a lower AlGaAs series compound semiconductor layer of the first conductivity type, an intermediate AlGaAs series compound semiconductor layer of a second conductivity type, opposite the first conductivity type, and an upper AlGaAs series compound semiconductor layer of the first conductivity type. Therefore, a reactive current that does not contribute to laser oscillation is prevented from flowing through the current blocking structure.

    摘要翻译： 半导体激光器件包括第一导电类型的半导体衬底; 相对的发光面; 双异质结结构，其设置在所述半导体衬底上，并且包括在所述面之间延伸并且包括发光区域和透镜区域的光波导，所述透镜区域在所述发光区域和所述面之一之间，所述双异质结结构包括 多个AlGaAs系化合物半导体层，其在发光区域比透镜区域厚; 以及设置在双异质结结构的两侧上的电流阻挡结构，并且包括第一导电类型的下AlGaAs系化合物半导体层，与第一导电类型相反的第二导电类型的中间AlGaAs系化合物半导体层和 第一导电类型的上AlGaAs系化合物半导体层。 因此，防止无助于激光振荡的无功电流流过电流阻挡结构。

    High electron mobility transistor
    4.
    发明授权
    High electron mobility transistor 失效
    高电子迁移率晶体管

    公开(公告)号：US5796127A

    公开(公告)日：1998-08-18

    申请号：US915791

    申请日：1997-08-21

    申请人： Norio Hayafuji ,  Yoshitsugu Yamamoto ,  Hirotaka Kizuki

    发明人： Norio Hayafuji ,  Yoshitsugu Yamamoto ,  Hirotaka Kizuki

    IPC分类号： H01L29/812 ,  H01L21/203 ,  H01L21/314 ,  H01L21/324 ,  H01L21/335 ,  H01L21/338 ,  H01L23/31 ,  H01L29/36 ,  H01L29/778 ,  H01L29/201 ,  H01L29/737

    CPC分类号： H01L29/66462 ,  H01L21/314 ,  H01L21/3245 ,  H01L23/3185 ,  H01L29/365 ,  H01L2924/0002

    摘要： A method of fabricating a semiconductor device includes forming a first mixed crystal semiconductor layer of AlAs and InAs; applying a solution containing a material easily combining with fluorine to the surface of the first mixed crystal semiconductor layer exposed to the atmosphere so that the material combines with fluorine that sticks to the surface of the first mixed crystal semiconductor layer; and annealing the first mixed crystal semiconductor layer in a vacuum. In this method, since the fluorine on the surface of the first mixed crystal semiconductor layer exposed to the atmosphere combines with the material included in the solution and is removed together with the material, a first mixed crystal semiconductor layer having no fluorine is produced. Therefore, unwanted infiltration of fluorine into the first mixed crystal semiconductor layer is avoided, resulting in a highly reliable semiconductor device with desired characteristics.

    摘要翻译： 制造半导体器件的方法包括：形成AlAs和InAs的第一混晶半导体层; 将含有容易与氟结合的材料的溶液施加到暴露于大气的第一混晶半导体层的表面，使得该材料与粘附在第一混晶半导体层表面的氟结合; 以及在真空中退火所述第一混晶半导体层。 在该方法中，由于暴露于大气中的第一混晶半导体层的表面上的氟与包含在溶液中的材料结合，与材料一起被除去，因此产生不含氟的第一混晶半导体层。 因此，避免了氟进入第一混晶半导体层的不必要的渗入，导致具有所需特性的高度可靠的半导体器件。

    Infrared detector having active regions and isolating regions formed of CdHgTe
    5.
    发明授权
    Infrared detector having active regions and isolating regions formed of CdHgTe 失效
    具有活性区域和由CdHgTe形成的隔离区域的红外探测器

    公开(公告)号：US5602414A

    公开(公告)日：1997-02-11

    申请号：US260791

    申请日：1994-06-16

    申请人： Kotaro Mitsui ,  Zenpei Kawazu ,  Kazuo Mizuguchi ,  Seiji Ochi ,  Yuji Ohkura ,  Norio Hayafuji ,  Hirotaka Kizuki ,  Mari Tsugami ,  Akihiro Takami ,  Manabu Katoh

    发明人： Kotaro Mitsui ,  Zenpei Kawazu ,  Kazuo Mizuguchi ,  Seiji Ochi ,  Yuji Ohkura ,  Norio Hayafuji ,  Hirotaka Kizuki ,  Mari Tsugami ,  Akihiro Takami ,  Manabu Katoh

    IPC分类号： H01L27/14 ,  H01L27/146 ,  H01L31/10 ,  H01L31/00

    CPC分类号： H01L27/14649

    摘要： In a method for fabricating an infrared detector, initially, a CdHgTe layer of a first conductivity type is produced on a front surface of a semiconductor substrate, a plurality of spaced apart CdHgTe regions of a second conductivity type, opposite the first conductivity type, are produced at the surface of the first conductivity type CdHgTe layer, and part of the surface of the first conductivity type CdHgTe layer between the second conductivity type CdHgTe regions is selectively irradiated with a charged particle beam to evaporate Hg atoms from that part, whereby a CdHgTe separation region of the first conductivity type and having a Cd composition larger than that of the first conductivity type CdHgTe layer is produced penetrating through the first conductivity type CdHgTe layer and surrounding each of the second conductivity type CdHgTe regions. Therefore, a highly-integrated high-resolution infrared detector with no crosstalk between pixels is achieved.

    摘要翻译： 在红外线检测器的制造方法中，首先，在半导体基板的正面形成有与第一导电型相反的多个第二导电类型的间隔开的CdHgTe区域的第一导电型CdHgTe层， 在第一导电型CdHgTe层的表面产生，并且第二导电型CdHgTe区域之间的第一导电类型CdHgTe层的表面的一部分被带电粒子束选择性地照射，以从该部分蒸发Hg原子，由此CdHgTe 产生具有比第一导电型CdHgTe层的Cd组分大的第一导电类型的分离区，穿过第一导电型CdHgTe层并围绕每个第二导电型CdHgTe区。 因此，实现了在像素之间没有串扰的高度集成的高分辨率红外检测器。

    Method for producing semiconductor device
    6.
    发明授权
    Method for producing semiconductor device 失效
    半导体器件的制造方法

    公开(公告)号：US5316967A

    公开(公告)日：1994-05-31

    申请号：US975109

    申请日：1992-11-12

    申请人： Nobuaki Kaneno ,  Hirotaka Kizuki ,  Norio Hayafuji ,  Tetsuo Shiba ,  Hitoshi Tada

    发明人： Nobuaki Kaneno ,  Hirotaka Kizuki ,  Norio Hayafuji ,  Tetsuo Shiba ,  Hitoshi Tada

    IPC分类号： H01L21/20 ,  H01L21/308 ,  H01S5/20 ,  H01S5/223 ,  H01S5/227 ,  H01S5/323

    CPC分类号： H01L21/3081 ,  H01L21/02392 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02505 ,  H01L21/02546 ,  H01L21/0262 ,  H01S5/2231 ,  H01S2304/04 ,  H01S5/2081 ,  H01S5/2277 ,  H01S5/32325

    摘要： In a method for producing a semiconductor device, a first semiconductor layer is epitaxially grown on a semiconductor substrate, an insulating film pattern is formed on the first semiconductor layer, and portions of the first semiconductor layer are removed by wet etching using the insulating film pattern as a mask to leave a ridge having a reverse mesa shape and a width. Ends of the insulating film pattern are removed by etching to approximately the width of the ridge, a second semiconductor layer is epitaxially grown on opposite sides of the ridge, and a third semiconductor layer is epitaxially grown on the ridge and the second semiconductor layer. The second semiconductor layer is evenly grown without concave portions at opposite sides of the ridge. In addition, the third semiconductor layer is evenly grown on the ridge and the second semiconductor layer, and an electrode reliably connects the surface of the third semiconductor layer. A semiconductor device with good performance and high reliability is reproducibly manufactured.

    摘要翻译： 在制造半导体器件的方法中，在半导体衬底上外延生长第一半导体层，在第一半导体层上形成绝缘膜图案，并且通过使用绝缘膜图案的湿蚀刻去除第一半导体层的部分 作为掩模，离开具有反台面形状和宽度的脊。 绝缘膜图案的端部通过蚀刻到脊的宽度去除，在脊的相对侧上外延生长第二半导体层，并且在脊和第二半导体层上外延生长第三半导体层。 第二半导体层在脊的相对侧均匀生长而没有凹部。 此外，第三半导体层均匀地生长在脊和第二半导体层上，并且电极可靠地连接第三半导体层的表面。 可重复地制造具有良好性能和高可靠性的半导体器件。

    Compound semiconductor structure including p-type and n-type regions doped with carbon
    7.
    发明授权
    Compound semiconductor structure including p-type and n-type regions doped with carbon 失效
    包括掺杂有碳的p型和n型区的化合物半导体结构

    公开(公告)号：US5315133A

    公开(公告)日：1994-05-24

    申请号：US928746

    申请日：1992-08-13

    申请人： Norio Hayafuji

    发明人： Norio Hayafuji

    IPC分类号： H01L21/205 ,  H01L21/331 ,  H01L29/205 ,  H01L29/73 ,  H01L29/737 ,  H01S5/00 ,  H01L33/00

    CPC分类号： H01L21/0262 ,  H01L21/02546 ,  H01L21/02576 ,  H01L21/02579 ,  Y10S438/925

    摘要： While depositing a III-V compound semiconductor layer from a vapor, carbon is added to group III and V elements to produce a p type conductivity region in the depositing semiconductor layer. Then, a small amount of n type dopant is added to the group III and V elements together with the carbon to produce an n type conductivity region in the depositing semiconductor layer. A sharp and precisely controlled doping profile is produced in the vicinity of a p-n junction, resulting in a semiconductor device having good initial performance and high reliability.

    摘要翻译： 在从蒸气中沉积III-V化合物半导体层的同时，将碳添加到III族和V族元素中，以在沉积半导体层中产生p型导电性区域。 然后，少量的n型掺杂剂与碳一起添加到III族和V族元素中，以在沉积半导体层中产生n型导电性区域。 在p-n结附近产生尖锐和精确控制的掺杂分布，导致半导体器件具有良好的初始性能和高可靠性。

    Method for forming a film by selective area MOCVD growth
    8.
    发明授权
    Method for forming a film by selective area MOCVD growth 失效
    通过选择性区域MOCVD生长形成膜的方法

    公开(公告)号：US5728215A

    公开(公告)日：1998-03-17

    申请号：US555707

    申请日：1995-11-14

    申请人： Takushi Itagaki ,  Masayoshi Takemi ,  Norio Hayafuji

    发明人： Takushi Itagaki ,  Masayoshi Takemi ,  Norio Hayafuji

    IPC分类号： H01L21/205 ,  C23C16/04 ,  H01S5/00 ,  C30B25/04

    CPC分类号： C23C16/042

    摘要： A method for forming a film by selective area growth by MDCVD technique includes forming a mask on a semiconductor substrate having a (100) plane, the mask having a mask opening to selectively growing a compound semiconductor layer, and a slit which is narrower than the mask opening in width and controls the growth rate of the compound semiconductor layer at the mask opening; and selectively growing the compound semiconductor layer at a growth rate which is on the mask in the mask opening and the slit.

    摘要翻译： 通过MDCVD技术通过选择性区域生长形成膜的方法包括在具有（100）面的半导体衬底上形成掩模，掩模具有掩模开口以选择性地生长化合物半导体层，以及狭缝比 掩模开口宽度并控制化合物半导体层在掩模开口处的生长速率; 并且以掩模开口和狭缝中的掩模上的生长速率选择性地生长化合物半导体层。

    Method of producing a semiconductor structure including a recrystallized film
    9.
    发明授权
    Method of producing a semiconductor structure including a recrystallized film 失效
    制造包括再结晶膜的半导体结构的方法

    公开(公告)号：US5467731A

    公开(公告)日：1995-11-21

    申请号：US322375

    申请日：1994-10-13

    申请人： Satoshi Arimoto ,  Norio Hayafuji ,  Mikio Deguchi ,  Satoshi Hamamoto

    发明人： Satoshi Arimoto ,  Norio Hayafuji ,  Mikio Deguchi ,  Satoshi Hamamoto

    IPC分类号： H01L21/208 ,  H01L21/20 ,  C30B13/20

    CPC分类号： H01L21/2022

    摘要： A method for producing a semiconductor structure including a semiconductor film formed on a semiconductor substrate body via an insulating film includes: laminating a first insulating film, a first semiconductor film, and a second insulating film on the semiconductor substrate successively; forming stripe-shaped second semiconductor films of predetermined width on the second insulating film arranged periodically at a predetermined interval and covering these second semiconductor films with a third insulating film; performing zone melting recrystallization of the first semiconductor film from one end of the substrate to the opposite end along the stripe direction of the stripe-shaped second semiconductor film; etching the third insulating film and portions of the second insulating film not sandwiched by the first and second semiconductor films; oxidizing portions of the second semiconductor film and the first semiconductor film exposed in the etching step and etching and removing the second insulating film remaining after the previous etching. Thus, a semiconductor substrate including a recrystallized semiconductor film having removed sub-grain-boundaries generated during the zone melting recrystallization, is obtained by fewer process steps than in the prior art.

    摘要翻译： 一种用于制造半导体结构的方法，该半导体结构包括通过绝缘膜形成在半导体衬底本体上的半导体膜，包括：依次在半导体衬底上层叠第一绝缘膜，第一半导体膜和第二绝缘膜; 在预定间隔周期性地布置的第二绝缘膜上形成预定宽度的条状第二半导体膜，并用第三绝缘膜覆盖这些第二半导体膜; 从所述基板的一端到所述条状的第二半导体膜的条带方向的相反端进行区域熔融再结晶的第一半导体膜; 蚀刻第三绝缘膜和未被第一和第二半导体膜夹持的第二绝缘膜的部分; 在蚀刻步骤中暴露的第二半导体膜和第一半导体膜的氧化部分，并蚀刻除去在先前蚀刻之后残留的第二绝缘膜。 因此，通过比现有技术更少的工艺步骤获得包括在区域熔融再结晶期间产生的去除亚晶界的再结晶半导体膜的半导体衬底。