公开(公告)号：US20120067636A1

公开(公告)日：2012-03-22

申请号：US13233851

申请日：2011-09-15

申请人： Jin Gu KIM ,  Mi Jin KIM ,  Young Ho KIM ,  Seung Wook PARK ,  Hee Kon LEE ,  Young Do KWEON

发明人： Jin Gu KIM ,  Mi Jin KIM ,  Young Ho KIM ,  Seung Wook PARK ,  Hee Kon LEE ,  Young Do KWEON

IPC分类号： H05K1/16 ,  H05K1/11

CPC分类号： H05K3/4694 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K1/112 ,  H05K3/3436 ,  H05K2203/041 ,  H01L2224/0401

摘要： Disclosed herein is an interposer-embedded printed circuit board, including: a substrate including a cavity formed in one side thereof and having a predetermined height in a thickness direction of the substrate; an interposer disposed in the cavity and including a wiring region and an insulating region; and a circuit layer formed in the substrate and including a connection pattern connected with one side of the wiring region. The interposer-embedded printed circuit board is advantageous in that an interposer is embedded in a substrate, so that the thickness of a semiconductor package can be reduced, thereby keeping up with the trend of slimming the semiconductor package.

摘要翻译： 本发明公开了一种嵌入式嵌入式印刷电路板，包括：基板，其具有在其一面形成并在基板的厚度方向上具有预定高度的空腔; 插入器，其设置在所述空腔中并且包括布线区域和绝缘区域; 以及形成在所述基板中并且包括与所述布线区域的一侧连接的连接图案的电路层。 嵌入式嵌入式印刷电路板的优点在于，嵌入在衬底中，从而可以减小半导体封装的厚度，从而跟上半导体封装变窄的趋势。

公开(公告)号：US20120084977A1

公开(公告)日：2012-04-12

申请号：US13268252

申请日：2011-10-07

申请人： Seung Wook PARK ,  Young Do KWEON ,  Ju Pyo HONG ,  Seung Wan SHIN ,  Kyung Seob OH

发明人： Seung Wook PARK ,  Young Do KWEON ,  Ju Pyo HONG ,  Seung Wan SHIN ,  Kyung Seob OH

IPC分类号： H05K3/30

CPC分类号： H05K3/284 ,  H01L23/49531 ,  H01L23/552 ,  H01L2224/16225 ,  H01L2924/09701 ,  H05K3/202 ,  H05K3/363 ,  H05K2201/0715 ,  H05K2201/10924 ,  H05K2203/1316 ,  Y10T29/4913

摘要： Disclosed herein is a method of manufacturing a block module including: mounting an electronic part on a base substrate on which a ground terminal is formed; forming a lead frame to extend to the outside of the base substrate from the ground terminal; connecting a flexible printed circuit to a circuit layer on the base substrate; forming a mold to surround the base substrate; cutting the lead frame and exposing the cut surface of the lead frame to the outside of the mold; and forming a metal coating layer connected to the lead frame on the mold, whereby the metal coating layer is formed to surround the mold to interrupt the electromagnetic waves and the metal coating layer is connected to the ground terminal by the lead frame to make the process simple.

摘要翻译： 本文公开了一种制造块模块的方法，包括：将电子部件安装在其上形成有接地端子的基底基板上; 形成引线框架，从接地端子延伸到基底基板的外部; 将柔性印刷电路连接到基底基板上的电路层; 形成包围所述基底基板的模具; 切割引线框架并将引线框架的切割表面暴露于模具的外部; 并且形成与模具上的引线框架连接的金属涂层，由此形成金属涂层以围绕模具以中断电磁波，并且金属涂层通过引线框架连接到接地端子，以使该工艺 简单。

公开(公告)号：US20120295404A1

公开(公告)日：2012-11-22

申请号：US13557362

申请日：2012-07-25

申请人： Joon Seok KANG ,  Young Do KWEON ,  Seung Wook PARK ,  Jong Yun LEE ,  Kyung Seob OH

发明人： Joon Seok KANG ,  Young Do KWEON ,  Seung Wook PARK ,  Jong Yun LEE ,  Kyung Seob OH

IPC分类号： H01L21/58

CPC分类号： H01L23/5389 ,  H01L23/49827 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/0231 ,  H01L2224/24226 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/185 ,  H05K2201/10674 ,  H05K2203/1469 ,  H01L2924/00

摘要： A method of manufacturing a semiconductor package, the method including: forming an insulating layer on a board; forming an electrode pattern portion by redistribution plating in order to make a circuit connection on the insulating layer; manufacturing a semiconductor chip by forming a protecting portion on the electrode pattern portion such that a portion of the electrode pattern portion is exposed; and mounting the semiconductor chip on a receiving space of a circuit board and electrically connecting the semiconductor chip to the circuit board.

摘要翻译： 一种制造半导体封装的方法，所述方法包括：在板上形成绝缘层; 通过再分布电镀形成电极图案部分，以在绝缘层上形成电路连接; 通过在所述电极图案部分上形成保护部分使得所述电极图案部分的一部分露出而制造半导体芯片; 并将半导体芯片安装在电路板的接收空间上并将半导体芯片电连接到电路板。

公开(公告)号：US20120073870A1

公开(公告)日：2012-03-29

申请号：US13213984

申请日：2011-08-19

申请人： Hyung Jin JEON ,  Young Do KWEON ,  Seung Wook PARK ,  Seon Hee MOON

发明人： Hyung Jin JEON ,  Young Do KWEON ,  Seung Wook PARK ,  Seon Hee MOON

IPC分类号： H05K1/11 ,  H01K3/10

CPC分类号： H05K1/115 ,  H01L21/486 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/0298 ,  H05K1/036 ,  H05K3/42 ,  H05K3/4602 ,  H05K3/4605 ,  H05K2201/0166 ,  H05K2201/0175 ,  H05K2201/09563 ,  H05K2201/10378 ,  H05K2203/0594 ,  Y10T29/49117 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  H01L2924/00

摘要： Disclosed is a printed circuit board, including a base member, an insulating layer formed on each of both surfaces of the base member so that the surfaces of the base member are flattened, a circuit layer formed on the insulating layer, and a via for connecting the circuit layer formed on one surface of the base member with the circuit layer formed on the other surface of the base member. A method of manufacturing the printed circuit board is also provided.

摘要翻译： 公开了一种印刷电路板，包括基底构件，形成在基底构件的两个表面中的每一个上的绝缘层，使得基底构件的表面变平，形成在绝缘层上的电路层和用于连接的通孔 所述电路层形成在所述基底构件的一个表面上，所述电路层形成在所述基底构件的另一个表面上。 还提供了制造印刷电路板的方法。

公开(公告)号：US20120161323A1

公开(公告)日：2012-06-28

申请号：US13040741

申请日：2011-03-04

申请人： Yoon Su KIM ,  Seon Hee MOON ,  Seung Wan SHIN ,  Young Do KWEON

发明人： Yoon Su KIM ,  Seon Hee MOON ,  Seung Wan SHIN ,  Young Do KWEON

IPC分类号： H01L23/48 ,  H01L21/28

CPC分类号： H01L23/498 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

摘要： Disclosed herein are a substrate for a package and a method for manufacturing the same. The substrate for the package according to the present invention includes: a base substrate; a photosensitive insulating layer formed on one surface of the base substrate and having a roughness formed on a surface thereof; and a seed layer formed on one surface of the photosensitive insulating layer.

摘要翻译： 本文公开了一种用于封装的基板及其制造方法。 根据本发明的用于包装的基板包括：基底; 形成在所述基底基板的一个表面上并且在其表面上形成粗糙度的感光绝缘层; 以及形成在感光绝缘层的一个表面上的种子层。

公开(公告)号：US20130005089A1

公开(公告)日：2013-01-03

申请号：US13607393

申请日：2012-09-07

申请人： Joon Seok KANG ,  Sung YI ,  Young Do KWEON

发明人： Joon Seok KANG ,  Sung YI ,  Young Do KWEON

IPC分类号： H01L21/78

CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/4334 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01073 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05599

摘要： Disclosed herein are a wafer level package for heat dissipation and a method of manufacturing the same. The wafer level package includes a heat dissipation plate including a cavity and a hole, a die including a pad disposed in the cavity of the heat dissipation plate in a face-up manner, a thermal conductive adhesive disposed between the die and an inner wall of the cavity and disposed in the hole, and a redistribution layer connected at one end to the pad and at the other end extended. The wafer level package protects the die from external environments and enables the die to be easily flush with the heat dissipation plate.

摘要翻译： 这里公开了用于散热的晶片级封装及其制造方法。 晶片级封装包括包括空腔和孔的散热板，包括以面朝上的方式设置在散热板的空腔中的焊盘的模具，设置在模具和内壁之间的导热粘合剂 空腔并设置在孔中，并且再分配层在一端连接到垫并且在另一端延伸。 晶圆级封装保护模具免受外部环境的影响，使模具能够轻松地与散热板齐平。

公开(公告)号：US20100133680A1

公开(公告)日：2010-06-03

申请号：US12318752

申请日：2009-01-07

申请人： Joon Seok KANG ,  Sung YI ,  Young Do KWEON

发明人： Joon Seok KANG ,  Sung YI ,  Young Do KWEON

IPC分类号： H01L23/498 ,  H01L21/78

CPC分类号： H01L23/3114 ,  H01L21/56 ,  H01L21/568 ,  H01L24/19 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/00

摘要： The present invention relates to a wafer level package and a method of manufacturing the same and a method of reusing a chip and provides a wafer level package including a chip; a removable resin layer formed to surround side surfaces and a lower surface of the chip; a molding material formed on the lower surface of the removable resin layer; a dielectric layer formed over the removable resin layer including the chip and having via holes to expose portions of the chip; redistribution lines formed on the dielectric layer including insides of the via holes to be connected to the chip; and a solder resist layer formed on the dielectric layer to expose portions of the redistribution lines. Also, the present invention provides a method of manufacturing a wafer level package and a method of reusing a chip.

摘要翻译： 本发明涉及一种晶片级封装及其制造方法以及重新使用芯片的方法，并提供了包括芯片的晶片级封装; 形成为围绕所述芯片的侧表面和下表面的可移除树脂层; 形成在可移除树脂层的下表面上的成型材料; 形成在包括所述芯片的所述可移除树脂层上的电介质层，并且具有露出芯片部分的通孔; 在包括要连接到芯片的通孔的内部的电介质层上形成的再分配线; 以及形成在所述电介质层上以暴露所述再分布线的部分的阻焊层。 另外，本发明提供一种晶片级封装的制造方法和芯片的再利用方法。

公开(公告)号：US20140035714A1

公开(公告)日：2014-02-06

申请号：US13829395

申请日：2013-03-14

申请人： Sang Moon LEE ,  Sung Kwon WI ,  Jun Hee BAE ,  Young Do KWEON ,  Yong Suk KIM

发明人： Sang Moon LEE ,  Sung Kwon WI ,  Jun Hee BAE ,  Young Do KWEON ,  Yong Suk KIM

IPC分类号： H01F3/08 ,  C01G1/02 ,  C01G53/04

CPC分类号： H01F3/08 ,  C01G1/02 ,  C01G49/0018 ,  C01G49/0063 ,  C01G53/04 ,  C01G53/40 ,  C01P2004/32 ,  C01P2004/61 ,  C01P2004/62 ,  C01P2006/10 ,  C01P2006/32 ,  H01F1/344 ,  H01F1/37 ,  H01F17/0006 ,  H01F2017/0066 ,  Y10T428/2982

摘要： Disclosed herein are a ferrite powder not including pores in a surface thereof, a method for preparing the same, and a common mode noise filter including the same as a material for a magnetic layer. The spherical ferrite powder in which the pores in the surface thereof are removed as a magnetic layer of the common mode noise filter has high density, such that dispersibility is improved, thereby making it possible to improve adhesive strength with a polymer binder to be mixed. In addition, the adhesive strength between the polymer binder and the ferrite powder is improved, such that at the time of manufacturing or mounting of a chip, a defect such as a crack generated by a thermal impact due to a lack of adhesive strength between the ferrite powder and the polymer binder may be suppressed, thereby securing the reliability with respect to the thermal impact.

摘要翻译： 本文公开了不包括其表面中的孔的铁氧体粉末，其制备方法，以及包含该磁性层的材料的共模噪声滤波器。 作为共模噪声滤波器的磁性层除去其表面中的孔的球形铁氧体粉末具有高密度，使得分散性提高，从而可以提高与要混合的聚合物粘合剂的粘合强度。 此外，改善了聚合物粘合剂和铁氧体粉末之间的粘合强度，使得在芯片的制造或安装时，由于热冲击而产生的裂纹等缺陷， 可以抑制铁氧体粉末和聚合物粘合剂，从而确保相对于热冲击的可靠性。