公开(公告)号：US6013415A

公开(公告)日：2000-01-11

申请号：US210794

申请日：1998-12-15

申请人： Kouichi Sakurai ,  Takahiro Iijima ,  Yukiko Ito ,  Hiroaki Nemoto

发明人： Kouichi Sakurai ,  Takahiro Iijima ,  Yukiko Ito ,  Hiroaki Nemoto

IPC分类号： G03F7/004 ,  C08F2/46 ,  C08F20/28 ,  G02B5/20 ,  G03F7/00 ,  G03F7/027 ,  G03F7/028 ,  G03F7/033 ,  G03C1/725

CPC分类号： G03F7/033 ,  G03F7/0007 ,  Y10S430/111 ,  Y10S430/116 ,  Y10S430/117

摘要： A radiation sensitive composition comprising (A) a colorant, (B) an alkali-soluble resin, (C) a polyfunctional monomer and (D) a photopolymerization initiator. The alkali-soluble resin (B) is a copolymer of (1) a monomer represented by the following formula (1): wherein R.sup.1 is a hydrogen atom or a methyl group, and(2) an ethylenically unsaturated monomer having at least one carboxyl group in the molecule, and optionally (3) a copolymerizable ethylenically unsaturated monomer other than the above monomers (1) and (2). The radiation sensitive composition is useful for producing a color filter for transmission-type or reflection-type color liquid crystal display devices, etc.

摘要翻译： 一种辐射敏感性组合物，其包含（A）着色剂，（B）碱溶性树脂，（C）多官能单体和（D）光聚合引发剂。 碱溶性树脂（B）是（1）由下式（1）表示的单体的共聚物：其中，R1是氢原子或甲基，（2）具有至少一个羧基的烯属不饱和单体 和（3）除了上述单体（1）和（2）以外的可共聚的烯属不饱和单体。 辐射敏感组合物可用于生产透射型或反射型彩色液晶显示装置等的滤色片。

公开(公告)号：US06180322B2

公开(公告)日：2001-01-30

申请号：US09289963

申请日：1999-04-13

申请人： Kouichi Sakurai ,  Takahiro Iijima ,  Yukiko Ito ,  Hiroaki Nemoto

发明人： Kouichi Sakurai ,  Takahiro Iijima ,  Yukiko Ito ,  Hiroaki Nemoto

IPC分类号： G03F726

CPC分类号： G03F7/322

摘要： An alkaline developing solution for a radiation sensitive composition, which has no undissolved products even when the concentration of a pigment contained in a radiation sensitive composition is high, which does not cause such problems as scum, the residue after development and re-adhesion, and which can form pixels having a sharp pattern edge. The alkaline developing solution for a radiation sensitive composition is an aqueous solution which contains (A-1) at least one inorganic alkaline compound and (A-2) at least one organic alkaline compound selected from the group consisting of alkanolamines and alkylamines or which contains the above component (A-1), the above component (A-2) and (B) at least one nonionic surfactant selected from the group consisting of etherified polyoxyethylenes and etherified polyoxyethylene-polyoxypropylene block copolymers.

摘要翻译： 即使在辐射敏感性组合物中含有的颜料的浓度高的情况下，也不会产生不溶解产物的辐射敏感性组合物的碱性显影液，不会引起浮渣，显影后残留物和再粘合等问题， 其可以形成具有尖锐图案边缘的像素。用于辐射敏感组合物的碱性显影液是含有（A-1）至少一种无机碱性化合物和（A-2）至少一种选自以下的有机碱性化合物的水溶液： 由烷基胺和烷基胺组成的组或含有上述组分（A-1），上述组分（A-2）和（B）的至少一种选自醚化的聚氧乙烯和醚化的聚氧乙烯 - 聚氧丙烯嵌段的非离子表面活性剂 共聚物。

公开(公告)号：US07314780B2

公开(公告)日：2008-01-01

申请号：US11145924

申请日：2005-06-07

申请人： Noriyoshi Shimizu ,  Akio Rokugawa ,  Takahiro Iijima

发明人： Noriyoshi Shimizu ,  Akio Rokugawa ,  Takahiro Iijima

IPC分类号： H01L23/48

CPC分类号： H05K1/162 ,  H01L23/49822 ,  H01L23/49833 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K1/112 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/09763 ,  H05K2203/135 ,  H01L2224/05599

摘要： A semiconductor package, provided with a multilayer interconnect structure, for mounting a semiconductor chip on its top surface, wherein a topmost stacked structure of the multilayer interconnect structure includes a capacitor structure, the capacitor structure having a dielectric layer comprised of a mixed electrodeposited layer of high dielectric constant inorganic filler and insulating resin and including chip connection pads for directly connecting top electrodes and bottom electrodes with electrodes of the semiconductor chip, whereby greater freedom in design of interconnect patterns can be secured, the degree of proximity of the capacitor and semiconductor chip can be greatly improved, and the package can be made smaller and lighter in weight, a method of production of the same, and a semiconductor device using this semiconductor package.

摘要翻译： 一种半导体封装，其具有多层互连结构，用于将半导体芯片安装在其顶表面上，其中所述多层互连结构的最上层堆叠结构包括电容器结构，所述电容器结构具有介电层，所述电介质层由混合电沉积层 高介电常数无机填料和绝缘树脂，并且包括用于直接连接具有半导体芯片电极的顶电极和底电极的芯片连接焊盘，从而可以确保互连图案设计的更大自由度，电容器和半导体芯片的接近程度 可以大大改善，并且可以使包装重量更小更轻，其制造方法以及使用该半导体封装的半导体器件。

公开(公告)号：US20050263874A1

公开(公告)日：2005-12-01

申请号：US11145924

申请日：2005-06-07

申请人： Noriyoshi Shimizu ,  Akio Rokugawa ,  Takahiro Iijima

发明人： Noriyoshi Shimizu ,  Akio Rokugawa ,  Takahiro Iijima

IPC分类号： H01L23/12 ,  H01L23/498 ,  H05K1/11 ,  H05K1/16 ,  H05K3/46 ,  H01L21/50 ,  H01L23/58

CPC分类号： H05K1/162 ,  H01L23/49822 ,  H01L23/49833 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K1/112 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/09763 ,  H05K2203/135 ,  H01L2224/05599

摘要： A semiconductor package, provided with a multilayer interconnect structure, for mounting a semiconductor chip on its top surface, wherein a topmost stacked structure of the multilayer interconnect structure includes a capacitor structure, the capacitor structure having a dielectric layer comprised of a mixed electrodeposited layer of high dielectric constant inorganic filler and insulating resin and including chip connection pads for directly connecting top electrodes and bottom electrodes with electrodes of the semiconductor chip, whereby greater freedom in design of interconnect patterns can be secured, the degree of proximity of the capacitor and semiconductor chip can be greatly improved, and the package can be made smaller and lighter in weight, a method of production of the same, and a semiconductor device using this semiconductor package.

摘要翻译： 一种半导体封装，其具有多层互连结构，用于将半导体芯片安装在其顶表面上，其中所述多层互连结构的最上层堆叠结构包括电容器结构，所述电容器结构具有介电层，所述电介质层由混合电沉积层 高介电常数无机填料和绝缘树脂，并且包括用于直接连接具有半导体芯片电极的顶电极和底电极的芯片连接焊盘，从而可以确保互连图案设计的更大自由度，电容器和半导体芯片的接近程度 可以大大改善，并且可以使包装重量更小更轻，其制造方法以及使用该半导体封装的半导体器件。

公开(公告)号：US06914322B2

公开(公告)日：2005-07-05

申请号：US10315468

申请日：2002-12-10

申请人： Takahiro Iijima ,  Akio Rokugawa

发明人： Takahiro Iijima ,  Akio Rokugawa

IPC分类号： H05K3/46 ,  H01L23/12 ,  H01L23/498 ,  H05K1/18 ,  H01L23/02

CPC分类号： H01L23/49822 ,  H01G4/33 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/01078 ,  H01L2924/15311 ,  H05K1/185 ,  H05K1/187

摘要： A semiconductor device including a semiconductor device package providing a capacitor in its circuit board and a semiconductor chip mounted on that package, wherein the capacitor is provided directly under a semiconductor chip mounting surface of the circuit board on which the semiconductor chip is to be mounted and the conductor circuit electrically connecting the semiconductor chip and capacitor is made the shortest distance by having the external connection terminals of the capacitor directly connected to the other surface of the connection pads exposed at one surface at the semiconductor chip mounting surface of the circuit board and to which the electrode terminals of the semiconductor chip are to be directly connected.

摘要翻译： 一种半导体器件，包括在其电路板中提供电容器的半导体器件封装和安装在该封装上的半导体芯片，其中电容器直接设置在其上要安装半导体芯片的电路板的半导体芯片安装表面下方， 电连接半导体芯片和电容器的导体电路通过使电容器的外部连接端子直接连接到在电路板的半导体芯片安装表面的一个表面处露出的连接焊盘的另一个表面而成为最短距离，并且 其中半导体芯片的电极端子将被直接连接。

公开(公告)号：USD496019S1

公开(公告)日：2004-09-14

申请号：US29197339

申请日：2004-01-14

申请人： Norio Okada ,  Sugiko Honda ,  Takahiro Iijima

设计人： Norio Okada ,  Sugiko Honda ,  Takahiro Iijima

公开(公告)号：US5656855A

公开(公告)日：1997-08-12

申请号：US463961

申请日：1995-06-05

申请人： Katsuya Fukase ,  Takahiro Iijima ,  Masao Nakazawa ,  Shinichi Wakabayashi

发明人： Katsuya Fukase ,  Takahiro Iijima ,  Masao Nakazawa ,  Shinichi Wakabayashi

IPC分类号： H01L23/50 ,  H01L21/48 ,  H01L23/495 ,  H05K3/20 ,  H05K3/34 ,  H01L23/48

CPC分类号： H01L21/4821 ,  H01L23/49534 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/181 ,  H05K3/20 ,  H05K3/202 ,  H05K3/205 ,  H05K3/3421

摘要： In a method for manufacturing a lead frame, a predetermined pattern is formed on a matrix 10 by a resist, an electro-deposition portion is provided in a cavity formed in the resist patterns 12, and the electro-deposition pattern 13 is separated from the matrix 10. The resist pattern is formed on the matrix 10 so that a cavity portion 17 connecting a plurality of cavity 16 ends for inner lead formation can be included in the resist pattern, and an electro-deposition portion is provided into the cavity portion 17 so that the electro-deposition pattern 13 can be formed into a configuration in which the tip ends of the inner leads 22 are connected by a connecting piece 21, and the electro-deposition pattern 13 is separated from the matrix 10 while the tip ends of the inner leads 22 are connected by the connecting piece 21.

摘要翻译： 在引线框架的制造方法中，通过抗蚀剂在矩阵10上形成预定图案，在形成于抗蚀剂图案12的空腔中设置电沉积部，并将电沉积图案13从 抗蚀剂图案形成在矩阵10上，使得连接多个腔16的端部用于内引线形成的空腔部分17可以包括在抗蚀剂图案中，并且电沉积部分被设置到空腔部分17中 使得电沉积图案13可以形成为通过连接片21连接内引线22的末端的结构，并且电沉积图案13与基体10分离，同时末端 内引线22由连接片21连接。

公开(公告)号：US4532109A

公开(公告)日：1985-07-30

申请号：US575049

申请日：1984-01-30

申请人： Keikichi Maeda ,  Takahiro Iijima

发明人： Keikichi Maeda ,  Takahiro Iijima

IPC分类号： B01J19/00 ,  C10B43/14 ,  C10G9/16 ,  C22C38/06 ,  B01J19/02

CPC分类号： C10B43/14 ,  B01J19/0026 ,  C10G9/16 ,  C22C38/06 ,  Y10S585/95

摘要： A process for providing an apparatus for treating hydrocarbons or the like fluids at a high temperature substantially without carbon deposition is described. At least portions of the apparatus which are to be contacted with the high temperature fluid, are made of a specific alloy containing 1-10% by weight of aluminum and, if desired, oxidized before or upon contact with the high temperature fluid to form an aluminum-containing oxide film.

摘要翻译： 描述了一种用于在基本上不含碳沉积的高温下提供用于处理烃类或类似流体的装置的方法。 要与高温流体接触的设备的至少部分由含有1-10重量％的铝的特定合金制成，并且如果需要，在与高温流体接触之前或之后被氧化以形成 含铝氧化膜。

公开(公告)号：US07033934B2

公开(公告)日：2006-04-25

申请号：US10693374

申请日：2003-10-24

申请人： Takahiro Iijima ,  Akio Rokugawa

发明人： Takahiro Iijima ,  Akio Rokugawa

IPC分类号： H01L21/44

CPC分类号： H05K1/0222 ,  H01L23/49827 ,  H01L23/642 ,  H01L23/66 ,  H01L2223/6622 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01078 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/115 ,  H05K1/162 ,  H05K3/4046 ,  H05K2201/09809

摘要： A semiconductor package of superior high frequency characteristics enabling easy mounting of a large-sized capacitor and thereby enabling fluctuation of the power supply voltage to be suppressed and enabling a reduction of the inductance of the wiring portion connecting the capacitor and a connection terminal, that is, a semiconductor package mounting a capacitor for suppressing fluctuation of a power supply voltage, wherein the capacitor is comprised of, in an attachment hole passing through the board in the thickness direction, a conductor wire to be connected to a connection terminal of a semiconductor chip at one end, a high dielectric constant material covering the conductor wire at a predetermined thickness, and a conductor layer arranged between the outer circumference of the high dielectric constant material and the inner wall of the attachment hole, provided as a coaxial structure having the conductor wire at its center, and a method of production of the same.

摘要翻译： 具有优异的高频特性的半导体封装，能够容易地安装大型电容器，从而能够抑制电源电压的波动，并且能够降低连接电容器和连接端子的布线部分的电感，即 ，安装用于抑制电源电压波动的电容器的半导体封装，其中，所述电容器包括：在厚度方向穿过所述板的安装孔中，连接到半导体芯片的连接端子的导线 一端覆盖预定厚度的导体线的高介电常数材料，以及设置在高介电常数材料的外周与安装孔的内壁之间的导体层，其设置为具有导体的同轴结构 其中心线及其制造方法。

公开(公告)号：US07019404B2

公开(公告)日：2006-03-28

申请号：US10347602

申请日：2003-01-22

申请人： Akio Rokugawa ,  Takahiro Iijima

发明人： Akio Rokugawa ,  Takahiro Iijima

IPC分类号： H01L29/40

CPC分类号： H01L23/49531 ,  H01L21/4857 ,  H01L21/6835 ,  H01L24/48 ,  H01L25/0655 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/45099 ,  H01L2224/48247 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19107 ,  H05K1/113 ,  H05K3/0061 ,  H05K3/205 ,  H05K3/323 ,  H05K3/4602 ,  H05K3/4614 ,  H05K3/4682 ,  H05K2201/0133 ,  H05K2201/09527 ,  H05K2203/061 ,  Y10T29/49126 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： A multi-layered circuit substrate for a semiconductor device comprises a multi-layered circuit substrate body having first and second surfaces and comprising a plurality of conductive pattern layers integrally laminated one on the other from the first surface to the second surface, so that a plurality of semiconductor device elements can be arranged on the first surface of the substrate body; and a plate member, a rigidity thereof being higher than that of the substrate body, attached to the second surface of the substrate body. A plurality of semiconductor elements can be mounted on the semiconductor element mounting surface defined on the first surface of the substrate body.