公开(公告)号：US20110298097A1

公开(公告)日：2011-12-08

申请号：US13156021

申请日：2011-06-08

申请人： Manabu Sueyoshi ,  Seiji Muranaka ,  Tomoryo Shono ,  Itaru Kanno

发明人： Manabu Sueyoshi ,  Seiji Muranaka ,  Tomoryo Shono ,  Itaru Kanno

IPC分类号： H01L29/41 ,  H01L21/283

CPC分类号： H01L25/0657 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05017 ,  H01L2224/05554 ,  H01L2224/0557 ,  H01L2224/056 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48229 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/83005 ,  H01L2224/9202 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device is provided wherein stacked semiconductor substrates are electrically coupled together in a satisfactory state by a conductor buried in the interior of a through hole. A first semiconductor substrate includes a substrate having main surfaces, further includes a semiconductor element formed within and over the substrate, a wiring coupled to the semiconductor element electrically, and a conductive layer formed in the interior of a through hole, the through hole extending through mutually confronting first and second main surfaces as the main surfaces of the substrate and reaching the wiring. The first semiconductor substrate and a second semiconductor substrate are stacked and the conductive layer is coupled to a wiring of the second semiconductor substrate electrically. In a second main surface of the conductive layer, a recess is formed around an end portion of the through hole so that a bottom wall surface of the recess is present in the interior of the substrate. A conductive material which constitutes the conductive layer is filled in the interior of the recess.

摘要翻译： 提供一种半导体器件，其中堆叠的半导体衬底通过埋在通孔内部的导体在令人满意的状态下电耦合在一起。 第一半导体衬底包括具有主表面的衬底，还包括形成在衬底内和上面的半导体元件，电连接到半导体元件的布线，以及形成在通孔内部的导电层，所述通孔延伸穿过 相互面对的第一和第二主表面作为基板的主表面并到达布线。 层叠第一半导体衬底和第二半导体衬底，并且导电层电连接到第二半导体衬底的布线。 在导电层的第二主表面中，在通孔的端部周围形成凹部，使得凹部的底壁表面存在于基板的内部。 构成导电层的导电材料填充在凹部的内部。

公开(公告)号：US06713232B2

公开(公告)日：2004-03-30

申请号：US09727542

申请日：2000-12-04

申请人： Seiji Muranaka ,  Itaru Kanno ,  Mami Shirota ,  Junji Kondo

发明人： Seiji Muranaka ,  Itaru Kanno ,  Mami Shirota ,  Junji Kondo

IPC分类号： G03C500

CPC分类号： H01L21/02071 ,  G03F7/426 ,  H01L21/31133 ,  H01L21/76802 ,  H01L21/76838

摘要： Resist residues, which is formed in a process of forming Al interconnections, are removed through use of a single chemical. A chemical which contains an organic acid or a salt thereof and water and which has a pH below 8 is used as a treatment for removing resist or resist residues. The chemical may be used in a process in which Al, W, Ti, TiN, and SiO2 are exposed on the surface of a wafer after etching of an Al interconnection; in a process in which Al, W, Ti, TiN, and SiO2 are exposed on the surface of a wafer after etching a hole reaching an Al interconnection in an dielectric layer; in a process in which Cu is exposed on the surface of a semiconductor wafer after dry-etching of a Cu interconnection or etching of an interlayer dielectric film laid on a Cu interconnection; and in a process in which metal material such as W, WN, Ti, or TiN; poly-Si; SiN; and SiO2 are exposed on the surface of a wafer after etching of a metal gate.

摘要翻译： 通过使用单一化学物质去除在形成Al互连的过程中形成的抗蚀剂残留物。 使用含有有机酸或其盐和水并且pH低于8的化学物质作为去除抗蚀剂或抗蚀剂残留物的处理。 该化学品可用于在Al互连之后Al，W，Ti，TiN和SiO2暴露在晶片表面上的工艺中; 在蚀刻在电介质层中达到Al互连的孔之后，在晶片表面上露出Al，W，Ti，TiN和SiO 2的工艺中， 在Cu互连的干蚀刻或Cu互连上的层间电介质膜的蚀刻之后，在半导体晶片的表面上露出Cu的工序; 并且在诸如W，WN，Ti或TiN的金属材料的过程中， 多晶硅; 罪; 并且在蚀刻金属栅极之后，在晶片的表面上露出SiO 2。

公开(公告)号：US06358329B1

公开(公告)日：2002-03-19

申请号：US09342536

申请日：1999-06-29

申请人： Seiji Muranaka ,  Itaru Kanno

发明人： Seiji Muranaka ,  Itaru Kanno

IPC分类号： B08B300

CPC分类号： H01L21/02054 ,  B08B3/08 ,  H01L21/67028 ,  H01L21/76838

摘要： The resist residue removal method removes resist residues caused at the time of formation of an aluminum wiring pattern on a semiconductor wafer. The method includes the steps of removal fluid processing, washing, and drying. The method involves forming an atmosphere within a chamber, which houses a semiconductor wafer having an exposed aluminum wiring pattern, by controlling gas flow into the chamber according to the processing step being performed. By the resist residue removal method, yield of a wiring pattern is improved by prevention of local etching of an aluminum wiring pattern, or by prevention of thinning of the aluminum wiring pattern.

摘要翻译： 抗蚀剂残渣除去方法去除在半导体晶片上形成铝布线图形时产生的抗蚀剂残留物。 该方法包括去除流体处理，洗涤和干燥的步骤。 该方法包括通过根据正在执行的处理步骤控制气体流入室中，在室内形成容纳具有暴露的铝布线图案的半导体晶片的气氛。 通过抗蚀剂残渣除去方法，通过防止铝布线图案的局部蚀刻，或通过防止铝布线图案的变薄来提高布线图案的产量。

公开(公告)号：US20110062539A1

公开(公告)日：2011-03-17

申请号：US12885093

申请日：2010-09-17

申请人： Ryoji MATSUDA ,  Motoi Ashida ,  Shuichi Ueno ,  Shoichi Fukui ,  Shinya Hirano ,  Seiji Muranaka ,  Kazuyuki Omori

发明人： Ryoji MATSUDA ,  Motoi Ashida ,  Shuichi Ueno ,  Shoichi Fukui ,  Shinya Hirano ,  Seiji Muranaka ,  Kazuyuki Omori

IPC分类号： H01L29/82 ,  H01L21/04

CPC分类号： H01L27/228 ,  B82Y25/00 ,  H01F10/131 ,  H01F10/14 ,  H01F10/142 ,  H01F10/145 ,  H01F10/20 ,  H01F10/22 ,  H01F10/3254 ,  H01L21/76807 ,  H01L21/76816 ,  H01L21/76844 ,  H01L27/105 ,  H01L43/08 ,  H01L43/12

摘要： To provide a semiconductor device in which the deterioration of the rewrite property is suppressed. In a memory cell region, magnetoresistive elements in a semiconductor magnetic-storage device are formed in an array shape in a mode that the magnetoresistive elements are arranged at portions where digit lines extending in one direction intersect bit lines extending in the direction approximately orthogonal to the digit lines. The digit line and the bit line have such a wiring structure constituted by covering a copper film to be a wiring main body with a cladding layer. One end side of the magnetoresistive element is electrically coupled to the bit line via a top via formed from a non-magnetic material.

摘要翻译： 提供抑制重写特性劣化的半导体器件。 在存储单元区域中，半导体磁存储器件中的磁阻元件形成为阵列形状，其方式是将磁阻元件布置在沿一个方向延伸的数字线与沿大致垂直于 数字线。 数字线和位线具有这样一种布线结构，其通过用覆盖层覆盖作为布线主体的铜膜而构成。 磁阻元件的一端侧经由由非磁性材料形成的顶部通孔电耦合到位线。

公开(公告)号：US06837963B2

公开(公告)日：2005-01-04

申请号：US09982779

申请日：2001-10-22

申请人： Hiroshi Tanaka ,  Naoki Yokoi ,  Yasuhiro Asaoka ,  Seiji Muranaka ,  Toshihiko Nagai

发明人： Hiroshi Tanaka ,  Naoki Yokoi ,  Yasuhiro Asaoka ,  Seiji Muranaka ,  Toshihiko Nagai

IPC分类号： H01L21/302 ,  B08B7/00 ,  H01L21/00 ,  H01L21/205 ,  H01L21/304 ,  H01L21/306 ,  H01L21/3065 ,  C23F1/00 ,  C23C16/00

CPC分类号： H01L21/02046 ,  B08B7/0035 ,  H01J2237/335 ,  H01L21/02052 ,  H01L21/67028

摘要： A semiconductor device producing method that can clean an edge part of a semiconductor substrate with certainty is provided. The method of producing a semiconductor device includes a step of generating ions and a step of accelerating the ions by means of an electric field and radiating an ion flow onto an edge part of a semiconductor substrate to clean the edge part of the semiconductor substrate. The semiconductor substrate is moved relative to the ion flow while maintaining a state in which the ion flow is being radiated onto the edge part. The step of generating ions includes applying a high-frequency voltage between a pair of electrodes to generate the ions between the electrodes.

摘要翻译： 提供一种可以确定地清洁半导体衬底的边缘部分的半导体器件制造方法。 制造半导体器件的方法包括产生离子的步骤和通过电场加速离子并将离子流辐射到半导体衬底的边缘部分以清洁半导体衬底的边缘部分的步骤。 半导体衬底相对于离子流移动，同时保持离子流被辐射到边缘部分上的状态。 产生离子的步骤包括在一对电极之间施加高频电压以在电极之间产生离子。

公开(公告)号：US6053059A

公开(公告)日：2000-04-25

申请号：US89421

申请日：1998-06-03

申请人： Seiji Muranaka ,  Kuniaki Miyake

发明人： Seiji Muranaka ,  Kuniaki Miyake

IPC分类号： G01N27/62 ,  G01N1/00 ,  G01N1/02 ,  G01N1/22 ,  G01N30/00 ,  G01N30/72

CPC分类号： G01N1/4022 ,  G01N2001/028 ,  G01N30/7206

摘要： An organic substance analyzing system identifies and quantifies organic substances adhering to the surface of a sample placed in a chamber for a local organic substance analysis on the surface of the sample. The organic substance analyzing system heats a portion of the sample from the front side or the back side of the sample, collects gases discharged out of the portion of the surface and analyzes the collected gases. A lamp, a laser or an electron beam source is used as a heating means for locally heating a portion to be analyzed on the surface of the sample to locally discharge the gases out of the portion. Otherwise, the entire surface of the sample is heated, and the discharged gases are collected for every section so as to be analyzed.

摘要翻译： 有机物质分析系统鉴定和量化附着在放置在室内的样品表面上的有机物质，用于在样品表面进行局部有机物质分析。 有机物质分析系统从样品的前侧或背面加热样品的一部分，收集排出表面部分的气体并分析收集的气体。 使用灯，激光或电子束源作为加热装置，用于局部加热样品表面上待分析的部分，以将气体局部排出部分。 否则，将样品的整个表面加热，并对每个部分收集排出的气体以进行分析。

公开(公告)号：US06586145B2

公开(公告)日：2003-07-01

申请号：US10073189

申请日：2002-02-13

申请人： Naoki Yokoi ,  Hiroshi Tanaka ,  Yasuhiro Asaoka ,  Seiji Muranaka ,  Toshihiko Nagai

发明人： Naoki Yokoi ,  Hiroshi Tanaka ,  Yasuhiro Asaoka ,  Seiji Muranaka ,  Toshihiko Nagai

IPC分类号： G03F900

CPC分类号： H01L21/76802 ,  H01L21/28123 ,  H01L21/31144 ,  H01L21/32134 ,  H01L21/32137 ,  H01L21/32139 ,  H01L29/66545

摘要： A method of fabricating a semiconductor device causing no pattern shifting of a peripheral oxide film etc. in removal of both of an antireflection film and a mask pattern and having a fine structure not implementable solely by photolithography and the semiconductor device are obtained. The method of fabricating a semiconductor device comprises steps of forming a base film of either a silicon film or a silicon compound film on a semiconductor substrate, forming a hard film of either a metal film or a metal compound film on the base film, forming a resist pattern on the hard film, dryly etching the hard film through the resist pattern serving as a mask for forming a hard pattern, dryly etching the base film through the hard pattern serving as a mask and removing the hard pattern by wet etching with a chemical solution not etching at least the base film.

摘要翻译： 制造在除去防反射膜和掩模图案中并且具有仅通过光刻不能实现的精细结构的半导体器件的半导体器件的制造方法，并且获得半导体器件。 制造半导体器件的方法包括以下步骤：在半导体衬底上形成硅膜或硅化合物膜的基膜，在基膜上形成金属膜或金属化合物膜的硬膜，形成 在硬膜上形成抗蚀剂图案，通过作为形成硬图案的掩模的抗蚀剂图案干硬蚀刻硬膜，通过用作掩模的硬图案将基膜干蚀刻并用化学腐蚀法去除硬图案 溶液至少不蚀刻基膜。

公开(公告)号：US06410454B1

公开(公告)日：2002-06-25

申请号：US08982586

申请日：1997-12-02

申请人： Seiji Muranaka ,  Cozy Ban ,  Akihiko Osaki

发明人： Seiji Muranaka ,  Cozy Ban ,  Akihiko Osaki

IPC分类号： B01J1908

CPC分类号： H01L21/02046 ,  C23C16/0236 ,  C23C16/452

摘要： In a semiconductor wafer-processing, hydrogen gas is introduced into the same chamber as used for film formation and heated to generate hydrogen radicals. Alternatively, a plasma is applied to generate hydrogen radicals, or the semiconductor wafer is heated immediately before film formation. Thereby, contaminants on the surface of the wafer are removed. Thereafter, a conductive film or an insulating film is formed on the wafer in the same chamber.

摘要翻译： 在半导体晶片处理中，将氢气引入到用于成膜的相同的室中，并加热以产生氢自由基。 或者，施加等离子体以产生氢自由基，或者在成膜之前立即加热半导体晶片。 由此，去除晶片表面上的杂质。 此后，在相同的室中的晶片上形成导电膜或绝缘膜。

公开(公告)号：US06642142B2

公开(公告)日：2003-11-04

申请号：US10034371

申请日：2002-01-03

申请人： Toshihiko Nagai ,  Hiroshi Tanaka ,  Naoki Yokoi ,  Yasuhiro Asaoka ,  Seiji Muranaka

发明人： Toshihiko Nagai ,  Hiroshi Tanaka ,  Naoki Yokoi ,  Yasuhiro Asaoka ,  Seiji Muranaka

IPC分类号： H01L214763

CPC分类号： H01L21/02063 ,  B08B3/10 ,  H01L21/02052 ,  H01L21/31116 ,  H01L21/67051 ,  H01L21/76805 ,  H01L21/76814

摘要： In a water rinsing process performed after the surface of a substrate has been cleaned using a cleaning solution, a first spinning process, in which water is supplied to the surface of the substrate while the substrate is rotated at a first rotation speed, and a second spinning process, in which the substrate is rotated at a second rotation speed that is higher than the first rotation speed, are repeatedly performed alternately.

公开(公告)号：US06531381B2

公开(公告)日：2003-03-11

申请号：US09998692

申请日：2001-12-03

申请人： Yasuhiro Asaoka ,  Hiroshi Tanaka ,  Naoki Yokoi ,  Seiji Muranaka ,  Toshihiko Nagai

发明人： Yasuhiro Asaoka ,  Hiroshi Tanaka ,  Naoki Yokoi ,  Seiji Muranaka ,  Toshihiko Nagai

IPC分类号： H01L2120

CPC分类号： H01L21/02052 ,  B08B3/02 ,  C11D3/3947 ,  C11D7/08 ,  C11D11/0047 ,  C23F1/30 ,  H01L21/67051

摘要： Disclosed is a method for removing Pt (or Pt—Ir) and BST contaminants on the surface edge, back, and bevel of a semiconductor wafer. A wafer on which a stacked film selected from the group of a Pt film, a Pt—Ir film, and a Ba—Sr—Ti film is formed is prepared. A chemical containing hydrochloric acid is applied only to the surface edge, back, and bevel of the wafer. The surface edge, back, and bevel of the wafer are rinsed with pure water. Further, a chemical containing hydrogen fluoride is applied. The surface edge, back, and bevel of the wafer are rinsed again with pure water.