公开(公告)号：US5731634A

公开(公告)日：1998-03-24

申请号：US659389

申请日：1996-06-06

申请人： Mie Matsuo ,  Haruo Okano ,  Nobuo Hayasaka ,  Kyoichi Suguro ,  Hideshi Miyajima ,  Jun-ichi Wada

发明人： Mie Matsuo ,  Haruo Okano ,  Nobuo Hayasaka ,  Kyoichi Suguro ,  Hideshi Miyajima ,  Jun-ichi Wada

IPC分类号： H01L21/768 ,  H01L23/528 ,  H01L23/532 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76877 ,  H01L21/28518 ,  H01L21/76823 ,  H01L21/76838 ,  H01L21/76849 ,  H01L23/5283 ,  H01L23/53238 ,  H01L2924/0002

摘要： The present invention provides a method of manufacturing a semiconductor device, including the steps of forming a metal oxide film made of a metal oxide having a decrease in standard free energy smaller than a decrease in standard free energy of hydrogen oxide or of carbon oxide, on an insulating film formed on a semiconductor substrate, forming a metal oxide film pattern by subjecting a treatment to the metal oxide film, and converting said metal oxide pattern into at least one of an electrode and a wiring made of a metal which is a main component constituting the metal oxide, by reducing the metal oxide film pattern at a temperature of 80.degree. to 500.degree. C.

摘要翻译： 本发明提供了一种制造半导体器件的方法，包括以下步骤：形成由金属氧化物制成的金属氧化物膜，其标准自由能的降低小于氧化物或氧化碳的标准自由能的降低，对 形成在半导体基板上的绝缘膜，通过对金属氧化物膜进行处理形成金属氧化物膜图案，并将所述金属氧化物图案转换成电极和由作为主要成分的金属制成的布线中的至少一个 通过在80℃〜500℃的温度下还原金属氧化物膜图案来构成金属氧化物。

公开(公告)号：US5424246A

公开(公告)日：1995-06-13

申请号：US99695

申请日：1993-07-30

申请人： Mie Matsuo ,  Haruo Okano ,  Nobuo Hayasaka ,  Kyoichi Suguro ,  Hideshi Miyajima ,  Jun-ichi Wada

发明人： Mie Matsuo ,  Haruo Okano ,  Nobuo Hayasaka ,  Kyoichi Suguro ,  Hideshi Miyajima ,  Jun-ichi Wada

IPC分类号： H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/528 ,  H01L23/532 ,  H01L21/205

CPC分类号： H01L21/76877 ,  H01L21/28518 ,  H01L21/76823 ,  H01L21/76838 ,  H01L21/76849 ,  H01L23/5283 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/12044

摘要： According to this invention, there is provided a method of forming a groove wiring layer, including the steps of forming a metal oxide film, consisting of a metal oxide having a decrease in standard free energy smaller than a decrease in standard free energy of a hydrogen oxide or of a carbon oxide, on an insulating film formed on a semiconductor substrate, and reducing the metal oxide film to form an electrode-wiring layer consisting of a metal which is a main component constituting the metal oxide. In this manner, an electrode-wiring layer having high EM and SM resistances without causing an increase in electric resistivity caused by an impurity or the like can be obtained.

摘要翻译： 根据本发明，提供一种形成沟槽布线层的方法，包括形成金属氧化物膜的步骤，该金属氧化物膜由标准自由能降低的金属氧化物组成，其小于氢的标准自由能的降低 氧化物或碳氧化物，在形成于半导体衬底上的绝缘膜上，还原金属氧化物膜，形成由作为构成金属氧化物的主要成分的金属构成的电极配线层。 以这种方式，可以获得具有高EM和SM电阻而不引起由杂质引起的电阻率增加的电极布线层等。

公开(公告)号：US5561082A

公开(公告)日：1996-10-01

申请号：US405948

申请日：1995-03-17

申请人： Mie Matsuo ,  Haruo Okano ,  Nobuo Hayasaka ,  Kyoichi Suguro ,  Hideshi Miyajima ,  Jun-ichi Wada

发明人： Mie Matsuo ,  Haruo Okano ,  Nobuo Hayasaka ,  Kyoichi Suguro ,  Hideshi Miyajima ,  Jun-ichi Wada

IPC分类号： H01L21/768 ,  H01L23/528 ,  H01L23/532 ,  H01L21/28

CPC分类号： H01L21/76877 ,  H01L21/28518 ,  H01L21/76823 ,  H01L21/76838 ,  H01L21/76849 ,  H01L23/5283 ,  H01L23/53238 ,  H01L2924/0002

摘要： The present invention provides a method of manufacturing a semiconductor device, including the steps of forming a metal oxide film made of a metal oxide having a decrease in standard free energy smaller than a decrease in standard free energy of hydrogen oxide or of carbon oxide, on an insulating film formed on a semiconductor substrate, forming a metal oxide film pattern by subjecting a treatment to the metal oxide film, and converting said metal oxide pattern into at least one of an electrode and a wiring made of a metal which is a main component constituting the metal oxide, by reducing the metal oxide film pattern at a temperature of 80.degree. to 500.degree. C.

摘要翻译： 本发明提供了一种制造半导体器件的方法，包括以下步骤：形成由金属氧化物制成的金属氧化物膜，其标准自由能的降低小于氧化物或氧化碳的标准自由能的降低，对 形成在半导体基板上的绝缘膜，通过对金属氧化物膜进行处理形成金属氧化物膜图案，并将所述金属氧化物图案转换成电极和由作为主要成分的金属制成的布线中的至少一个 通过在80℃〜500℃的温度下还原金属氧化物膜图案来构成金属氧化物。

公开(公告)号：US5607718A

公开(公告)日：1997-03-04

申请号：US300127

申请日：1994-09-02

申请人： Yasutaka Sasaki ,  Mie Matsuo ,  Rempei Nakata ,  Junichi Wada ,  Nobuo Hayasaka ,  Hiroyuki Yano ,  Haruo Okano

发明人： Yasutaka Sasaki ,  Mie Matsuo ,  Rempei Nakata ,  Junichi Wada ,  Nobuo Hayasaka ,  Hiroyuki Yano ,  Haruo Okano

IPC分类号： B24B37/015 ,  B24B49/14 ,  B24B57/02 ,  H01L21/02 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/768 ,  B05D5/12 ,  C03C15/00 ,  H01L21/465

CPC分类号： B24B37/015 ,  B24B57/02 ,  H01L21/02074 ,  H01L21/3212 ,  H01L21/3213 ,  H01L21/7684

摘要： This invention provides a polishing method including the steps of forming a film to be polished on a substrate having a recessed portion in its surface so as to fill at least the recessed portion, and selectively leaving the film to be polished behind in the recessed portion by polishing the film by using a polishing agent containing polishing particles and a solvent, and having a pH of 7.5 or more. The invention also provides a polishing apparatus including a polishing agent storage vessel for storing a polishing agent, a turntable for polishing an object to be polished, a polishing agent supply pipe for supplying the polishing agent from the polishing agent storage vessel onto the turntable, a polishing object holding jig for holding the object to be polished such that the surface to be polished of the object opposes the turntable, and a polishing agent supply pipe temperature adjusting unit, connected to the polishing agent supply pipe, for adjusting the temperature of the polishing agent.

摘要翻译： 本发明提供了一种抛光方法，包括以下步骤：在其表面上具有凹陷部分的基底上形成待研磨的膜，以便至少填充凹部，并且通过在凹部中选择性地将被抛光的膜留在后面 通过使用含有研磨粒子和溶剂的研磨剂，pH为7.5以上来研磨该膜。 本发明还提供了一种抛光装置，其包括：用于存储抛光剂的抛光剂储存容器，用于抛光待抛光对象物的转盘，用于将抛光剂从抛光剂储存容器供应到转台上的抛光剂供给管， 抛光对象保持夹具，用于保持待抛光对象物，使被处理物体的表面与转盘相对;抛光剂供给管温度调节单元，连接到抛光剂供应管，用于调节抛光温度 代理商

公开(公告)号：US5775980A

公开(公告)日：1998-07-07

申请号：US743044

申请日：1996-11-04

申请人： Yasutaka Sasaki ,  Mie Matsuo ,  Rempei Nakata ,  Junichi Wada ,  Nobuo Hayasaka ,  Hiroyuki Yano ,  Haruo Okano

发明人： Yasutaka Sasaki ,  Mie Matsuo ,  Rempei Nakata ,  Junichi Wada ,  Nobuo Hayasaka ,  Hiroyuki Yano ,  Haruo Okano

IPC分类号： B24B37/015 ,  B24B49/14 ,  B24B57/02 ,  H01L21/02 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/768 ,  B24B5/00

CPC分类号： B24B37/015 ,  B24B57/02 ,  H01L21/02074 ,  H01L21/3212 ,  H01L21/3213 ,  H01L21/7684

摘要： This invention provides a polishing method including the steps of forming a film to be polished on a substrate having a recessed portion in its surface so as to fill at least the recessed portion, and selectively leaving the film to be polished behind in the recessed portion by polishing the film by using a polishing agent containing polishing particles and a solvent, and having a pH of 7.5 or more. The invention also provides a polishing apparatus including a polishing agent storage vessel for storing a polishing agent, a turntable for polishing an object to be polished, a polishing agent supply pipe for supplying the polishing agent from the polishing agent storage vessel onto the turntable, a polishing object holding jig for holding the object to be polished such that the surface to be polished of the object opposes the turntable, and a polishing agent supply pipe temperature adjusting unit, connected to the polishing agent supply pipe, for adjusting the temperature of the polishing agent.

摘要翻译： 本发明提供了一种抛光方法，包括以下步骤：在其表面上具有凹陷部分的基底上形成待研磨的膜，以便至少填充凹部，并且通过在凹部中选择性地将被抛光的膜留在后面 通过使用含有研磨粒子和溶剂的研磨剂，pH为7.5以上来研磨该膜。 本发明还提供了一种抛光装置，其包括：用于存储抛光剂的抛光剂储存容器，用于抛光待抛光对象物的转盘，用于将抛光剂从抛光剂储存容器供应到转台上的抛光剂供给管， 抛光对象保持夹具，用于保持待抛光对象物，使被处理物体的表面与转盘相对;抛光剂供给管温度调节单元，连接到抛光剂供应管，用于调节抛光温度 代理商

公开(公告)号：US20050014311A1

公开(公告)日：2005-01-20

申请号：US10902391

申请日：2004-07-30

申请人： Nobuo Hayasaka ,  Katsuya Okumura ,  Keiichi Sasaki ,  Mie Matsuo

发明人： Nobuo Hayasaka ,  Katsuya Okumura ,  Keiichi Sasaki ,  Mie Matsuo

IPC分类号： H01L21/768 ,  H01L23/48 ,  H01L23/64 ,  H01L25/065 ,  H01L25/10 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/48 ,  H01L29/40

CPC分类号： H01L23/642 ,  H01L21/76898 ,  H01L23/367 ,  H01L23/481 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/00

摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

摘要翻译： 公开了一种多芯片半导体器件，其中堆叠芯片，每个芯片包括形成在顶部的半导体衬底和电路部件，以及形成在半导体衬底的顶部上的层间绝缘膜。 至少一个芯片具有穿过半导体衬底和层间绝缘膜的通孔中形成的金属的连接插头。 具有连接插头的芯片通过该连接插头与另一个芯片电连接。

公开(公告)号：US06709966B1

公开(公告)日：2004-03-23

申请号：US09606152

申请日：2000-06-29

申请人： Yoshimi Hisatsune ,  Keiichi Sasaki ,  Hiroshi Ikegami ,  Mie Matsuo ,  Nobuo Hayasaka ,  Katsuya Okumura

发明人： Yoshimi Hisatsune ,  Keiichi Sasaki ,  Hiroshi Ikegami ,  Mie Matsuo ,  Nobuo Hayasaka ,  Katsuya Okumura

IPC分类号： H01L2144

CPC分类号： H01L24/81 ,  H01L21/6835 ,  H01L21/76877 ,  H01L24/11 ,  H01L24/13 ,  H01L24/742 ,  H01L2224/11003 ,  H01L2224/1132 ,  H01L2224/1183 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/81121 ,  H01L2224/81136 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H05K3/207 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/083 ,  H05K2203/0113 ,  H05K2203/104 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401

摘要： A semiconductor device comprising the bump containing magnetic body, magnetic body, the bump including non-magnetic body for at least partially covering the magnetic body, mixture of magnetic particles and non-magnetic particles and the bump including baked magnetic particles and baked non-magnetic particles.

摘要翻译： 一种半导体器件，包括包括磁体的磁体，磁体，包括用于至少部分地覆盖磁体的非磁性体的凸起，磁性粒子和非磁性粒子的混合物以及包含焙烧磁性粒子的凸块和​​烘烤的非磁性体 粒子。

公开(公告)号：US06614106B2

公开(公告)日：2003-09-02

申请号：US09957510

申请日：2001-09-21

申请人： Mie Matsuo ,  Nobuo Hayasaka

发明人： Mie Matsuo ,  Nobuo Hayasaka

IPC分类号： H01L2304

CPC分类号： H01L23/66 ,  H01L23/49833 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2224/05599

摘要： A stacked circuit device comprises a base substrate having a terminal, an interposer arranged on the base substrate and formed of a semiconductor substrate, the interposer having a first terminal connected to the terminal of the base substrate, a second terminal, and a circuit coupled to the second terminal and including an active element, and an integrated circuit chip arranged on the interposer and having a terminal connected to the second terminal.

公开(公告)号：US06809421B1

公开(公告)日：2004-10-26

申请号：US09377486

申请日：1999-08-20

申请人： Nobuo Hayasaka ,  Katsuya Okumura ,  Keiichi Sasaki ,  Mie Matsuo

发明人： Nobuo Hayasaka ,  Katsuya Okumura ,  Keiichi Sasaki ,  Mie Matsuo

IPC分类号： H01L2348

CPC分类号： H01L23/642 ,  H01L21/76898 ,  H01L23/367 ,  H01L23/481 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/00

摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

摘要翻译： 公开了一种多芯片半导体器件，其中堆叠芯片，每个芯片包括形成在顶部的半导体衬底和电路部件，以及形成在半导体衬底的顶部上的层间绝缘膜。 至少一个芯片具有穿过半导体衬底和层间绝缘膜的通孔中形成的金属的连接插头。 具有连接插头的芯片通过该连接插头与另一个芯片电连接。

公开(公告)号：US06717251B2

公开(公告)日：2004-04-06

申请号：US09961332

申请日：2001-09-25

申请人： Mie Matsuo ,  Nobuo Hayasaka ,  Tsunetoshi Arikado ,  Hidemi Ishiuchi ,  Koji Sakui ,  Chiaki Takubo

发明人： Mie Matsuo ,  Nobuo Hayasaka ,  Tsunetoshi Arikado ,  Hidemi Ishiuchi ,  Koji Sakui ,  Chiaki Takubo

IPC分类号： H01L2302

CPC分类号： H01L25/0657 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/1627 ,  H01L2224/0401

摘要： Provided is a stacked type semiconductor device formed of a plurality of semiconductor integrated circuit devices stacked, each having a specification and including a semiconductor integrated circuit chip, wherein at least three of the semiconductor integrated circuit devices are stacked in the order of a value of the specification.

摘要翻译： 本发明提供一种层叠型半导体器件，其由堆叠的多个半导体集成电路器件形成，每个半导体集成电路器件具有规格并且包括半导体集成电路芯片，其中至少三个半导体集成电路器件按照 规范。