公开(公告)号：US08513683B2

公开(公告)日：2013-08-20

申请号：US11344468

申请日：2006-01-31

申请人： Osamu Maeda ,  Tsuyoshi Fujimoto ,  Motonobu Takeya ,  Toshihiro Hashidu ,  Masaki Shiozaki ,  Yoshio Oofuji

发明人： Osamu Maeda ,  Tsuyoshi Fujimoto ,  Motonobu Takeya ,  Toshihiro Hashidu ,  Masaki Shiozaki ,  Yoshio Oofuji

IPC分类号： H01L33/00

CPC分类号： H01S5/2201 ,  B82Y20/00 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/0262 ,  H01L33/007 ,  H01L33/025 ,  H01S5/0206 ,  H01S5/0217 ,  H01S5/026 ,  H01S5/34333 ,  H01S5/4031

摘要： An optical integrated semiconductor light emitting device with improved light emitting efficiency is provided by preventing leak current from flowing through a high defect region of the substrate. The optical integrated semiconductor light emitting device includes: a substrate, in which in a low defect region made of crystal having a first average dislocation density, one or more high defect regions having a second average dislocation density higher than the first average dislocation density are included; and a Group III-V nitride semiconductor layer which is formed on the substrate, has a plurality of light emitting device structures, and has a groove in the region including the region corresponding to the high defect region (high defect region).

摘要翻译： 通过防止漏电流流过衬底的高缺陷区域来提供具有改善的发光效率的光学集成半导体发光器件。 光集成半导体发光器件包括：基板，其中在由具有第一平均位错密度的晶体制成的低缺陷区域中，包括具有高于第一平均位错密度的第二平均位错密度的一个或多个高缺陷区域 ; 和形成在基板上的III-V族氮化物半导体层，具有多个发光器件结构，并且在包括对应于高缺陷区域的区域（高缺陷区域）的区域中具有沟槽。

公开(公告)号：US20060192209A1

公开(公告)日：2006-08-31

申请号：US11344468

申请日：2006-01-31

申请人： Osamu Maeda ,  Tsuyoshi Fujimoto ,  Motonobu Takeya ,  Toshihiro Hashidu ,  Masaki Shiozaki ,  Yoshio Oofuji

发明人： Osamu Maeda ,  Tsuyoshi Fujimoto ,  Motonobu Takeya ,  Toshihiro Hashidu ,  Masaki Shiozaki ,  Yoshio Oofuji

IPC分类号： H01L21/00 ,  H01L33/00

CPC分类号： H01S5/2201 ,  B82Y20/00 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/0262 ,  H01L33/007 ,  H01L33/025 ,  H01S5/0206 ,  H01S5/0217 ,  H01S5/026 ,  H01S5/34333 ,  H01S5/4031

摘要： An optical integrated semiconductor light emitting device with improved light emitting efficiency is provided by preventing leak current from flowing through a high defect region of the substrate. The optical integrated semiconductor light emitting device includes: a substrate, in which in a low defect region made of crystal having a first average dislocation density, one or more high defect regions having a second average dislocation density higher than the first average dislocation density are included; and a Group III-V nitride semiconductor layer which is formed on the substrate, has a plurality of light emitting device structures, and has a groove in the region including the region corresponding to the high defect region (high defect region).

公开(公告)号：US06995406B2

公开(公告)日：2006-02-07

申请号：US10486050

申请日：2003-06-06

申请人： Tsuyoshi Tojo ,  Yoshifumi Yabuki ,  Shinichi Ansai ,  Tomonori Hino ,  Osamu Goto ,  Tsuyoshi Fujimoto ,  Osamu Matsumoto ,  Motonobu Takeya ,  Yoshio Oofuji

发明人： Tsuyoshi Tojo ,  Yoshifumi Yabuki ,  Shinichi Ansai ,  Tomonori Hino ,  Osamu Goto ,  Tsuyoshi Fujimoto ,  Osamu Matsumoto ,  Motonobu Takeya ,  Yoshio Oofuji

IPC分类号： H01L33/00

CPC分类号： B82Y20/00 ,  H01L2224/18 ,  H01L2224/24137 ,  H01L2224/73267 ,  H01S5/02276 ,  H01S5/042 ,  H01S5/0421 ,  H01S5/0425 ,  H01S5/34333 ,  H01S5/4031

摘要： In a multi-beam semiconductor laser including nitride III–V compound semiconductor layers stacked on one surface of a substrate of sapphire or other material to form laser structures, and including a plurality of anode electrodes and a plurality of cathode electrodes formed on the nitride III–V compound semiconductor layers, one of the anode electrodes is formed to bridge over one of the cathode electrodes via an insulating film, and another anode electrode is formed to bridge over another of the cathode electrodes via an insulating film.

摘要翻译： 在包括层叠在蓝宝石或其他材料的基板的一个表面上的氮化物III-V化合物半导体层以形成激光结构的多光束半导体激光器中，并且包括形成在氮化物III上的多个阳极电极和多个阴极电极 -V化合物半导体层，其中一个阳极形成为通过绝缘膜桥接在一个阴极电极上，并且另一个阳极电极形成为通过绝缘膜桥接在另一个阴极电极上。

公开(公告)号：US07561606B2

公开(公告)日：2009-07-14

申请号：US11264538

申请日：2005-10-31

申请人： Manabu Taniguchi ,  Motonobu Takeya ,  Tsuyoshi Fujimoto ,  Masao Ikeda ,  Toshihiro Hashidu

发明人： Manabu Taniguchi ,  Motonobu Takeya ,  Tsuyoshi Fujimoto ,  Masao Ikeda ,  Toshihiro Hashidu

IPC分类号： H01S3/04

CPC分类号： H01S5/2231 ,  B82Y20/00 ,  G11B7/127 ,  H01L24/05 ,  H01L2224/04042 ,  H01L2224/05644 ,  H01L2224/48091 ,  H01L2224/85444 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01S5/0224 ,  H01S5/02248 ,  H01S5/02272 ,  H01S5/0425 ,  H01S5/06226 ,  H01S5/2214 ,  H01S5/34333 ,  H01L2224/45099 ,  H01L2924/00

摘要： An upper portion of a second clad layer and a contact layer are provided with grooves so as to form a ridge therebetween. An electrode is formed on the ridge. An insulation film is formed to extent on side surfaces of the ridge, on the inside of the grooves, and those portions of the contact layer which are located on the outside of the grooves. The thickness of those portions of the insulation film which are located on the contact layer in the areas on the outside of the grooves is set to be greater than at least the thickness of the electrode. Besides, a pad electrode is formed to cover the electrode and to extend on the insulation film on the upper side of the areas on the outside of the grooves. The upper surfaces of those portions of the pad electrode which are located on the upper side of the areas on the outside of the grooves are set to be above the upper surface of that portion of the pad electrode which is located on the upper side of the ridge.

摘要翻译： 第二覆盖层和接触层的上部设置有沟槽，以在其间形成脊。 在脊上形成电极。 在槽的侧面，槽的内侧和接触层的位于槽的外侧的部分形成绝缘膜。 位于槽的外侧区域中的接触层上的绝缘膜的那些部分的厚度被设定为大于至少电极的厚度。 此外，形成焊盘电极以覆盖电极并且在槽的外侧上的区域的上侧上的绝缘膜上延伸。 位于槽的外侧的区域的上侧的焊盘电极的那些部分的上表面被设定在位于焊盘电极的上侧的焊盘电极的该部分的上表面的上方 岭。

公开(公告)号：US20060273326A1

公开(公告)日：2006-12-07

申请号：US11425595

申请日：2006-06-21

申请人： Osamu Goto ,  Takeharu Asano ,  Yasuhiko Suzuki ,  Motonobu Takeya ,  Katsuyoshi Shibuya ,  Takashi Mizuno ,  Tsuyoshi Tojo ,  Shiro Uchida ,  Masao Ikeda

发明人： Osamu Goto ,  Takeharu Asano ,  Yasuhiko Suzuki ,  Motonobu Takeya ,  Katsuyoshi Shibuya ,  Takashi Mizuno ,  Tsuyoshi Tojo ,  Shiro Uchida ,  Masao Ikeda

IPC分类号： H01L33/00

CPC分类号： H01L33/0075 ,  B82Y20/00 ,  H01L33/04 ,  H01L33/06 ,  H01L33/32 ,  H01S5/0425 ,  H01S5/2004 ,  H01S5/2013 ,  H01S5/3201 ,  H01S5/34333 ,  H01S2301/173 ,  H01S2304/12

摘要： A semiconductor light emitting device made of nitride III-V compound semiconductors includes an active layer made of a first nitride III-V compound semiconductor containing In and Ga, such as InGaN; an intermediate layer made of a second nitride III-V compound semiconductor containing In and Ga and different from the first nitride III-V compound semiconductor, such as InGaN; and a cap layer made of a third nitride III-V compound semiconductor containing Al and Ga, such as p-type AlGaN, which are deposited in sequential contact.

摘要翻译： 由氮化物III-V族化合物半导体制成的半导体发光器件包括由含有In和Ga的第一氮化物III-V化合物半导体构成的有源层，例如InGaN; 由包含In和Ga的不同于第一氮化物III-V化合物半导体的第二氮化物III-V化合物半导体制成的中间层，例如InGaN; 以及由含有Al和Ga的第三氮化物III-V化合物半导体（例如p型AlGaN）制成的覆盖层，其以顺序接触沉积。

公开(公告)号：US06797595B2

公开(公告)日：2004-09-28

申请号：US10350190

申请日：2003-01-24

申请人： Motonobu Takeya

发明人： Motonobu Takeya

IPC分类号： H01L21265

CPC分类号： B82Y20/00 ,  H01L21/3245 ,  H01L33/0095 ,  H01L33/325 ,  H01S5/3063 ,  H01S5/34333 ,  H01S2304/04

摘要： A method of heat-treating a nitride compound semiconductor layer, comprising heating a nitride compound semiconductor layer doped with a p-type impurity at a temperature that is at least 200° C. but less than 400° C. for at least 100 minutes.

摘要翻译： 一种热处理氮化物半导体层的方法，包括在至少200℃但小于400℃的温度下加热掺杂有p型杂质的氮化物半导体层至少100分钟。

公开(公告)号：US07439546B2

公开(公告)日：2008-10-21

申请号：US11425595

申请日：2006-06-21

申请人： Osamu Goto ,  Takeharu Asano ,  Yasuhiko Suzuki ,  Motonobu Takeya ,  Katsuyoshi Shibuya ,  Takashi Mizuno ,  Tsuyoshi Tojo ,  Shiro Uchida ,  Masao Ikeda

发明人： Osamu Goto ,  Takeharu Asano ,  Yasuhiko Suzuki ,  Motonobu Takeya ,  Katsuyoshi Shibuya ,  Takashi Mizuno ,  Tsuyoshi Tojo ,  Shiro Uchida ,  Masao Ikeda

IPC分类号： H01L27/15 ,  H01L33/00

CPC分类号： H01L33/0075 ,  B82Y20/00 ,  H01L33/04 ,  H01L33/06 ,  H01L33/32 ,  H01S5/0425 ,  H01S5/2004 ,  H01S5/2013 ,  H01S5/3201 ,  H01S5/34333 ,  H01S2301/173 ,  H01S2304/12

摘要： A semiconductor light emitting device made of nitride III-V compound semiconductors includes an active layer made of a first nitride III-V compound semiconductor containing In and Ga, such as InGaN; an intermediate layer made of a second nitride III-V compound semiconductor containing In and Ga and different from the first nitride III-V compound semiconductor, such as InGaN; and a cap layer made of a third nitride III-V compound semiconductor containing Al and Ga, such as p-type AlGaN, which are deposited in sequential contact.

公开(公告)号：US07282379B2

公开(公告)日：2007-10-16

申请号：US11086597

申请日：2005-03-22

申请人： Osamu Goto ,  Takeharu Asano ,  Motonobu Takeya ,  Katsunori Yanashima

发明人： Osamu Goto ,  Takeharu Asano ,  Motonobu Takeya ,  Katsunori Yanashima

IPC分类号： H01L21/20

CPC分类号： C30B25/02 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02494 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L33/007 ,  H01S5/0207 ,  H01S5/32341 ,  H01S2304/12

摘要： Provided is a nitride semiconductor having a larger low-defective region on a surface thereof, a semiconductor device using the nitride semiconductor, a method of manufacturing a nitride semiconductor capable of easily reducing surface defects in a step of forming a layer through lateral growth, and a method of manufacturing a semiconductor device manufactured by the use of the nitride semiconductor. A seed crystal portion is formed into stripes on a substrate with a buffer layer sandwiched therebetween. Then, a crystal is grown from the seed crystal portion in two steps of growth conditions to form a nitride semiconductor layer. In a first step, a low temperature growth portion having a trapezoidal-shaped cross section in a layer thickness direction is formed at a growth temperature of 1030° C., and in a second step, lateral growth predominantly takes place at a growth temperature of 1070° C. Then, a high temperature growth potion is formed between the low temperature growth portions. Thereby, hillocks and lattice defects can be reduced in a region of the surface of the nitride semiconductor layer above the low temperature growth portion.

摘要翻译： 提供一种其表面上具有较大缺陷区域的氮化物半导体，使用该氮化物半导体的半导体器件，能够通过横向生长形成层的步骤中能够容易地减少表面缺陷的氮化物半导体的制造方法，以及 制造通过使用氮化物半导体制造的半导体器件的方法。 籽晶部分在衬底上形成条纹，缓冲层夹在其间。 然后，在生长条件的两个步骤中从籽晶部分生长晶体，以形成氮化物半导体层。 在第一步骤中，在1030℃的生长温度下形成具有层厚度方向的梯形截面的低温生长部分，在第二步骤中，横向生长主要发生在生长温度 1070℃。然后，在低温生长部分之间形成高温生长剂。 因此，可以在低温生长部分以上的氮化物半导体层的表面的区域中减小小丘和晶格缺陷。

公开(公告)号：US06861340B2

公开(公告)日：2005-03-01

申请号：US10326072

申请日：2002-12-23

申请人： Motonobu Takeya

发明人： Motonobu Takeya

IPC分类号： C23C16/34 ,  H01L21/26 ,  H01L21/268 ,  H01L21/324 ,  H01L21/331 ,  H01L29/205 ,  H01L29/73 ,  H01L33/00 ,  H01L33/32 ,  H01L33/40 ,  H01S5/323 ,  H01S5/343 ,  H01L21/265 ,  H01L21/425 ,  H01L21/21

CPC分类号： B82Y20/00 ,  H01L21/3245 ,  H01L33/0095 ,  H01L33/325 ,  H01S5/3063 ,  H01S5/34333 ,  H01S2304/04

摘要： A method of heat-treating a nitride compound semiconductor layer, comprising heating a nitride compound semiconductor layer doped with a p-type impurity at a temperature that is at least 200° C. but less than 400° C. for at least 100 minutes.

摘要翻译： 一种热处理氮化物半导体层的方法，包括在至少200℃但小于400℃的温度下加热掺杂有p型杂质的氮化物半导体层至少100分钟。

公开(公告)号：US20050040409A1

公开(公告)日：2005-02-24

申请号：US10932697

申请日：2004-09-02

申请人： Motonobu Takeya ,  Takeharu Asano ,  Masao Ikeda

发明人： Motonobu Takeya ,  Takeharu Asano ,  Masao Ikeda

IPC分类号： H01L33/00 ,  H01L33/04 ,  H01L33/06 ,  H01L33/32 ,  H01S5/02 ,  H01S5/20 ,  H01S5/32 ,  H01S5/323 ,  H01S5/343 ,  H01L29/06

CPC分类号： B82Y20/00 ,  H01L33/007 ,  H01L33/02 ,  H01L33/04 ,  H01S5/0213 ,  H01S5/2004 ,  H01S5/3216 ,  H01S5/34333

摘要： In a semiconductor light emitting device such as a semiconductor laser using nitride III-V compound semiconductors and having a structure interposing an active layer between an n-side cladding layer and a p-side cladding layer, the p-side cladding layer is made of an undoped or n-type first layer 9 and a p-type second layer 12 that are deposited sequentially from nearer to remoter from the active layer. The first layer 9 is not thinner than 50 nm. The p-type second layer 12 includes a p-type third layer having a larger band gap inserted therein as an electron blocking layer. Thus the semiconductor light emitting device is reduced in operation voltage while keeping a thickness of the p-side cladding layer necessary for ensuring favorable optical properties.

摘要翻译： 在使用氮化物III-V族化合物半导体的半导体激光器等半导体发光装置中，在n侧包覆层和p侧覆层之间具有活性层的结构，p侧包覆层由 未掺杂或n型第一层9和p型第二层12，其从有源层更接近地远离沉积。 第一层9不比50nm薄。 p型第二层12包括其中插入较大带隙的p型第三层作为电子阻挡层。 因此，为了确保良好的光学性能，半导体发光器件的操作电压降低，同时保持p侧覆层的厚度。