公开(公告)号：US20160190113A1

公开(公告)日：2016-06-30

申请号：US14583015

申请日：2014-12-24

申请人： SUJIT SHARAN ,  Ravindranath Mahajan ,  Stefan Rusu ,  Donald Gardner

发明人： SUJIT SHARAN ,  Ravindranath Mahajan ,  Stefan Rusu ,  Donald Gardner

IPC分类号： H01L25/18 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065 ,  H01L21/768 ,  H01L21/78 ,  H01L23/48 ,  H01L23/522

CPC分类号： H01L21/78 ,  H01L23/481 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/5384 ,  H01L25/16 ,  H01L28/00 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05548 ,  H01L2224/13025 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/15311 ,  H01L2924/18161

摘要： Integrated passive component in a stacked integrated circuit package are described. In one embodiment an apparatus has a substrate, a first die coupled to the substrate over the substrate, the first die molding a power supply circuit coupled to the substrate to receive power, a second die having a processing core and coupled to the first die over the first die, the first die being coupled to the power supply circuit to power the processing core, a via through the first die, and a passive device formed in the via of the first die and coupled to the power supply circuit.

摘要翻译： 描述了堆叠集成电路封装中的集成无源元件。 在一个实施例中，一种装置具有衬底，第一裸片，耦合到在衬底上的衬底，第一模具模制耦合到衬底以接收功率的电源电路，具有处理芯并且耦合到第一裸片的第二裸片 第一管芯，第一管芯耦合到电源电路以为处理核心供电，通过第一管芯的通孔，以及形成在第一管芯的通孔中并耦合到电源电路的无源器件。

公开(公告)号：US08313958B2

公开(公告)日：2012-11-20

申请号：US12778335

申请日：2010-05-12

申请人： Rajasekaran Swaminathan ,  Ravindranath Mahajan ,  John S. Guzek

发明人： Rajasekaran Swaminathan ,  Ravindranath Mahajan ,  John S. Guzek

IPC分类号： H01L21/50

CPC分类号： H01L24/11 ,  H01L21/563 ,  H01L24/13 ,  H01L24/14 ,  H01L24/81 ,  H01L24/95 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11902 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/1316 ,  H01L2224/1401 ,  H01L2224/1403 ,  H01L2224/14505 ,  H01L2224/16237 ,  H01L2224/81121 ,  H01L2224/81122 ,  H01L2224/81141 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81411 ,  H01L2224/81457 ,  H01L2224/8146 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2224/95133 ,  H01L2224/95136 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2224/81 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2224/81805

摘要： The present disclosure relates to the field of fabricating microelectronic packages, wherein microelectronic devices of the microelectronic packages may have magnetic attachment structures comprising a magnetic material formed on an attachment structure. The microelectronic device may be aligned on a substrate with a magnetic field and then held in place therewith while being attached to the substrate. The microelectronic device may also be aligned with an alignment plate which magnetically aligns and holds the component in place while being packaged.

摘要翻译： 本公开涉及制造微电子封装的领域，其中微电子封装的微电子器件可具有包括形成在附接结构上的磁性材料的磁性附着结构。 微电子器件可以在具有磁场的衬底上对准，然后在附着于衬底的同时保持在其上。 微电子器件还可以与对准板对齐，该对准板在包装时磁性对准并保持组件就位。

公开(公告)号：US20150237713A1

公开(公告)日：2015-08-20

申请号：US14184575

申请日：2014-02-19

申请人： Adel A. Elsherbini ,  Ravindranath Mahajan ,  John S. Guzek ,  Nitin A. Deshpande

发明人： Adel A. Elsherbini ,  Ravindranath Mahajan ,  John S. Guzek ,  Nitin A. Deshpande

IPC分类号： H05K1/02 ,  H01L23/13 ,  H01L25/00 ,  H05K3/36 ,  H01L25/065 ,  H05K1/14 ,  H05K1/11 ,  H01L23/552 ,  H01L23/538

CPC分类号： H05K1/147 ,  H01L23/13 ,  H01L23/49833 ,  H01L23/552 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2924/15192 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K3/361 ,  H05K2201/09245 ,  H05K2201/09681 ,  Y10T29/49126

摘要： Embodiments of the present disclosure are directed towards electro-magnetic interference (EMI) shielding techniques and configurations. In one embodiment, an apparatus includes a first substrate, a die having interconnect structures coupled with the first substrate to route input/output (I/O) signals between the die and the first substrate and a second substrate coupled with the first substrate, wherein the die is disposed between the first substrate and the second substrate and at least one of the first substrate and the second substrate include traces configured to provide electro-magnetic interference (EMI) shielding for the die. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例涉及电磁干扰（EMI）屏蔽技术和配置。 在一个实施例中，一种装置包括第一衬底，具有与第一衬底耦合的互连结构的管芯以在管芯和第一衬底之间路由输入/输出（I / O）信号和与第一衬底耦合的第二衬底， 芯片设置在第一基板和第二基板之间，并且第一基板和第二基板中的至少一个包括被配置为为管芯提供电磁干扰（EMI）屏蔽的迹线。 可以描述和/或要求保护其他实施例。