公开(公告)号：US20160351748A1

公开(公告)日：2016-12-01

申请号：US15130379

申请日：2016-04-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young Hwan PARK ,  Sam Mook KANG ,  Jun Youn KIM ,  Mi Hyun KIM ,  Joo Sung KIM ,  Young Jo TAK

IPC: H01L33/00 ,  H01L33/20 ,  H01L33/12

CPC classification number: H01L33/007 ,  F21K9/237 ,  F21K9/275 ,  F21S41/141 ,  F21S43/14 ,  F21V23/005 ,  F21Y2113/10 ,  F21Y2115/10 ,  H01L21/02439 ,  H01L21/02458 ,  H01L21/02494 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/0265 ,  H01L21/02658 ,  H01L33/12 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49107 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A method of manufacturing a semiconductor substrate may include: forming a buffer layer on a growth substrate; forming a plurality of openings in the buffer layer, the plurality of openings penetrating through the buffer layer and being spaced apart from one another; forming a plurality of cavities on the growth substrate, the plurality of cavities being aligned to respectively correspond to the plurality of openings; growing a semiconductor layer on the buffer layer, the growing the semiconductor layer including filling the plurality of openings with the semiconductor layer; and separating the buffer layer and the semiconductor layer from the growth substrate, wherein a diameter of each of the plurality of openings at a boundary between the growth substrate and the buffer layer is smaller than a diameter of each of the plurality of cavities at the boundary.

Abstract translation: 制造半导体衬底的方法可以包括：在生长衬底上形成缓冲层; 在所述缓冲层中形成多个开口，所述多个开口穿过所述缓冲层并彼此间隔开; 在所述生长衬底上形成多个空腔，所述多个空腔对准分别对应于所述多个开口; 在缓冲层上生长半导体层，生长半导体层，包括用半导体层填充多个开口; 以及从所述生长衬底分离所述缓冲层和所述半导体层，其中在所述生长衬底和所述缓冲层之间的边界处的所述多个开口中的每一个的直径小于所述边界处的所述多个空腔中的每一个的直径 。

公开(公告)号：US20180174823A1

公开(公告)日：2018-06-21

申请号：US15662425

申请日：2017-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mi Hyun KIM ,  Sam Mook KANG ,  Jun Youn KIM ,  Young Jo TAK

IPC: H01L21/02

CPC classification number: H01L21/0254 ,  B08B3/024 ,  B08B3/12 ,  C30B25/02 ,  C30B25/04 ,  C30B25/183 ,  C30B25/186 ,  C30B29/406 ,  H01L21/02027 ,  H01L21/0206 ,  H01L21/02068 ,  H01L21/02096 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02247 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/02307 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/02499 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/02598 ,  H01L21/0262 ,  H01L21/02642 ,  H01L21/02658 ,  H01L21/02664 ,  H01L21/7806

Abstract: A method of manufacturing a gallium nitride substrate, the method including forming a first buffer layer on a silicon substrate such that the first buffer layer has one or more holes therein; forming a second buffer layer on the first buffer layer such that the second buffer layer has one or more holes therein; and forming a GaN layer on the second buffer layer, wherein the one or more holes of the first buffer layer are filled by the second buffer layer.

公开(公告)号：US20160049553A1

公开(公告)日：2016-02-18

申请号：US14828004

申请日：2015-08-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Hyun SIM ,  Geon Wook YOO ,  Mi Hyun KIM ,  Dong Hoon LEE ,  Jin Bock LEE ,  Je Won KIM ,  Hye Seok NOH ,  Dong Kuk LEE

IPC: H01L33/24 ,  H01L33/14 ,  H01L33/08

CPC classification number: H01L33/24 ,  F21K9/232 ,  F21Y2115/10 ,  H01L33/08 ,  H01L33/38

Abstract: A nanostructure semiconductor light emitting device may includes: a base layer having first and second regions and formed of a first conductivity-type semiconductor material; a plurality of light emitting nanostructures disposed on an upper surface of the base layer, each of which including a nanocore formed of the first conductivity-type semiconductor material, and an active layer and a second conductivity-type semiconductor layer sequentially disposed on the nanocore; and a contact electrode disposed on the plurality of light emitting nanostructures, wherein a tip portion of each of light emitting nanostructures disposed on the first region may not be covered with the contact electrode, and a tip portion of each of light emitting nanostructures disposed on the second region may be covered with the contact electrode.

Abstract translation: 纳米结构半导体发光器件可以包括：具有第一和第二区域并由第一导电型半导体材料形成的基极层; 多个发光纳米结构，其设置在所述基底层的上表面上，每一个包括由所述第一导电型半导体材料形成的纳米孔，以及依次设置在所述纳米孔上的有源层和第二导电型半导体层; 以及设置在所述多个发光纳米结构上的接触电极，其中设置在所述第一区域上的每个发光纳米结构的末端部分可以不被所述接触电极覆盖，并且每个所述发光纳米结构的顶端部分设置在所述第一区域上 第二区域可以被接触电极覆盖。

公开(公告)号：US20190189848A1

公开(公告)日：2019-06-20

申请号：US16038368

申请日：2018-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young Jo TAK ,  Sam Mook KANG ,  Mi Hyun KIM ,  Joo Sung KIM ,  Young Hwan PARK ,  Jong Uk SEO

IPC: H01L33/32 ,  H01L33/12 ,  H01L33/10 ,  H01L33/20 ,  H01L33/40 ,  H01L33/04

Abstract: A semiconductor light emitting device includes a light emitting stack including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, a plurality of holes through the second conductive semiconductor layer and the active layer, a trench extending along an edge of the light emitting stack, the trench extending through the second conductive semiconductor layer and the active layer, and a reflective metal layer within the plurality of holes and within the trench.

公开(公告)号：US20190189841A1

公开(公告)日：2019-06-20

申请号：US16012831

申请日：2018-06-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young Hwan PARK ,  Mi Hyun KIM ,  Joo Sung KIM

IPC: H01L33/06 ,  H01L33/32 ,  H01L33/24 ,  H01L33/42 ,  H01L33/44 ,  H01L33/14 ,  H01L33/40 ,  H01L33/00

CPC classification number: H01L33/06 ,  H01L33/0025 ,  H01L33/0075 ,  H01L33/145 ,  H01L33/24 ,  H01L33/32 ,  H01L33/405 ,  H01L33/42 ,  H01L33/44 ,  H01L2933/0016 ,  H01L2933/0025

Abstract: An ultraviolet light emitting device including a first conductivity-type AlGaN semiconductor layer; an active layer disposed on the first conductivity-type AlGaN semiconductor layer and having an AlGaN semiconductor; a second conductivity-type AlGaN semiconductor layer disposed on the active layer and having an upper surface divided into a first region and a second region; second conductivity-type nitride patterns disposed on the first region of the second conductivity-type AlGaN semiconductor layer and having an energy band gap that is smaller than an energy band gap of the second conductivity-type AlGaN semiconductor layer; a transparent electrode layer covering the second conductivity-type nitride patterns and the second region of the second conductivity-type AlGaN semiconductor layer; a light-transmissive dielectric layer disposed on the transparent electrode layer between the second conductivity-type nitride patterns; and a metal electrode disposed on the transparent electrode layer overlying the second conductivity type nitride patterns and on the light-transmissive dielectric layer.

公开(公告)号：US20190189877A1

公开(公告)日：2019-06-20

申请号：US16018542

申请日：2018-06-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mi Hyun KIM ,  Young Hwan PARK ,  Sam Mook KANG ,  Joo Sung KIM ,  Jong Uk SEO ,  Young Jo TAK

IPC: H01L33/62 ,  H01L33/40 ,  H01L33/38 ,  H01L33/64

Abstract: A light emitting device package includes a package substrate and a submount on the package substrate. An upper surface of the submount includes a central region, first and second base regions spaced from the package substrate, relative to the central region, and a sloped region between the central region and the first and second base regions. A light emitting device chip is in the central region. A first electrode layer is between the central region and the light emitting device chip and extends onto the sloped region and the first base region. A second electrode layer is between the central region and the light emitting device chip, extends onto the sloped region and the second base region, and is spaced apart from the first electrode layer. First and second reflective layers are on the first and second electrode layers, respectively, and overlap the sloped region.

公开(公告)号：US20190181298A1

公开(公告)日：2019-06-13

申请号：US16014073

申请日：2018-06-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young Hwan PARK ,  Mi Hyun KIM ,  Jong Uk SEO

IPC: H01L33/32 ,  H01L33/20 ,  H01L33/06 ,  H01L33/40 ,  H01L33/00

Abstract: An ultraviolet semiconductor light emitting device includes a semiconductor stack, a trench, a filling insulator, and first and second electrodes. The semiconductor stack includes first and second conductivity-type semiconductor layers and an active layer therebetween that includes an AlGaN semiconductor material. The trench extends through the second conductivity-type semiconductor layer and the active layer to the first conductivity-type semiconductor layer and has a first width. The filling insulator fills the trench such that the filling insulator extends at least through the active layer in the trench and includes of an insulating material having a particular refractive index. The first electrode is connected to the first conductivity-type semiconductor layer, and the second electrode is connected to the second conductivity-type semiconductor layer.

公开(公告)号：US20170358443A1

公开(公告)日：2017-12-14

申请号：US15399898

申请日：2017-01-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young Jo TAK ,  Sam Mook KANG ,  Mi Hyun KIM ,  Jun Youn KIM ,  Young Soo PARK

IPC: H01L21/02 ,  H01L21/304 ,  H01L21/306

CPC classification number: H01L21/0254 ,  H01L21/02381 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02507 ,  H01L21/0251 ,  H01L21/02513 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/304 ,  H01L21/30604

Abstract: A method of manufacturing a nitride semiconductor substrate includes providing a silicon substrate having a first surface and a second surface opposing each other, growing a nitride template on the first surface of the silicon substrate in a first growth chamber, in which a silicon compound layer is formed on the second surface of the silicon substrate in a growth process of the nitride template, removing the silicon compound layer from the second surface of the silicon substrate, growing a group III nitride single crystal on the nitride template in a second growth chamber, and removing the silicon substrate from the second growth chamber.

公开(公告)号：US20170069785A1

公开(公告)日：2017-03-09

申请号：US15183869

申请日：2016-06-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young Jo TAK ,  Sam Mook KANG ,  Mi Hyun KIM ,  Jun Youn KIM ,  Young Soo PARK ,  Misaichi TAKEUCHI

IPC: H01L33/00 ,  H01L21/02 ,  H01L21/78 ,  H01L21/683 ,  H01L21/306

CPC classification number: H01L33/0075 ,  H01L21/02005 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02664 ,  H01L21/30604 ,  H01L21/6835 ,  H01L21/7806 ,  H01L33/0066 ,  H01L33/0079

Abstract: A method of manufacturing a semiconductor substrate may include forming a first semiconductor layer on a growth substrate, forming a second semiconductor layer on the first semiconductor layer, forming a plurality of voids in the first semiconductor layer by removing portions of the first semiconductor layer that are exposed by a plurality of trenches in the second semiconductor layer, forming a third semiconductor layer on the second semiconductor layer and covering the plurality of trenches, and separating the second and third semiconductor layers from the growth substrate. on the first semiconductor layer. The third semiconductor layer are grown from the second semiconductor layer and extend above the second semiconductor layer.

Abstract translation: 制造半导体衬底的方法可以包括在生长衬底上形成第一半导体层，在第一半导体层上形成第二半导体层，在第一半导体层中形成多个空隙，通过去除第一半导体层的部分 在所述第二半导体层中由多个沟槽暴露，在所述第二半导体层上形成第三半导体层并覆盖所述多个沟槽，以及从所述生长衬底分离所述第二和第三半导体层。 在第一半导体层上。 第三半导体层从第二半导体层生长并在第二半导体层上方延伸。