公开(公告)号：US20160351748A1

公开(公告)日：2016-12-01

申请号：US15130379

申请日：2016-04-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young Hwan PARK ,  Sam Mook KANG ,  Jun Youn KIM ,  Mi Hyun KIM ,  Joo Sung KIM ,  Young Jo TAK

IPC: H01L33/00 ,  H01L33/20 ,  H01L33/12

CPC classification number: H01L33/007 ,  F21K9/237 ,  F21K9/275 ,  F21S41/141 ,  F21S43/14 ,  F21V23/005 ,  F21Y2113/10 ,  F21Y2115/10 ,  H01L21/02439 ,  H01L21/02458 ,  H01L21/02494 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/0265 ,  H01L21/02658 ,  H01L33/12 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49107 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A method of manufacturing a semiconductor substrate may include: forming a buffer layer on a growth substrate; forming a plurality of openings in the buffer layer, the plurality of openings penetrating through the buffer layer and being spaced apart from one another; forming a plurality of cavities on the growth substrate, the plurality of cavities being aligned to respectively correspond to the plurality of openings; growing a semiconductor layer on the buffer layer, the growing the semiconductor layer including filling the plurality of openings with the semiconductor layer; and separating the buffer layer and the semiconductor layer from the growth substrate, wherein a diameter of each of the plurality of openings at a boundary between the growth substrate and the buffer layer is smaller than a diameter of each of the plurality of cavities at the boundary.

Abstract translation: 制造半导体衬底的方法可以包括：在生长衬底上形成缓冲层; 在所述缓冲层中形成多个开口，所述多个开口穿过所述缓冲层并彼此间隔开; 在所述生长衬底上形成多个空腔，所述多个空腔对准分别对应于所述多个开口; 在缓冲层上生长半导体层，生长半导体层，包括用半导体层填充多个开口; 以及从所述生长衬底分离所述缓冲层和所述半导体层，其中在所述生长衬底和所述缓冲层之间的边界处的所述多个开口中的每一个的直径小于所述边界处的所述多个空腔中的每一个的直径 。

公开(公告)号：US20190189846A1

公开(公告)日：2019-06-20

申请号：US16051684

申请日：2018-08-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young Hwan PARK ,  Joo Sung KIM ,  Young Jo TAK

IPC: H01L33/20 ,  H01L33/32 ,  H01L33/14 ,  H01L33/06 ,  H01L33/44 ,  H01L33/00

CPC classification number: H01L33/20 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/025 ,  H01L33/06 ,  H01L33/12 ,  H01L33/14 ,  H01L33/145 ,  H01L33/32 ,  H01L33/40 ,  H01L33/44 ,  H01L2933/0016 ,  H01L2933/0025

Abstract: An embodiment of the present inventive concept provides an ultraviolet light emitting device comprising: a substrate having a concave or convex edge pattern disposed along an edge of an upper surface thereof; a semiconductor laminate disposed on the substrate and including first and second conductivity-type AlGaN semiconductor layers and an active layer disposed between the first and second conductivity-type AlGaN semiconductor layers and having an AlGaN semiconductor; a plurality of uneven portions extending from the edge pattern along the side surface of the semiconductor laminate in a stacking direction; and first and second electrodes connected to the first and second conductivity-type AlGaN semiconductor layers, respectively.

公开(公告)号：US20220246803A1

公开(公告)日：2022-08-04

申请号：US17720923

申请日：2022-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young Jo TAK ,  Joo Sung KIM ,  Jong Uk SEO ,  Dong Gun LEE ,  Yong Il KIM

IPC: H01L33/38 ,  H01L33/62 ,  H01L25/075 ,  H01L33/52

Abstract: A method of manufacturing a semiconductor light emitting device, the method including forming a first conductivity-type semiconductor layer on a substrate; forming an active layer on the first conductivity-type semiconductor layer; forming a mask layer having an opening on the active layer; growing a second conductivity-type semiconductor layer through the opening; removing the mask layer; removing a portion of the active layer and a portion of the first conductivity-type semiconductor layer that do not overlap the second conductivity-type semiconductor layer; and removing a portion of the first conductivity-type semiconductor layer to expose the substrate.

公开(公告)号：US20190189848A1

公开(公告)日：2019-06-20

申请号：US16038368

申请日：2018-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young Jo TAK ,  Sam Mook KANG ,  Mi Hyun KIM ,  Joo Sung KIM ,  Young Hwan PARK ,  Jong Uk SEO

IPC: H01L33/32 ,  H01L33/12 ,  H01L33/10 ,  H01L33/20 ,  H01L33/40 ,  H01L33/04

Abstract: A semiconductor light emitting device includes a light emitting stack including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, a plurality of holes through the second conductive semiconductor layer and the active layer, a trench extending along an edge of the light emitting stack, the trench extending through the second conductive semiconductor layer and the active layer, and a reflective metal layer within the plurality of holes and within the trench.

公开(公告)号：US20200303593A1

公开(公告)日：2020-09-24

申请号：US16571741

申请日：2019-09-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young Jo TAK ,  Joo Sung KIM ,  Jong Uk SEO ,  Dong Gun LEE ,  Yong Il KIM

IPC: H01L33/38 ,  H01L33/52 ,  H01L33/62 ,  H01L25/075

Abstract: A semiconductor light emitting device includes a first conductivity-type semiconductor layer; an active layer covering a portion of the first conductivity-type semiconductor layer; and a second conductivity-type semiconductor layer covering a portion of the active layer, and sidewalls of the second conductivity-type semiconductor layer are spaced apart from sidewalls of the active layer along a horizontal direction.

公开(公告)号：US20180174823A1

公开(公告)日：2018-06-21

申请号：US15662425

申请日：2017-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mi Hyun KIM ,  Sam Mook KANG ,  Jun Youn KIM ,  Young Jo TAK

IPC: H01L21/02

CPC classification number: H01L21/0254 ,  B08B3/024 ,  B08B3/12 ,  C30B25/02 ,  C30B25/04 ,  C30B25/183 ,  C30B25/186 ,  C30B29/406 ,  H01L21/02027 ,  H01L21/0206 ,  H01L21/02068 ,  H01L21/02096 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02247 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/02307 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/02499 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/02598 ,  H01L21/0262 ,  H01L21/02642 ,  H01L21/02658 ,  H01L21/02664 ,  H01L21/7806

Abstract: A method of manufacturing a gallium nitride substrate, the method including forming a first buffer layer on a silicon substrate such that the first buffer layer has one or more holes therein; forming a second buffer layer on the first buffer layer such that the second buffer layer has one or more holes therein; and forming a GaN layer on the second buffer layer, wherein the one or more holes of the first buffer layer are filled by the second buffer layer.

公开(公告)号：US20190189877A1

公开(公告)日：2019-06-20

申请号：US16018542

申请日：2018-06-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mi Hyun KIM ,  Young Hwan PARK ,  Sam Mook KANG ,  Joo Sung KIM ,  Jong Uk SEO ,  Young Jo TAK

IPC: H01L33/62 ,  H01L33/40 ,  H01L33/38 ,  H01L33/64

Abstract: A light emitting device package includes a package substrate and a submount on the package substrate. An upper surface of the submount includes a central region, first and second base regions spaced from the package substrate, relative to the central region, and a sloped region between the central region and the first and second base regions. A light emitting device chip is in the central region. A first electrode layer is between the central region and the light emitting device chip and extends onto the sloped region and the first base region. A second electrode layer is between the central region and the light emitting device chip, extends onto the sloped region and the second base region, and is spaced apart from the first electrode layer. First and second reflective layers are on the first and second electrode layers, respectively, and overlap the sloped region.

公开(公告)号：US20170358443A1

公开(公告)日：2017-12-14

申请号：US15399898

申请日：2017-01-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young Jo TAK ,  Sam Mook KANG ,  Mi Hyun KIM ,  Jun Youn KIM ,  Young Soo PARK

IPC: H01L21/02 ,  H01L21/304 ,  H01L21/306

CPC classification number: H01L21/0254 ,  H01L21/02381 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02507 ,  H01L21/0251 ,  H01L21/02513 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/304 ,  H01L21/30604

Abstract: A method of manufacturing a nitride semiconductor substrate includes providing a silicon substrate having a first surface and a second surface opposing each other, growing a nitride template on the first surface of the silicon substrate in a first growth chamber, in which a silicon compound layer is formed on the second surface of the silicon substrate in a growth process of the nitride template, removing the silicon compound layer from the second surface of the silicon substrate, growing a group III nitride single crystal on the nitride template in a second growth chamber, and removing the silicon substrate from the second growth chamber.

公开(公告)号：US20170069785A1

公开(公告)日：2017-03-09

申请号：US15183869

申请日：2016-06-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young Jo TAK ,  Sam Mook KANG ,  Mi Hyun KIM ,  Jun Youn KIM ,  Young Soo PARK ,  Misaichi TAKEUCHI

IPC: H01L33/00 ,  H01L21/02 ,  H01L21/78 ,  H01L21/683 ,  H01L21/306

CPC classification number: H01L33/0075 ,  H01L21/02005 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02664 ,  H01L21/30604 ,  H01L21/6835 ,  H01L21/7806 ,  H01L33/0066 ,  H01L33/0079

Abstract: A method of manufacturing a semiconductor substrate may include forming a first semiconductor layer on a growth substrate, forming a second semiconductor layer on the first semiconductor layer, forming a plurality of voids in the first semiconductor layer by removing portions of the first semiconductor layer that are exposed by a plurality of trenches in the second semiconductor layer, forming a third semiconductor layer on the second semiconductor layer and covering the plurality of trenches, and separating the second and third semiconductor layers from the growth substrate. on the first semiconductor layer. The third semiconductor layer are grown from the second semiconductor layer and extend above the second semiconductor layer.

Abstract translation: 制造半导体衬底的方法可以包括在生长衬底上形成第一半导体层，在第一半导体层上形成第二半导体层，在第一半导体层中形成多个空隙，通过去除第一半导体层的部分 在所述第二半导体层中由多个沟槽暴露，在所述第二半导体层上形成第三半导体层并覆盖所述多个沟槽，以及从所述生长衬底分离所述第二和第三半导体层。 在第一半导体层上。 第三半导体层从第二半导体层生长并在第二半导体层上方延伸。