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公开(公告)号:US08420951B2
公开(公告)日:2013-04-16
申请号:US13162547
申请日:2011-06-16
申请人: Shih-Hao Sun , Chang-Fu Chen
发明人: Shih-Hao Sun , Chang-Fu Chen
IPC分类号: H05K3/00
CPC分类号: H01L21/563 , H01L21/4821 , H01L21/568 , H01L23/49582 , H01L24/48 , H01L24/73 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/85001 , H01L2924/00014 , H01L2924/12041 , H01L2924/12042 , H01L2924/181 , H01L2924/3025 , Y10T29/49124 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A manufacturing method of a package structure is provided. In the manufacturing method, a metal substrate having a seed layer is provided. A patterned circuit layer is formed on a portion of the seed layer. A first patterned dry film layer is formed on the other portion of the seed layer. A surface treatment layer is electroplated on the patterned circuit layer with use of the first patterned dry film layer as an electroplating mask. The first patterned dry film layer is removed. A chip bonding process is performed to electrically connect a chip to the surface treatment layer. An encapsulant is formed on the metal substrate. The encapsulant encapsulates the chip, the surface treatment layer, and the patterned circuit layer. The metal substrate and the seed layer are removed to expose a bottom surface of the encapsulant and a lower surface of the patterned circuit layer.
摘要翻译: 提供一种封装结构的制造方法。 在制造方法中,提供具有种子层的金属基板。 在种子层的一部分上形成图案化电路层。 第一图案化的干膜层形成在种子层的另一部分上。 使用第一图案化的干膜层作为电镀掩模,在图案化电路层上电镀表面处理层。 去除第一图案干膜层。 执行芯片接合工艺以将芯片电连接到表面处理层。 在金属基板上形成密封剂。 密封剂封装芯片,表面处理层和图案化电路层。 除去金属基底和种子层以露出密封剂的底表面和图案化电路层的下表面。
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公开(公告)号:US20130095615A1
公开(公告)日:2013-04-18
申请号:US13692971
申请日:2012-12-03
申请人: Shih-Hao Sun , Chang-Fu Chen
发明人: Shih-Hao Sun , Chang-Fu Chen
IPC分类号: H01L21/56
CPC分类号: H01L21/563 , H01L21/4821 , H01L21/568 , H01L23/49582 , H01L24/48 , H01L24/73 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/85001 , H01L2924/00014 , H01L2924/12041 , H01L2924/12042 , H01L2924/181 , H01L2924/3025 , Y10T29/49124 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A manufacturing method of a package structure is provided. In the manufacturing method, a metal substrate having a seed layer is provided. A patterned circuit layer is formed on a portion of the seed layer. A first patterned dry film layer is formed on the other portion of the seed layer. A surface treatment layer is electroplated on the patterned circuit layer with use of the first patterned dry film layer as an electroplating mask. The first patterned dry film layer is removed. A chip bonding process is performed to electrically connect a chip to the surface treatment layer. An encapsulant is formed on the metal substrate. The encapsulant encapsulates the chip, the surface treatment layer, and the patterned circuit layer. The metal substrate and the seed layer are removed to expose a bottom surface of the encapsulant and a lower surface of the patterned circuit layer.
摘要翻译: 提供一种封装结构的制造方法。 在制造方法中,提供具有种子层的金属基板。 在种子层的一部分上形成图案化电路层。 第一图案化的干膜层形成在种子层的另一部分上。 使用第一图案化干膜层作为电镀掩模,在图案化电路层上电镀表面处理层。 去除第一图案干膜层。 执行芯片接合工艺以将芯片电连接到表面处理层。 在金属基板上形成密封剂。 密封剂封装芯片,表面处理层和图案化电路层。 除去金属基底和种子层以露出密封剂的底表面和图案化电路层的下表面。
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公开(公告)号:US08893379B2
公开(公告)日:2014-11-25
申请号:US13692971
申请日:2012-12-03
申请人: Shih-Hao Sun , Chang-Fu Chen
发明人: Shih-Hao Sun , Chang-Fu Chen
IPC分类号: H05K3/30 , H01L21/56 , H01L21/48 , H01L23/495 , H01L23/00
CPC分类号: H01L21/563 , H01L21/4821 , H01L21/568 , H01L23/49582 , H01L24/48 , H01L24/73 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/85001 , H01L2924/00014 , H01L2924/12041 , H01L2924/12042 , H01L2924/181 , H01L2924/3025 , Y10T29/49124 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A manufacturing method of a package structure is provided. In the manufacturing method, a metal substrate having a seed layer is provided. A patterned circuit layer is formed on a portion of the seed layer. A first patterned dry film layer is formed on the other portion of the seed layer. A surface treatment layer is electroplated on the patterned circuit layer with use of the first patterned dry film layer as an electroplating mask. The first patterned dry film layer is removed. A chip bonding process is performed to electrically connect a chip to the surface treatment layer. An encapsulant is formed on the metal substrate. The encapsulant encapsulates the chip, the surface treatment layer, and the patterned circuit layer. The metal substrate and the seed layer are removed to expose a bottom surface of the encapsulant and a lower surface of the patterned circuit layer.
摘要翻译: 提供一种封装结构的制造方法。 在制造方法中,提供具有种子层的金属基板。 在种子层的一部分上形成图案化电路层。 第一图案化的干膜层形成在种子层的另一部分上。 使用第一图案化干膜层作为电镀掩模,在图案化电路层上电镀表面处理层。 去除第一图案干膜层。 执行芯片接合工艺以将芯片电连接到表面处理层。 在金属基板上形成密封剂。 密封剂封装芯片,表面处理层和图案化电路层。 除去金属基底和种子层以露出密封剂的底表面和图案化电路层的下表面。
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公开(公告)号:US20120279772A1
公开(公告)日:2012-11-08
申请号:US13162547
申请日:2011-06-16
申请人: Shih-Hao Sun , Chang-Fu Chen
发明人: Shih-Hao Sun , Chang-Fu Chen
CPC分类号: H01L21/563 , H01L21/4821 , H01L21/568 , H01L23/49582 , H01L24/48 , H01L24/73 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/85001 , H01L2924/00014 , H01L2924/12041 , H01L2924/12042 , H01L2924/181 , H01L2924/3025 , Y10T29/49124 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A manufacturing method of a package structure is provided. In the manufacturing method, a metal substrate having a seed layer is provided. A patterned circuit layer is formed on a portion of the seed layer. A first patterned dry film layer is formed on the other portion of the seed layer. A surface treatment layer is electroplated on the patterned circuit layer with use of the first patterned dry film layer as an electroplating mask. The first patterned dry film layer is removed. A chip bonding process is performed to electrically connect a chip to the surface treatment layer. An encapsulant is formed on the metal substrate. The encapsulant encapsulates the chip, the surface treatment layer, and the patterned circuit layer. The metal substrate and the seed layer are removed to expose a bottom surface of the encapsulant and a lower surface of the patterned circuit layer.
摘要翻译: 提供一种封装结构的制造方法。 在制造方法中,提供具有种子层的金属基板。 在种子层的一部分上形成图案化电路层。 第一图案化的干膜层形成在种子层的另一部分上。 使用第一图案化干膜层作为电镀掩模,在图案化电路层上电镀表面处理层。 去除第一图案干膜层。 执行芯片接合工艺以将芯片电连接到表面处理层。 在金属基板上形成密封剂。 密封剂封装芯片,表面处理层和图案化电路层。 除去金属基底和种子层以露出密封剂的底表面和图案化电路层的下表面。
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公开(公告)号:US09204560B2
公开(公告)日:2015-12-01
申请号:US14547147
申请日:2014-11-19
申请人: Shih-Hao Sun
发明人: Shih-Hao Sun
IPC分类号: H05K3/12 , H05K3/42 , H01L23/498 , H01L21/48 , H01L21/447 , H01L33/64
CPC分类号: H05K3/42 , H01L21/447 , H01L21/486 , H01L23/49827 , H01L33/642 , H01L2224/16225 , H01L2224/16227 , H01L2924/00014 , H01L2924/15311 , Y10T29/49165 , H01L2224/0401
摘要: A manufacturing method of a package carrier is provided. An insulation substrate having an upper surface, a lower surface, plural cavities located at the lower surface and plural through holes passing through the insulation substrate and respectively communicating with the cavities is provided. Plural vias is defined by the cavities and the through holes. A conductive material filling up the vias is formed to define plural conductive posts. An insulation layer having a top surface and plural blind vias extending from the top surface to the conductive posts is formed on the upper surface. A patterned circuit layer filling up the blind vias, being connected to the conductive posts and exposing a portion of the top surface is formed on the top surface. A solder mask layer is formed on the patterned circuit layer and has plural openings exposing a portion of the patterned circuit layer to define plural pads.
摘要翻译: 提供了一种封装载体的制造方法。 提供了具有上表面,下表面,位于下表面的多个空腔和穿过绝缘基板并分别与空腔连通的多个通孔的绝缘基板。 多个通孔由腔和通孔限定。 填充通孔的导电材料形成为限定多个导电柱。 在上表面上形成有从上表面延伸到导电柱的顶表面和多个盲孔的绝缘层。 填充盲孔的图案化电路层形成在顶表面上,连接到导电柱并暴露顶表面的一部分。 在图案化电路层上形成焊料掩模层,并且具有暴露图案化电路层的一部分以限定多个焊盘的多个开口。
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公开(公告)号:US08704101B2
公开(公告)日:2014-04-22
申请号:US13539505
申请日:2012-07-02
申请人: Shih-Hao Sun
发明人: Shih-Hao Sun
CPC分类号: H01L23/3677 , H01L23/3121 , H01L23/5383 , H01L23/5389 , H01L25/16 , H01L25/167 , H01L33/64 , H01L2224/48091 , H01L2224/48228 , H01L2924/181 , H05K1/0204 , H05K1/185 , H05K3/4602 , H05K2201/09581 , H05K2201/10416 , H05K2203/1469 , Y10T29/49139 , H01L2924/00014 , H01L2924/00012
摘要: In a manufacturing method of a package carrier, a substrate having an upper surface, a lower surface, and an opening communicating the two surfaces is provided. An electronic device is disposed inside the opening. A first insulation layer and a superimposed first metal layer are laminated on the upper surface; a second insulation layer and a superimposed second metal layer are laminated on the lower surface. The opening is filled with the first and second insulation layers. First blind holes, second blind holes, and a heat-dissipation channel are formed. A third metal layer is formed on the first and second blind holes and an inner wall of the heat-dissipation channel. A heat-conducting device is disposed inside the heat-dissipation channel and fixed into the heat-dissipation channel via an insulation material. The first and second metal layers are patterned to form a first patterned metal layer and a second patterned metal layer.
摘要翻译: 在包装载体的制造方法中,提供具有上表面,下表面和连通两个表面的开口的基板。 电子设备设置在开口内。 第一绝缘层和叠置的第一金属层层叠在上表面上; 第二绝缘层和叠加的第二金属层层叠在下表面上。 开口填充有第一和第二绝缘层。 形成第一盲孔,第二盲孔和散热通道。 在第一和第二盲孔和散热通道的内壁上形成第三金属层。 导热装置设置在散热通道的内部并通过绝缘材料固定到散热通道中。 图案化第一和第二金属层以形成第一图案化金属层和第二图案化金属层。
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公开(公告)号:US20130260512A1
公开(公告)日:2013-10-03
申请号:US13906355
申请日:2013-05-31
申请人: Shih-Hao Sun
发明人: Shih-Hao Sun
IPC分类号: H01L21/56
CPC分类号: H01L21/56 , H01L33/486 , H01L33/641 , H01L33/642 , H01L2224/48091 , H01L2224/48247 , H01L2924/3025 , H01L2924/00014 , H01L2924/00
摘要: A manufacturing method of a package structure is provided. A seed layer is formed on a upper surface of a metal substrate. A patterned dry film layer is formed on a lower surface of the metal substrate and the seed layer. A portion of the seed layer is exposed by the patterned dry film layer. The patterned dry film layer is used as an electroplating mask to electroplate a circuit layer on the portion of the seed layer exposed by the patterned dry film layer. A chip is bonded to and electrically connected to the circuit layer. A molding compound is formed on the metal substrate. The molding compound encapsulates the chip, the circuit layer and the portion of the seed layer. A portion of the metal substrate and a portion of the seed layer are removed so as to expose a portion of the molding compound.
摘要翻译: 提供一种封装结构的制造方法。 种子层形成在金属基板的上表面上。 在金属基板的下表面和种子层上形成图案化的干膜层。 种子层的一部分被图案化的干膜层曝光。 图案化的干膜层用作电镀掩模,以在由图案化的干膜层暴露的种子层的部分上电镀电路层。 芯片被接合并电连接到电路层。 在金属基材上形成模塑料。 模塑料封装芯片,电路层和种子层的部分。 去除金属基材的一部分和种子层的一部分,以暴露部分模塑料。
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公开(公告)号:US20120293977A1
公开(公告)日:2012-11-22
申请号:US13288972
申请日:2011-11-04
申请人: Shih-Hao Sun
发明人: Shih-Hao Sun
CPC分类号: H05K13/00 , H01L23/13 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L2224/16225 , H01L2224/16227 , H01L2924/12041 , H01L2924/15788 , H05K1/0207 , H05K1/185 , Y10T29/49002 , Y10T29/49126 , Y10T29/49146 , H01L2924/00
摘要: A manufacturing method of a package structure is provided. A substrate having an upper surface and a lower surface opposite to each other and an opening communicating the surfaces is provided. An electronic device is configured in the opening. An adhesive layer and a patterned metal layer located on the adhesive layer are laminated on the lower surface and expose a bottom surface of the electronic device. A heat-dissipating column is formed on the bottom surface exposed by the adhesive layer and the patterned metal layer and connects the patterned metal layer and the bottom surface. A first and a second laminated structures are laminated on the upper surface of the substrate and the patterned metal layer, respectively. The first laminated structure covers the upper surface of the substrate and a top surface of the electronic device. The second laminated structure covers the heat-dissipating column and the patterned metal layer.
摘要翻译: 提供一种封装结构的制造方法。 提供具有彼此相对的上表面和下表面的基板以及连通表面的开口。 电子设备配置在开口中。 位于粘合剂层上的粘合剂层和图案化的金属层层压在下表面上并暴露电子器件的底表面。 在由粘合层和图案化金属层露出的底面上形成散热柱,并连接图案化的金属层和底面。 第一和第二层压结构分别层叠在基板的上表面和图案化的金属层上。 第一层压结构覆盖基板的上表面和电子设备的顶表面。 第二层压结构覆盖散热柱和图案化的金属层。
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公开(公告)号:US09153521B2
公开(公告)日:2015-10-06
申请号:US13162549
申请日:2011-06-16
申请人: Shih-Hao Sun
发明人: Shih-Hao Sun
IPC分类号: H01L23/427 , H01C17/02 , H01L23/367 , H01L23/13 , H01L23/498 , H01L33/48
CPC分类号: H01L23/427 , H01C17/02 , H01L23/13 , H01L23/367 , H01L23/498 , H01L33/486 , H01L2224/48091 , H01L2224/48137 , H01L2933/0075 , Y10T29/49083 , Y10T29/49087 , Y10T29/49126 , Y10T29/49353 , H01L2924/00014
摘要: A method of manufacturing a package carrier is provided. An insulation cover is provided. The insulation cover has an inner surface and an outer surface opposite to each other, a plurality of openings, and a containing space. A patterned metal layer is formed on the outer surface of the insulation cover. A surface treatment layer is formed on the patterned metal layer. A heat dissipation element is formed in the containing space of the insulation cover and structurally connected to the insulation cover. A thermal-conductive layer is formed on a surface of the heat dissipation element, and a portion of the thermal-conductive layer is exposed by the openings of the insulation cover.
摘要翻译: 提供一种制造封装载体的方法。 提供绝缘盖。 绝缘盖具有彼此相对的内表面和外表面,多个开口和容纳空间。 在绝缘盖的外表面上形成图案化的金属层。 在图案化金属层上形成表面处理层。 散热元件形成在绝缘盖的容纳空间中并且结构地连接到绝缘盖。 在散热元件的表面上形成导热层,并且导热层的一部分被绝缘盖的开口露出。
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公开(公告)号:US20150090481A1
公开(公告)日:2015-04-02
申请号:US14086987
申请日:2013-11-22
申请人: Shih-Hao Sun
发明人: Shih-Hao Sun
CPC分类号: H01L24/85 , H01L21/4825 , H01L21/4832 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/49541 , H01L23/49582 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/81 , H01L24/83 , H01L2221/68345 , H01L2221/68359 , H01L2224/16245 , H01L2224/2919 , H01L2224/32245 , H01L2224/48091 , H01L2224/48105 , H01L2224/48245 , H01L2224/81005 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/8149 , H01L2224/83005 , H01L2224/83439 , H01L2224/83444 , H01L2224/83447 , H01L2224/8349 , H01L2224/85 , H01L2224/85005 , H01L2224/85439 , H01L2224/85444 , H01L2224/85447 , H01L2224/8549 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/3511 , H05K1/09 , H05K1/111 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要: A manufacturing method of a package carrier includes the following steps. Firstly, two base metal layers are bonded together. Then, two supporting layers are laminated onto the base metal layers respectively. Next, two release metal films are disposed on the supporting layers respectively, wherein each of the release metal films includes a first metal film and a second metal film separable from each other. Next, two patterned metal layers are formed on the release metal films respectively, wherein each of the patterned metal layers is suitable for carrying and electrically connected to a chip. Then, the base metal layers are separated from each other to form two package carriers independent from each other. A package carrier formed by the manufacturing method described above is also provided.
摘要翻译: 包装载体的制造方法包括以下步骤。 首先,将两个基底金属层接合在一起。 然后,将两个支撑层分别层压到基底金属层上。 接下来,分别在支撑层上设置两个释放金属膜,其中每个剥离金属膜包括可彼此分离的第一金属膜和第二金属膜。 接下来,分别在剥离金属膜上形成两个图案化的金属层,其中每个图案化的金属层适于承载并电连接到芯片。 然后,基底金属层彼此分离以形成彼此独立的两个封装载体。 还提供了通过上述制造方法形成的封装载体。
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