公开(公告)号：US06252777B1

公开(公告)日：2001-06-26

申请号：US09402946

申请日：1999-10-13

申请人： Takashi Ikeda ,  Masatoshi Akagawa ,  Daisuke Ito

发明人： Takashi Ikeda ,  Masatoshi Akagawa ,  Daisuke Ito

IPC分类号： H05K114

CPC分类号： G06K19/0775 ,  G06K19/07749 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

摘要： An IC card, which can be mass-produced at low cost, is composed of a plane coil formed by means of punching or etching. The plane coil 10 in which a conductor line 11 is wound a plurality of times in substantially the same plane is formed by punching, terminals 10a, 10b of the plane coil 10 and electrode terminals 12a, 12b of the semiconductor element 12 are electrically connected to each other, the plane coil 10 is provided with an outside terminal 10a formed outside the coil and an inside terminal formed inside the coil, the semiconductor element 12 is arranged in such a manner that a forming face on which the electrode terminals 12a, 12b are formed or a plane reverse to the forming face is opposed to the conductor line 11 of the plane coil 10, the electrode terminals 12a, 12b of the semiconductor element 12 are respectively located adjacent to the outside terminal 10a and the inside terminal 10b of the plane coil 10, and the electrode terminals 12a, 12b are electrically connected to the terminals 10a, 10b of the plane coil 10 located on the same side with respect to the inside and outside of the coil.

摘要翻译： 可以以低成本批量生产的IC卡由通过冲压或蚀刻形成的平面线圈构成。 通过冲孔形成导体线11在基本相同的平面中多次缠绕的平面线圈10，平面线圈10的端子10a，10b和半导体元件12的电极端子12a，12b电连接到 彼此之间，平面线圈10设置有形成在线圈外部的外部端子10a和形成在线圈内部的内部端子，半导体元件12以这样的方式配置，使得其上形成有电极端子12a，12b的形成面 形成的或与成形面相反的平面与平面线圈10的导体线11相对，半导体元件12的电极端子12a，12b分别位于与外部端子10a和平面的内部端子10b相邻的位置 线圈10，并且电极端子12a，12b电连接到相对于线圈的内部和外部位于同一侧的平面线圈10的端子10a，10b 。

公开(公告)号：US06452806B2

公开(公告)日：2002-09-17

申请号：US09768607

申请日：2001-01-25

申请人： Takashi Ikeda ,  Masatoshi Akagawa ,  Daisuke Ito

发明人： Takashi Ikeda ,  Masatoshi Akagawa ,  Daisuke Ito

IPC分类号： H05K114

CPC分类号： G06K19/0775 ,  G06K19/07749 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

摘要： An IC card, which can be mass-produced at low cost, is composed of a plane coil formed by means of punching or etching. The plane coil 10 in which a conductor line 11 is wound a plurality of times in substantially the same plane is formed by punching, terminals 10a, 10b of the plane coil 10 and electrode terminals 12a, 12b of the semiconductor element 12 are electrically connected to each other, the plane coil 10 is provided with an outside terminal 10a formed outside the coil and an inside terminal formed inside the coil, the semiconductor element 12 is arranged in such a manner that a forming face on which the electrode terminals 12a, 12b are formed or a plane reverse to the forming face is opposed to the conductor line 11 of the plane coil 10, the electrode terminals 12a, 12b of the semiconductor element 12 are respectively located adjacent to the outside terminal 10a and the inside terminal 10b of the plane coil 10, and the electrode terminals 12a, 12b are electrically connected to the terminals 10a, 10b of the plane coil 10 located on the same side with respect to the inside and outside of the coil.

摘要翻译： 可以以低成本批量生产的IC卡由通过冲压或蚀刻形成的平面线圈构成。 通过冲孔形成导体线11在基本相同的平面中多次缠绕的平面线圈10，平面线圈10的端子10a，10b和半导体元件12的电极端子12a，12b电连接到 彼此之间，平面线圈10设置有形成在线圈外部的外部端子10a和形成在线圈内部的内部端子，半导体元件12以这样的方式配置，使得其上形成有电极端子12a，12b的形成面 形成的或与成形面相反的平面与平面线圈10的导体线11相对，半导体元件12的电极端子12a，12b分别位于与外部端子10a和平面的内部端子10b相邻的位置 线圈10，并且电极端子12a，12b电连接到相对于线圈的内部和外部位于同一侧的平面线圈10的端子10a，10b 。

公开(公告)号：US06255725B1

公开(公告)日：2001-07-03

申请号：US09492923

申请日：2000-01-28

申请人： Masatoshi Akagawa ,  Daisuke Ito

发明人： Masatoshi Akagawa ,  Daisuke Ito

IPC分类号： H01L2302

CPC分类号： G06K19/0775 ,  G06K19/07749 ,  G06K19/07779 ,  G06K19/07783 ,  H01F5/003 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014

摘要： Thickness of an IC card is decreased, and the manufacturing efficiency of the IC card is enhanced so as to reduce the manufacturing cost. The IC card comprises: a semiconductor element 14 having electrodes; a plane coil 12 formed in such a manner that a conductor 12b is wound on the same face, having terminals 12a at respective ends; bonding wires 16 for electrically connecting terminals at both ends of the plane coil to the electrodes of the semiconductor element; and resin films 10 for sealing the semiconductor element, plane coil and bonding wires 16 when they are interposed between the resin films, wherein the thickness of the semiconductor element 14 is smaller than the thickness of the plane coil 12 and does not interfere with the conductor of the plane coil, and a thin wall thickness portion 12c is formed on a front face of the conductor of the plane coil through which the bonding wires can pass without protruding from the region of the thickness of the plane coil.

摘要翻译： 降低IC卡的厚度，提高IC卡的制造效率，降低制造成本。 IC卡包括：具有电极的半导体元件14; 以使导体12b缠绕在同一面上的方式形成的平面线圈12，在端部具有端子12a; 用于将平面线圈两端的端子电连接到半导体元件的电极的接合线16; 以及树脂膜10，用于当半导体元件14的厚度小于平面线圈12的厚度并且不干扰导体时，将半导体元件，平面线圈和接合线16密封在树脂膜之间 并且在平面线圈的导体的正面上形成薄壁厚部12c，接合线可以通过该前导面而不从平面线圈的厚度区域突出。

公开(公告)号：US07890203B2

公开(公告)日：2011-02-15

申请号：US10444974

申请日：2003-05-27

申请人： Masatoshi Akagawa ,  Kazunari Sekigawa ,  Shinichi Wakabayashi

发明人： Masatoshi Akagawa ,  Kazunari Sekigawa ,  Shinichi Wakabayashi

IPC分类号： G06F19/00 ,  G03F9/00 ,  G03F1/00 ,  G03F7/20 ,  G03C5/00

CPC分类号： H05K1/0269 ,  H01L2924/0002 ,  H05K3/0005 ,  H05K3/0082 ,  H05K3/064 ,  H05K3/125 ,  H05K2203/013 ,  H05K2203/107 ,  H05K2203/162 ,  H01L2924/00

摘要： A wiring forming system comprises: maskless exposure unit which directly exposes an unexposed board by using exposure data generated based on design data relating to an wiring board; post-development inspect unit which tests the board after development, by using the exposure data and the image data of the board exposed and developed by the maskless exposure unit; etching unit which etches the developed board; and post-etching inspect unit which tests an etching pattern formed on the etched board, by using etching inspect data generated based on the design data and the image data of the board etched by the etching unit.

公开(公告)号：US07179584B2

公开(公告)日：2007-02-20

申请号：US10328449

申请日：2002-12-23

申请人： Kazunari Sekigawa ,  Masatoshi Akagawa

发明人： Kazunari Sekigawa ,  Masatoshi Akagawa

IPC分类号： G03F7/30

CPC分类号： G03F7/70283 ,  G03F7/70291 ,  G03F7/70466 ,  H05K3/0082

摘要： An optical exposure method and a device are used for forming patterns on a printed board wiring or semiconductor board. A single exposing region of a surface to be exposed is irradiated with a plurality of optical beams having different irradiating areas and different scanning pitches, such as, a peripheral area is irradiated with an optical beam having a smaller irradiating area and an inner area is irradiated with an optical beam having a larger irradiating area.

摘要翻译： 光学曝光方法和装置用于在印刷电路板布线或半导体板上形成图案。 用具有不同照射范围和不同扫描间距的多个光束照射要曝光的表面的单个曝光区域，例如照射具有较小照射面积的光束并且内部区域被照射的周边区域 具有较大照射面积的光束。

公开(公告)号：US07100279B2

公开(公告)日：2006-09-05

申请号：US10828210

申请日：2004-04-21

申请人： Tadatomo Suga ,  Toshihiro Itoh ,  Hideto Nakazawa ,  Masatoshi Akagawa

发明人： Tadatomo Suga ,  Toshihiro Itoh ,  Hideto Nakazawa ,  Masatoshi Akagawa

IPC分类号： H05K3/34 ,  H01R9/00 ,  B23K31/02

CPC分类号： H01L24/81 ,  H01L23/49816 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/81054 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/81894 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H05K3/3436 ,  H05K2203/085 ,  H05K2203/086 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49197 ,  H01L2224/05624 ,  H01L2924/00014

摘要： A method of mounting an electronic part on a board, in which an electronic part and a mounting board on which the electronic part is to be mounted are placed in a vacuum or inert atmosphere, and the electronic part is mounted on the board by bringing the bonding members of the electronic part and the board into contact with each other at normal temperature to thereby mount the electronic part on the board, the method comprising forming the bonding members of at least one of the electronic part and the board out of a solder material, and bringing the bonding members of the electronic part and the board into contact with each other without preprocessing the bonding surfaces of the bonding members.

摘要翻译： 将电子部件安装在基板上的方法，其中要将电子部件和其上安装电子部件的安装板放置在真空或惰性气氛中，并且通过使电子部件和电子部件 电子部件和电路板的接合部件在常温下彼此接触，从而将电子部件安装在电路板上，该方法包括从焊料材料形成至少一个电子部件和电路板的接合部件 并且使电子部件和基板的接合部件彼此接触而不对接合部件的接合面进行预处理。

公开(公告)号：US06552694B1

公开(公告)日：2003-04-22

申请号：US09609974

申请日：2000-07-06

申请人： Tomoharu Fujii ,  Shigeru Okamura ,  Tsutomu Higuchi ,  Masatoshi Akagawa

发明人： Tomoharu Fujii ,  Shigeru Okamura ,  Tsutomu Higuchi ,  Masatoshi Akagawa

IPC分类号： H01Q1112

CPC分类号： H01Q1/2225 ,  G06K19/07749 ,  G06K19/07775 ,  G06K19/07779 ,  G06K19/07783 ,  G06K19/07784 ,  H01L2924/0002 ,  H01Q1/22 ,  H01Q7/00 ,  H01L2924/00

摘要： A semiconductor device with an antenna including one or more antenna units for sending and receiving signals and a semiconductor element electrically connected to the antenna units, wherein the antenna units are formed by pressing or etching a thin metal sheet with substantially the same flat surface size as the semiconductor element, and the antenna units are integrally coupled to the surface of the semicondcutor element. The antenna units are formed in a plurality of layers separated by insulating layers, and the antenna units formed on the respective layers are connected electrically in series with each other.

摘要翻译： 一种具有天线的半导体器件，包括用于发送和接收信号的一个或多个天线单元和与天线单元电连接的半导体元件，其中天线单元通过压制或蚀刻具有基本相同的平坦表面尺寸的薄金属片而形成， 半导体元件和天线单元一体地耦合到半切割元件的表面。 天线单元形成为由绝缘层分隔开的多个层，并且形成在各层上的天线单元彼此串联连接。

公开(公告)号：US06469371B2

公开(公告)日：2002-10-22

申请号：US09745707

申请日：2000-12-21

申请人： Masatoshi Akagawa

发明人： Masatoshi Akagawa

IPC分类号： H01L2302

CPC分类号： G06K19/0775 ,  G06K19/07749 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K3/4685 ,  Y10T29/49018 ,  Y10T29/4902 ,  Y10T29/4913

摘要： A non-contact type IC card includes an insulating film having first and second surfaces. A plane coil is arranged on the first surface of the film. A semiconductor element is arranged on the first surface of the filmy The film has through holes which expose terminals of the plane coil and electrode terminals of the semiconductor element to the second surface of the film. A wiring pattern consisting of conductive paste is filled in the through holes and extends therebetween along the second surface of the film so that the terminals of the plane coil are electrically connected to the electrode terminals of the semiconductor element by means of the wiring pattern.

摘要翻译： 非接触型IC卡包括具有第一表面和第二表面的绝缘膜。 平面线圈布置在膜的第一表面上。 半导体元件布置在膜的第一表面上。膜具有将平面线圈的端子和半导体元件的电极端子暴露于膜的第二表面的通孔。 由导电膏组成的布线图案填充在通孔中，沿着膜的第二表面延伸，使得平面线圈的端子通过布线图形电连接到半导体元件的电极端子。

公开(公告)号：US07793412B2

公开(公告)日：2010-09-14

申请号：US10612222

申请日：2003-07-03

申请人： Masatoshi Akagawa ,  Kazunari Sekigawa ,  Shinichi Wakabayashi

发明人： Masatoshi Akagawa ,  Kazunari Sekigawa ,  Shinichi Wakabayashi

IPC分类号： H05K3/30

CPC分类号： H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/24011 ,  H01L2224/2402 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/8203 ,  H01L2224/82102 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01039 ,  H01L2924/01056 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H05K1/185 ,  Y10T29/49004 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49131 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/53061 ,  Y10T29/53087 ,  Y10T29/53174 ,  Y10T29/532 ,  H01L2224/82 ,  H01L2924/00

摘要： A component-embedded board fabrication method includes detecting, before the board is covered with a first insulating layer, the actual position of a first electronic component formed on a surface of the board, calculating a displacement between the design position of the first electronic component on the surface of the board and holding the displacement as first displacement data, and correcting, based on the first displacement data, design data to be used for processing the board after the board is covered with the first insulating layer.

摘要翻译： 组件嵌入式板的制造方法包括在板被第一绝缘层覆盖之前，检测形成在板的表面上的第一电子部件的实际位置，计算第一电子部件的设计位置之间的位移， 将所述板的表面保持位移作为第一位移数据，并且基于所述第一位移数据，校正在所述板被所述第一绝缘层覆盖之后用于处理所述板的设计数据。

公开(公告)号：US06964887B2

公开(公告)日：2005-11-15

申请号：US10454482

申请日：2003-06-05

申请人： Masatoshi Akagawa

发明人： Masatoshi Akagawa

IPC分类号： H05K1/18 ,  H01L21/60 ,  H01L23/12 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H05K3/46 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/82

CPC分类号： H01L23/3121 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2224/82 ,  H01L2224/19 ,  H01L2224/83 ,  H01L2924/00

摘要： Method for manufacturing a semiconductor device wherein thin semiconductor chips having a thickness of 50 μm or so are imbedded and mounted inside a package, and multi-level stacking is facilitated by forming external connection terminals on both surfaces of the package, or, alternatively, exposing the terminal formation portions of the wiring pattern, to which the external conncetion terminals are to be connected, out of a solder resist layer.

摘要翻译： 制造半导体器件的方法，其中厚度为50μm的薄半导体芯片嵌入并安装在封装内，并且通过在封装的两个表面上形成外部连接端子，或者可选地，暴露 将要连接的外部连接端子的布线图案的端子形成部分从阻焊层中排出。