公开(公告)号：US07890203B2

公开(公告)日：2011-02-15

申请号：US10444974

申请日：2003-05-27

申请人： Masatoshi Akagawa ,  Kazunari Sekigawa ,  Shinichi Wakabayashi

发明人： Masatoshi Akagawa ,  Kazunari Sekigawa ,  Shinichi Wakabayashi

IPC分类号： G06F19/00 ,  G03F9/00 ,  G03F1/00 ,  G03F7/20 ,  G03C5/00

CPC分类号： H05K1/0269 ,  H01L2924/0002 ,  H05K3/0005 ,  H05K3/0082 ,  H05K3/064 ,  H05K3/125 ,  H05K2203/013 ,  H05K2203/107 ,  H05K2203/162 ,  H01L2924/00

摘要： A wiring forming system comprises: maskless exposure unit which directly exposes an unexposed board by using exposure data generated based on design data relating to an wiring board; post-development inspect unit which tests the board after development, by using the exposure data and the image data of the board exposed and developed by the maskless exposure unit; etching unit which etches the developed board; and post-etching inspect unit which tests an etching pattern formed on the etched board, by using etching inspect data generated based on the design data and the image data of the board etched by the etching unit.

公开(公告)号：US07179584B2

公开(公告)日：2007-02-20

申请号：US10328449

申请日：2002-12-23

申请人： Kazunari Sekigawa ,  Masatoshi Akagawa

发明人： Kazunari Sekigawa ,  Masatoshi Akagawa

IPC分类号： G03F7/30

CPC分类号： G03F7/70283 ,  G03F7/70291 ,  G03F7/70466 ,  H05K3/0082

摘要： An optical exposure method and a device are used for forming patterns on a printed board wiring or semiconductor board. A single exposing region of a surface to be exposed is irradiated with a plurality of optical beams having different irradiating areas and different scanning pitches, such as, a peripheral area is irradiated with an optical beam having a smaller irradiating area and an inner area is irradiated with an optical beam having a larger irradiating area.

摘要翻译： 光学曝光方法和装置用于在印刷电路板布线或半导体板上形成图案。 用具有不同照射范围和不同扫描间距的多个光束照射要曝光的表面的单个曝光区域，例如照射具有较小照射面积的光束并且内部区域被照射的周边区域 具有较大照射面积的光束。

公开(公告)号：US07100279B2

公开(公告)日：2006-09-05

申请号：US10828210

申请日：2004-04-21

申请人： Tadatomo Suga ,  Toshihiro Itoh ,  Hideto Nakazawa ,  Masatoshi Akagawa

发明人： Tadatomo Suga ,  Toshihiro Itoh ,  Hideto Nakazawa ,  Masatoshi Akagawa

IPC分类号： H05K3/34 ,  H01R9/00 ,  B23K31/02

CPC分类号： H01L24/81 ,  H01L23/49816 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/81054 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/81894 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H05K3/3436 ,  H05K2203/085 ,  H05K2203/086 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49197 ,  H01L2224/05624 ,  H01L2924/00014

摘要： A method of mounting an electronic part on a board, in which an electronic part and a mounting board on which the electronic part is to be mounted are placed in a vacuum or inert atmosphere, and the electronic part is mounted on the board by bringing the bonding members of the electronic part and the board into contact with each other at normal temperature to thereby mount the electronic part on the board, the method comprising forming the bonding members of at least one of the electronic part and the board out of a solder material, and bringing the bonding members of the electronic part and the board into contact with each other without preprocessing the bonding surfaces of the bonding members.

摘要翻译： 将电子部件安装在基板上的方法，其中要将电子部件和其上安装电子部件的安装板放置在真空或惰性气氛中，并且通过使电子部件和电子部件 电子部件和电路板的接合部件在常温下彼此接触，从而将电子部件安装在电路板上，该方法包括从焊料材料形成至少一个电子部件和电路板的接合部件 并且使电子部件和基板的接合部件彼此接触而不对接合部件的接合面进行预处理。

公开(公告)号：US06552694B1

公开(公告)日：2003-04-22

申请号：US09609974

申请日：2000-07-06

申请人： Tomoharu Fujii ,  Shigeru Okamura ,  Tsutomu Higuchi ,  Masatoshi Akagawa

发明人： Tomoharu Fujii ,  Shigeru Okamura ,  Tsutomu Higuchi ,  Masatoshi Akagawa

IPC分类号： H01Q1112

CPC分类号： H01Q1/2225 ,  G06K19/07749 ,  G06K19/07775 ,  G06K19/07779 ,  G06K19/07783 ,  G06K19/07784 ,  H01L2924/0002 ,  H01Q1/22 ,  H01Q7/00 ,  H01L2924/00

摘要： A semiconductor device with an antenna including one or more antenna units for sending and receiving signals and a semiconductor element electrically connected to the antenna units, wherein the antenna units are formed by pressing or etching a thin metal sheet with substantially the same flat surface size as the semiconductor element, and the antenna units are integrally coupled to the surface of the semicondcutor element. The antenna units are formed in a plurality of layers separated by insulating layers, and the antenna units formed on the respective layers are connected electrically in series with each other.

摘要翻译： 一种具有天线的半导体器件，包括用于发送和接收信号的一个或多个天线单元和与天线单元电连接的半导体元件，其中天线单元通过压制或蚀刻具有基本相同的平坦表面尺寸的薄金属片而形成， 半导体元件和天线单元一体地耦合到半切割元件的表面。 天线单元形成为由绝缘层分隔开的多个层，并且形成在各层上的天线单元彼此串联连接。

公开(公告)号：US06469371B2

公开(公告)日：2002-10-22

申请号：US09745707

申请日：2000-12-21

申请人： Masatoshi Akagawa

发明人： Masatoshi Akagawa

IPC分类号： H01L2302

CPC分类号： G06K19/0775 ,  G06K19/07749 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K3/4685 ,  Y10T29/49018 ,  Y10T29/4902 ,  Y10T29/4913

摘要： A non-contact type IC card includes an insulating film having first and second surfaces. A plane coil is arranged on the first surface of the film. A semiconductor element is arranged on the first surface of the filmy The film has through holes which expose terminals of the plane coil and electrode terminals of the semiconductor element to the second surface of the film. A wiring pattern consisting of conductive paste is filled in the through holes and extends therebetween along the second surface of the film so that the terminals of the plane coil are electrically connected to the electrode terminals of the semiconductor element by means of the wiring pattern.

摘要翻译： 非接触型IC卡包括具有第一表面和第二表面的绝缘膜。 平面线圈布置在膜的第一表面上。 半导体元件布置在膜的第一表面上。膜具有将平面线圈的端子和半导体元件的电极端子暴露于膜的第二表面的通孔。 由导电膏组成的布线图案填充在通孔中，沿着膜的第二表面延伸，使得平面线圈的端子通过布线图形电连接到半导体元件的电极端子。

公开(公告)号：US07793412B2

公开(公告)日：2010-09-14

申请号：US10612222

申请日：2003-07-03

申请人： Masatoshi Akagawa ,  Kazunari Sekigawa ,  Shinichi Wakabayashi

发明人： Masatoshi Akagawa ,  Kazunari Sekigawa ,  Shinichi Wakabayashi

IPC分类号： H05K3/30

CPC分类号： H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/24011 ,  H01L2224/2402 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/8203 ,  H01L2224/82102 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01039 ,  H01L2924/01056 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H05K1/185 ,  Y10T29/49004 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49131 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/53061 ,  Y10T29/53087 ,  Y10T29/53174 ,  Y10T29/532 ,  H01L2224/82 ,  H01L2924/00

摘要： A component-embedded board fabrication method includes detecting, before the board is covered with a first insulating layer, the actual position of a first electronic component formed on a surface of the board, calculating a displacement between the design position of the first electronic component on the surface of the board and holding the displacement as first displacement data, and correcting, based on the first displacement data, design data to be used for processing the board after the board is covered with the first insulating layer.

摘要翻译： 组件嵌入式板的制造方法包括在板被第一绝缘层覆盖之前，检测形成在板的表面上的第一电子部件的实际位置，计算第一电子部件的设计位置之间的位移， 将所述板的表面保持位移作为第一位移数据，并且基于所述第一位移数据，校正在所述板被所述第一绝缘层覆盖之后用于处理所述板的设计数据。

公开(公告)号：US06964887B2

公开(公告)日：2005-11-15

申请号：US10454482

申请日：2003-06-05

申请人： Masatoshi Akagawa

发明人： Masatoshi Akagawa

IPC分类号： H05K1/18 ,  H01L21/60 ,  H01L23/12 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H05K3/46 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/82

CPC分类号： H01L23/3121 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2224/82 ,  H01L2224/19 ,  H01L2224/83 ,  H01L2924/00

摘要： Method for manufacturing a semiconductor device wherein thin semiconductor chips having a thickness of 50 μm or so are imbedded and mounted inside a package, and multi-level stacking is facilitated by forming external connection terminals on both surfaces of the package, or, alternatively, exposing the terminal formation portions of the wiring pattern, to which the external conncetion terminals are to be connected, out of a solder resist layer.

摘要翻译： 制造半导体器件的方法，其中厚度为50μm的薄半导体芯片嵌入并安装在封装内，并且通过在封装的两个表面上形成外部连接端子，或者可选地，暴露 将要连接的外部连接端子的布线图案的端子形成部分从阻焊层中排出。

公开(公告)号：US20050221536A1

公开(公告)日：2005-10-06

申请号：US11096058

申请日：2005-03-31

申请人： Masatoshi Akagawa ,  Masao Nakazawa ,  Hideto Nakazawa

发明人： Masatoshi Akagawa ,  Masao Nakazawa ,  Hideto Nakazawa

IPC分类号： H01L23/40 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/34 ,  H01L23/36 ,  H01L23/373

CPC分类号： H01L23/3736 ,  H01L21/4882 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/16152

摘要： A method of manufacturing a radiating plate using In as a thermal conducting bonding material 20 provided between a semiconductor device and a radiating plate 14 and serving to bond a back surface of the semiconductor device to the radiating plate, includes the steps of carrying out a cleaning treatment for cleaning a surface of the radiating plate 14, supplying the In to the radiating plate 14, heating and melting the In and hermetically adhering the In 18 to the radiating plate, thereby obtaining an In integral type radiating plate.

摘要翻译： 使用In制作作为设置在半导体器件与散热板14之间并用于将半导体器件的后表面粘合到散热板上的导热接合材料20的散热板的制造方法包括以下步骤： 用于清洁散热板14的表面的处理，将In供应到散热板14中，对In进行加热和熔化，并将In 18气密地粘附到散热板上，从而获得In积分型散热板。

公开(公告)号：US5960308A

公开(公告)日：1999-09-28

申请号：US40370

申请日：1998-03-18

申请人： Masatoshi Akagawa ,  Mitsutoshi Higashi ,  Hajime Iizuka ,  Takehiko Arai

发明人： Masatoshi Akagawa ,  Mitsutoshi Higashi ,  Hajime Iizuka ,  Takehiko Arai

IPC分类号： H01L21/60 ,  H01L23/31 ,  H01L23/485 ,  H01L23/528 ,  H01L23/532 ,  H01L23/552 ,  H01L21/44

CPC分类号： H01L24/12 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/5283 ,  H01L23/5329 ,  H01L23/53295 ,  H01L23/552 ,  H01L24/02 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/3025

摘要： A process for making a chip sized semiconductor device, in which a semiconductor chip is prepared so as to have electrodes on one of surfaces thereof and an electrically insulating passivation film formed on the one surface except for areas where the electrodes exist. An insulation sheet is prepared so as to have first and second surfaces and a metallic film coated on the first surface. The second surface of the insulation sheet is adhered on the one surface of the semiconductor chip. First via-holes are provided in the metallic film at positions corresponding to the electrodes. Second via-holes are provided in the insulation sheet at positions corresponding to the first via-holes so that the electrodes are exposed. The metallic film is electrically connected to the electrodes of the semiconductor chip through the first and second via-holes. A circuit pattern is formed from the metallic film so that the circuit pattern has external terminal connecting portions. An insulation film is adhered on the insulation sheet so that the external terminal connecting portions are exposed. External connecting terminals are electrically connected to the external terminal connecting portions of the circuit pattern.

摘要翻译： 制造芯片尺寸的半导体器件的方法，其中制备半导体芯片以在其一个表面上具有电极，以及形成在除了存在电极的区域之外的一个表面上的电绝缘钝化膜。 制备绝缘片以具有第一表面和第二表面以及涂覆在第一表面上的金属膜。 绝缘片的第二表面粘附在半导体芯片的一个表面上。 在与电极对应的位置处，在金属膜上设置有第一通路孔。 在绝缘片上设置有与第一通路孔对应的位置露出​​第二通孔。 金属膜通过第一和第二通孔与半导体芯片的电极电连接。 电路图案由金属膜形成，使得电路图案具有外部端子连接部分。 绝缘膜粘附在绝缘片上，使得外部端子连接部分露出。 外部连接端子电连接到电路图案的外部端子连接部分。

公开(公告)号：US5918113A

公开(公告)日：1999-06-29

申请号：US895145

申请日：1997-07-16

申请人： Mitsutoshi Higashi ,  Masatoshi Akagawa

发明人： Mitsutoshi Higashi ,  Masatoshi Akagawa

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L23/12 ,  H01L23/31 ,  H05K3/32 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L23/3107 ,  H01L21/563 ,  H01L24/29 ,  H01L24/83 ,  H01L24/94 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/29355 ,  H01L2224/29444 ,  H01L2224/29447 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83192 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07811 ,  H01L2924/15787 ,  H05K3/321

摘要： A process for producing a semiconductor device includes a step of forming an anisotropic conductive adhesive layer, which includes a thermoplastic or thermosetting resin and conductive powder dispersed therein, on a surface of a circuit board on which electrode terminal contacts are arranged so as to correspond to electrode terminals of a semiconductor chip which is to be mounted on said circuit board. Then, the anisotropic conductive adhesive layer is softened and the semiconductor chip is placed in such a manner that the electrode terminals coincide with the electrode terminal contacts through the anisotropic conductive adhesive layer. The semiconductor chip is heat-pressed against the circuit board so that the electrode terminals are electrically connected to the electrode terminal contacts and simultaneously the semiconductor chip is physically fixed to the circuit board when the anisotropic conductive adhesive layer is hardened.

摘要翻译： 一种制造半导体器件的方法包括在其上布置有电极端子触点的电路板的表面上形成包含分散在其中的热塑性或热固性树脂和导电粉末的各向异性导电粘合剂层的步骤，以对应于 要安装在所述电路板上的半导体芯片的电极端子。 然后，各向异性导电粘合剂层软化，并且半导体芯片以这样的方式放置，使得电极端子通过各向异性导电粘合剂层与电极端子触头重合。 半导体芯片被热压在电路板上，使得电极端子电连接到电极端子触点，同时当各向异性导电粘合剂层硬化时，半导体芯片物理地固定到电路板。