公开(公告)号：US07709941B2

公开(公告)日：2010-05-04

申请号：US11054039

申请日：2005-02-08

申请人： Toshikazu Imaoka ,  Takeshi Yamaguchi ,  Ryosuke Usui ,  Hiroyuki Watanabe ,  Toshimichi Naruse ,  Atsushi Kato

发明人： Toshikazu Imaoka ,  Takeshi Yamaguchi ,  Ryosuke Usui ,  Hiroyuki Watanabe ,  Toshimichi Naruse ,  Atsushi Kato

IPC分类号： H01L23/02

CPC分类号： H01L21/565 ,  H01L23/3121 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L2224/05554 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor pellet and chip components are provided on an insulating substrate, and are sealed with a molding resin that is molded by transfer molding. The chip components are positioned so as to surround the semiconductor pellet on all four sides. The lengthwise directions of the chip components surrounding the semiconductor pellet are aligned in a uniform direction. The insulating substrate is set within a die molding apparatus so that during resin injection, the lengthwise directions of the chip components are aligned substantially perpendicularly to the direction of flow of the injected resin.

摘要翻译： 半导体芯片和芯片部件设置在绝缘基板上，并用通过传递模塑成型的模制树脂密封。 芯片部件被定位成围绕半导体芯片四周。 围绕半导体芯片的芯片部件的长度方向在均匀的方向上排列。 将绝缘基板设置在模具成型装置内，使得在树脂注入期间，芯片部件的长度方向基本上垂直于注入树脂的流动方向排列。

公开(公告)号：US20050212146A1

公开(公告)日：2005-09-29

申请号：US11054039

申请日：2005-02-08

申请人： Toshikazu Imaoka ,  Takeshi Yamaguchi ,  Ryosuke Usui ,  Hiroyuki Watanabe ,  Toshimichi Naruse ,  Atsushi Kato

发明人： Toshikazu Imaoka ,  Takeshi Yamaguchi ,  Ryosuke Usui ,  Hiroyuki Watanabe ,  Toshimichi Naruse ,  Atsushi Kato

IPC分类号： H01L23/28 ,  H01L21/44 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065

CPC分类号： H01L21/565 ,  H01L23/3121 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L2224/05554 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor pellet and chip components are provided on an insulating substrate, and are sealed with a molding resin that is molded by transfer molding. The chip components are positioned so as to surround the semiconductor pellet on all four sides. The lengthwise directions of the chip components surrounding the semiconductor pellet are aligned in a uniform direction. The insulating substrate is set within a die molding apparatus so that during resin injection, the lengthwise directions of the chip components are aligned substantially perpendicularly to the direction of flow of the injected resin.

摘要翻译： 半导体芯片和芯片部件设置在绝缘基板上，并用通过传递模塑成型的模制树脂密封。 芯片部件被定位成围绕半导体芯片四周。 围绕半导体芯片的芯片部件的长度方向在均匀的方向上排列。 将绝缘基板设置在模具成型装置内，使得在树脂注入期间，芯片部件的长度方向基本上垂直于注入树脂的流动方向排列。

公开(公告)号：US20130199827A1

公开(公告)日：2013-08-08

申请号：US13571072

申请日：2012-08-09

申请人： Yusuke Igarashi ,  Atsushi Kato ,  Toshimichi Naruse

发明人： Yusuke Igarashi ,  Atsushi Kato ,  Toshimichi Naruse

IPC分类号： H05K1/02

CPC分类号： H05K1/0213 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H05K1/0265 ,  H05K1/141 ,  H05K3/427 ,  H05K2203/049 ,  H01L2924/00014 ,  H01L2924/00

摘要： A mounting board includes: a core layer made of an insulating resin; a first conductive pattern provided on a front side of the core layer; a second conductive pattern provided on a back side of the core layer; and a via provided between a first electrode for a high current in the first conductive pattern and an external electrode including the second conductive pattern, the external electrode provided so as to correspond to the first electrode, the first conductive pattern and the second conductive pattern having the same film thickness, the via set at a resistance value lower than a resistance value of the first conductive pattern so that the high current flows to the external electrode through the via.

摘要翻译： 安装板包括：由绝缘树脂制成的芯层; 设置在所述芯层的前侧的第一导电图案; 设置在所述芯层的背侧的第二导电图案; 以及设置在第一导电图案中的高电流用第一电极和包括第二导电图案的外部电极之间的通孔，设置为与第一电极对应的外部电极，第一导电图案和第二导电图案具有 相同的膜厚度，通孔设置在比第一导电图案的电阻值低的电阻值，使得高电流通过通孔流到外部电极。

公开(公告)号：US07199468B2

公开(公告)日：2007-04-03

申请号：US10813189

申请日：2004-03-29

申请人： Toshimichi Naruse ,  Nobuhisa Takakusaki ,  Hajime Kobayashi

发明人： Toshimichi Naruse ,  Nobuhisa Takakusaki ,  Hajime Kobayashi

IPC分类号： H01L23/34

CPC分类号： H01L23/642 ,  H01L21/4832 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/16 ,  H01L2221/68377 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K3/305 ,  H05K3/321 ,  H05K3/3442 ,  H05K3/3452 ,  H05K3/3463 ,  H05K2201/09036 ,  H05K2201/10636 ,  H05K2203/047 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00012

摘要： In order to prevent short-circuiting when a chip component is brazed to pads of a conductive wiring layer, a hybrid semiconductor circuit includes the chip component with terminal electrodes formed at both ends, a first conductive wiring layer on which the pads are provided such that they correspond to the terminal electrodes, and an overcoat resin that covers the first conductive wiring layer excluding the pads. The terminal electrodes of the chip component are adhered to the pads by a conductive adhesive and an insulating adhesive is provided between the pads.

摘要翻译： 为了防止当芯片部件钎焊到导电布线层的焊盘时的短路，混合半导体电路包括具有形成在两端的端子电极的芯片部件，其上设置焊盘的第一导电布线层使得 它们对应于端子电极，以及覆盖除了焊盘之外的第一导电布线层的外涂层树脂。 芯片部件的端子电极通过导电粘合剂粘附到焊盘，并且在焊盘之间设置绝缘粘合剂。

公开(公告)号：US20110266587A1

公开(公告)日：2011-11-03

申请号：US13038079

申请日：2011-03-01

申请人： Toshimichi Naruse ,  Hideo Takada

发明人： Toshimichi Naruse ,  Hideo Takada

IPC分类号： H01L33/52 ,  H01L31/18 ,  H01L31/0203

CPC分类号： H01L33/52 ,  G11B7/123 ,  G11B7/127 ,  G11B7/13 ,  G11B7/22 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/49541 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L31/0203 ,  H01L33/58 ,  H01L33/62 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/12043 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： In some embodiments, a semiconductor device includes a semiconductor chip configured to receive or emit light, a chip mounting region for mounting the semiconductor chip, an electrode arranged surrounding the chip mounting region, an electric connecting element which electrically connects the semiconductor chip and the electrode, an optically-transparent element arranged on a top surface of the semiconductor chip and made of optically-transparent material, a protection film arranged on a top surface of the optically-transparent element so as to surround a light passing region through which the light passes, and a filler-contained insulating resin which seals the semiconductor chip, the electric connecting element, the electrode, the optically-transparent element, and the protection film in a state in which a top surface of the protection film and the light passing region surrounded by the protection film are exposed outside.

摘要翻译： 在一些实施例中，半导体器件包括被配置为接收或发光的半导体芯片，用于安装半导体芯片的芯片安装区域，围绕芯片安装区域布置的电极，将半导体芯片和电极电连接的电连接元件 ，配置在半导体芯片的上表面上并由光学透明材料制成的光学透明元件，保护膜，设置在光学透明元件的顶面上，以包围光通过的光通过区域 以及在保护膜的顶表面和光通过区域被包围的状态下密封半导体芯片，电连接元件，电极，光学透明元件和保护膜的填充剂绝缘树脂 由保护膜外露。

公开(公告)号：US07224066B2

公开(公告)日：2007-05-29

申请号：US10925182

申请日：2004-08-24

申请人： Toshimichi Naruse ,  Yoshihiro Kogure ,  Takayuki Hasegawa ,  Hajime Kobayashi

发明人： Toshimichi Naruse ,  Yoshihiro Kogure ,  Takayuki Hasegawa ,  Hajime Kobayashi

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H05K3/3463 ,  H01L23/3107 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2221/68377 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K3/284 ,  H05K2203/047 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

摘要： A circuit device is provided in which the bonding reliability of a brazing material such as soft solder is improved. A circuit device of the present invention includes conductive patterns, a bonding material which fixes circuit elements to the conductive patterns, and sealing resin which covers the circuit elements. The circuit device has a structure in which Pb-free solder containing Bi is used as the bonding material. Since the melting temperature of Bi is high in comparison with that of a general solder, the melting of the bonding material is suppressed when the circuit device is mounted. Further, Ag or the like may be mixed into the bonding material in order to enhance the wettability of the bonding material.

摘要翻译： 提供一种电路装置，其中软焊料等钎焊材料的焊接可靠性提高。 本发明的电路装置包括导电图案，将电路元件固定到导电图案的接合材料以及覆盖电路元件的密封树脂。 电路器件具有使用含有Bi的无铅焊料作为接合材料的结构。 由于与通常的焊料相比，Bi的熔融温度高，因此当安装电路器件时，抑制了接合材料的熔化。 此外，为了提高接合材料的润湿性，可以将Ag等混合到接合材料中。

公开(公告)号：US06259157B1

公开(公告)日：2001-07-10

申请号：US09188717

申请日：1998-11-10

申请人： Noriaki Sakamoto ,  Hidefumi Saito ,  Toshimichi Naruse ,  Hisashi Shimizu

发明人： Noriaki Sakamoto ,  Hidefumi Saito ,  Toshimichi Naruse ,  Hisashi Shimizu

IPC分类号： H01L2334

CPC分类号： H01L24/32 ,  H01L23/373 ,  H01L23/4334 ,  H01L23/49861 ,  H01L24/45 ,  H01L24/48 ,  H01L25/165 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K1/056 ,  H05K3/284 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A hybrid integrated circuit device comprising: a substrate having an insulated surface and superior thermal conductivity; conductor patterns provided on the substrate; an element mounted on the surface so as to connect with the conductor patterns through electrically connecting means; an outer read which is electrically connected to the conductor patterns and is extended to the outside; and a sealing member of thermoplastic resin so as to be molded and cover at least the surface of the substrate.

摘要翻译： 一种混合集成电路器件，包括：具有绝缘表面和优异导热性的衬底; 设置在基板上的导体图案; 安装在表面上以通过电连接装置与导体图案连接的元件; 外部读取电连接到导体图案并延伸到外部; 以及热塑性树脂的密封构件，以便被模制并且至少覆盖基板的表面。

公开(公告)号：US5838070A

公开(公告)日：1998-11-17

申请号：US770406

申请日：1996-12-20

申请人： Toshimichi Naruse ,  Noriaki Sakamoto

发明人： Toshimichi Naruse ,  Noriaki Sakamoto

IPC分类号： H05K1/11 ,  H05K3/34 ,  H01L23/48 ,  H01L23/52

CPC分类号： H05K1/111 ,  H05K3/3442 ,  H01L2924/0002 ,  H05K1/11 ,  H05K2201/09427 ,  H05K2201/10636 ,  H05K2201/10727 ,  H05K2203/042 ,  H05K3/3431 ,  Y02P70/611 ,  Y02P70/613

摘要： An electronic circuit apparatus has first and second pad electrodes arranged on a substrate to be separated by a first interval, first and second chip electrodes to be separated by a second interval smaller than the first interval, a first solder for fixedly attaching the first chip electrode to the first pad electrode and a second solder for fixedly attaching the second chip electrode to the second pad electrode. Because the first interval is longer than the second interval, any constricted portion does not exist in each of the first and second solders. Therefore, because any stress is not concentrated on any portion of each of the first and second solders, the occurrence of a crack in each of the first and second solders can be prevented.

摘要翻译： 电子电路装置具有布置在基板上的第一和第二焊盘电极，以第一间隔分开，第一和第二芯片电极以比第一间隔小的第二间隔隔开;第一焊料，用于固定地附接第一芯片电极 到第一焊盘电极和用于将第二芯片电极固定地附接到第二焊盘电极的第二焊料。 因为第一间隔长于第二间隔，所以第一和第二焊料的每一个中都不存在任何收缩部分。 因此，由于任何应力都不集中在第一和第二焊料的每一个的任何部分上，所以可以防止在第一和第二焊料中的每一个中出现裂纹。

公开(公告)号：US20050046032A1

公开(公告)日：2005-03-03

申请号：US10925182

申请日：2004-08-24

申请人： Toshimichi Naruse ,  Yoshihiro Kogure ,  Takayuki Hasegawa ,  Hajime Kobayashi

发明人： Toshimichi Naruse ,  Yoshihiro Kogure ,  Takayuki Hasegawa ,  Hajime Kobayashi

IPC分类号： B23K35/26 ,  C22C12/00 ,  H01L21/52 ,  H01L23/31 ,  H01L23/495 ,  H05K3/28 ,  H05K3/34 ,  H01L23/02

CPC分类号： H05K3/3463 ,  H01L23/3107 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2221/68377 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K3/284 ,  H05K2203/047 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

摘要： A circuit device is provided in which the bonding reliability of a brazing material such as soft solder is improved. A circuit device of the present invention includes conductive patterns, a bonding material which fixes circuit elements to the conductive patterns, and sealing resin which covers the circuit elements. The circuit device has a structure in which Pb-free solder containing Bi is used as the bonding material. Since the melting temperature of Bi is high in comparison with that of a general solder, the melting of the bonding material is suppressed when the circuit device is mounted. Further, Ag or the like may be mixed into the bonding material in order to enhance the wettability of the bonding material.

摘要翻译： 提供一种电路装置，其中软焊料等钎焊材料的焊接可靠性提高。 本发明的电路装置包括导电图案，将电路元件固定到导电图案的接合材料以及覆盖电路元件的密封树脂。 电路器件具有使用含有Bi的无铅焊料作为接合材料的结构。 由于与通常的焊料相比，Bi的熔融温度高，因此当安装电路器件时，抑制了接合材料的熔化。 此外，为了提高接合材料的润湿性，可以将Ag等混合到接合材料中。