公开(公告)号：US06709890B2

公开(公告)日：2004-03-23

申请号：US09783605

申请日：2001-02-15

申请人： Tsutomu Ida ,  Akio Ishizu ,  Masakazu Hashizume ,  Isao Hagiwara ,  Yoshinori Shiokawa

发明人： Tsutomu Ida ,  Akio Ishizu ,  Masakazu Hashizume ,  Isao Hagiwara ,  Yoshinori Shiokawa

IPC分类号： H01L2144

CPC分类号： H01L24/81 ,  B23K1/0016 ,  B23K2101/40 ,  H01L23/04 ,  H01L23/13 ,  H01L23/36 ,  H01L23/66 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/75 ,  H01L24/83 ,  H01L24/93 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/75 ,  H01L2224/753 ,  H01L2224/75305 ,  H01L2224/758 ,  H01L2224/7598 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/83801 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10329 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15313 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/351 ,  H05K1/181 ,  H05K3/341 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/01031 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/92247 ,  H01L2224/05599

摘要： In a method of manufacturing a high frequency module to be assembled by providing, on a wiring board, a chip part and a semiconductor pellet to be bare chip mounted and then mounting the chip part and the semiconductor pellet through soldering, the wiring board is separated from a heat block with the semiconductor pellet pressurized against the wiring board in a main heating portion heating and melting a reflow solder, thereby cooling a soldering portion. Consequently, the generation of a void in the soldering portion can be prevented and the connecting reliability of the soldering portion can be enhanced. In addition, a degree of mounting horizontality of the semiconductor pellet on the wiring board can be enhanced.

摘要翻译： 在通过在布线基板上设置裸芯片安装的芯片部件和半导体芯片，然后通过焊接来安装芯片部件和半导体芯片来制造要组装的高频模块的方法中，布线板被分离 从加热和熔化回流焊料的主加热部分中的半导体芯片加热到布线板的散热块，从而冷却焊接部分。 因此，可以防止在焊接部分中产生空隙，并且可以提高焊接部分的连接可靠性。 此外，可以提高半导体芯片在布线板上的安装水平度。

公开(公告)号：US07453147B2

公开(公告)日：2008-11-18

申请号：US11326341

申请日：2006-01-06

申请人： Tsutomu Ida ,  Yoshihiko Kobayashi ,  Masakazu Hashizume ,  Yoshinori Shiokawa ,  Sakae Kikuchi

发明人： Tsutomu Ida ,  Yoshihiko Kobayashi ,  Masakazu Hashizume ,  Yoshinori Shiokawa ,  Sakae Kikuchi

IPC分类号： H01L23/34

CPC分类号： H01L25/0655 ,  H01L23/13 ,  H01L23/66 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L2223/6644 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48639 ,  H01L2224/48647 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/81143 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/85 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10161 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15313 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/00012

摘要： The variation of the parasitic inductance generated at the output terminal of a transistor in the final stage of a multistage amplifier unit is reduced. One side of the semiconductor chip that includes the final stage transistor is put in contact with the inner wall of a square recess formed in a wiring substrate. The semiconductor chip is positioned and fixed accurately at the bottom of the recess, whereby the drain wire of the transistor is fixed. Then, a chip edge at which the drain electrode is disposed on top of the chip is put in contact with the inner wall of the recess, which is closer to the drain bonding pad. A metallized layer is formed of the same size as that of the chip at the bottom of the recess and a fusion bonding material is supplied on the metallized layer.

摘要翻译： 在多级放大器单元的最后级中的晶体管的输出端产生的寄生电感的变化减小。 包括末级晶体管的半导体芯片的一侧与形成在布线基板中的正方形凹部的内壁接触。 将半导体芯片精确地定位并固定在凹部的底部，由此使晶体管的漏极线固定。 然后，将漏电极设置在芯片顶部的芯片边缘与更靠近漏极焊盘的凹部的内壁接触。 金属化层与凹槽底部的芯片的尺寸相同，并且在金属化层上提供熔接材料。

公开(公告)号：US07119004B2

公开(公告)日：2006-10-10

申请号：US10486707

申请日：2002-05-28

申请人： Tsutomu Ida ,  Yoshihiko Kobayashi ,  Masakazu Hashizume ,  Yoshinori Shiokawa ,  Sakae Kikuchi

发明人： Tsutomu Ida ,  Yoshihiko Kobayashi ,  Masakazu Hashizume ,  Yoshinori Shiokawa ,  Sakae Kikuchi

IPC分类号： H01L21/44

CPC分类号： H01L25/0655 ,  H01L23/13 ,  H01L23/66 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L2223/6644 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48639 ,  H01L2224/48647 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/81143 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/85 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10161 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15313 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/00012

摘要： The variation of the parasitic inductance generated at the output terminal of a transistor in the final stage of a multistage amplifier unit is reduced. One side of the semiconductor chip that includes the final stage transistor is put in contact with the inner wall of a square recess formed in a wiring substrate. The semiconductor chip is positioned and fixed accurately at the bottom of the recess, whereby the drain wire of the transistor is fixed. Then, a chip edge at which the drain electrode is disposed on top of the chip is put in contact with the inner wall of the recess, which is closer to the drain bonding pad. A metallized layer is formed of the same size as that of the chip at the bottom of the recess and a fusion bonding material is supplied on the metallized layer.

摘要翻译： 在多级放大器单元的最后级中的晶体管的输出端产生的寄生电感的变化减小。 包括末级晶体管的半导体芯片的一侧与形成在布线基板中的正方形凹部的内壁接触。 将半导体芯片精确地定位并固定在凹部的底部，由此使晶体管的漏极线固定。 然后，将漏电极设置在芯片顶部的芯片边缘与更靠近漏极焊盘的凹部的内壁接触。 金属化层与凹槽底部的芯片的尺寸相同，并且在金属化层上提供熔接材料。

公开(公告)号：US20060118970A1

公开(公告)日：2006-06-08

申请号：US11326341

申请日：2006-01-06

申请人： Tsutomu Ida ,  Yoshihiko Kobayashi ,  Masakazu Hashizume ,  Yoshinori Shiokawa ,  Sakae Kikuchi

发明人： Tsutomu Ida ,  Yoshihiko Kobayashi ,  Masakazu Hashizume ,  Yoshinori Shiokawa ,  Sakae Kikuchi

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L23/34

CPC分类号： H01L25/0655 ,  H01L23/13 ,  H01L23/66 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L2223/6644 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48639 ,  H01L2224/48647 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/81143 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/85 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10161 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15313 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/00012

摘要： The variation of the parasitic inductance generated at the output terminal of a transistor in the final stage of a multistage amplifier unit is reduced. One side of the semiconductor chip that includes the final stage transistor is put in contact with the inner wall of a square recess formed in a wiring substrate. The semiconductor chip is positioned and fixed accurately at the bottom of the recess, whereby the drain wire of the transistor is fixed. Then, a chip edge at which the drain electrode is disposed on top of the chip is put in contact with the inner wall of the recess, which is closer to the drain bonding pad. A metallized layer is formed of the same size as that of the chip at the bottom of the recess and a fusion bonding material is supplied on the metallized layer.

摘要翻译： 在多级放大器单元的最后级中的晶体管的输出端产生的寄生电感的变化减小。 包括末级晶体管的半导体芯片的一侧与形成在布线基板中的正方形凹部的内壁接触。 将半导体芯片精确地定位并固定在凹部的底部，由此使晶体管的漏极线固定。 然后，将漏电极设置在芯片顶部的芯片边缘与更靠近漏极焊盘的凹部的内壁接触。 金属化层与凹槽底部的芯片的尺寸相同，并且在金属化层上提供熔接材料。

公开(公告)号：US07223636B2

公开(公告)日：2007-05-29

申请号：US10961041

申请日：2004-10-12

申请人： Yoshihiko Kobayashi ,  Susumu Sato ,  Koki Tanimoto ,  Tomio Yamada ,  Hirokazu Nakajima ,  Tomoaki Kudaishi ,  Yoshinori Shiokawa ,  Toshiharu Niitsu ,  Tsutomu Ida

发明人： Yoshihiko Kobayashi ,  Susumu Sato ,  Koki Tanimoto ,  Tomio Yamada ,  Hirokazu Nakajima ,  Tomoaki Kudaishi ,  Yoshinori Shiokawa ,  Toshiharu Niitsu ,  Tsutomu Ida

IPC分类号： H01L21/44

CPC分类号： H05K3/0052 ,  H01L21/481 ,  H01L2224/48227 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/284 ,  H05K2201/09036 ,  H05K2201/0909 ,  H05K2203/302 ,  H01L2924/00012

摘要： In a dividing method according to the present invention, a wiring board formed of ceramic is forced up (upper swing) by a lower clamp claw of a clamper, and some of a protruded wiring board portion protruding from a conveying chute is pressed against a support body to perform a first division under bending stress. Thereafter, the upward-located clamper is rotatably swung (lower swing) downward to allow an upper clamp claw to press down the protruded wiring board portion, thereby performing a reverse division at the first division section again as a second division. Since the second division allows a tensile force to act on a remaining and thin non-divided resin portion, the non-divided resin portion is torn off. Thus, the perfect division is enabled. Fractionalizing is done by a one-row division and an individual division so that each semiconductor device is formed.

公开(公告)号：US20050101052A1

公开(公告)日：2005-05-12

申请号：US10961041

申请日：2004-10-12

申请人： Yoshihiko Kobayashi ,  Susumu Sato ,  Koki Tanimoto ,  Tomio Yamada ,  Hirokazu Nakajima ,  Tomoaki Kudaishi ,  Yoshinori Shiokawa ,  Toshiharu Niitsu ,  Tsutomu Ida

发明人： Yoshihiko Kobayashi ,  Susumu Sato ,  Koki Tanimoto ,  Tomio Yamada ,  Hirokazu Nakajima ,  Tomoaki Kudaishi ,  Yoshinori Shiokawa ,  Toshiharu Niitsu ,  Tsutomu Ida

IPC分类号： H01L23/28 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/56 ,  H05K1/03 ,  H05K3/00 ,  H05K3/28

CPC分类号： H05K3/0052 ,  H01L21/481 ,  H01L2224/48227 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/284 ,  H05K2201/09036 ,  H05K2201/0909 ,  H05K2203/302 ,  H01L2924/00012

摘要： In a dividing method according to the present invention, a wiring board formed of ceramic is forced up (upper swing) by a lower clamp claw of a clamper, and some of a protruded wiring board portion protruding from a conveying chute is pressed against a support body to perform a first division under bending stress. Thereafter, the upward-located clamper is rotatably swung (lower swing) downward to allow an upper clamp claw to press down the protruded wiring board portion, thereby performing a reverse division at the first division section again as a second division. Since the second division allows a tensile force to act on a remaining and thin non-divided resin portion, the non-divided resin portion is torn off. Thus, the perfect division is enabled. Fractionalizing is done by a one-row division and an individual division so that each semiconductor device is formed.

摘要翻译： 在根据本发明的分割方法中，由陶瓷制成的布线基板由夹持器的下夹爪推动（上摆），并且从输送槽突出的一些突出的布线板部分被压靠在支撑件 身体在弯曲应力下进行第一次分裂。 此后，向上定位的夹持器向下可旋转地摆动（下摆动），以允许上夹爪压下突出的布线板部分，从而在第一分割部分再次进行相反分割，作为第二分割。 由于第二分割允许张力作用在剩余的薄的未分割树脂部分上，所以未分割树脂部分被撕开。 因此，完美的划分得以实现。 通过单行分割和单独分割来进行分数化，从而形成每个半导体器件。

公开(公告)号：US20070105283A1

公开(公告)日：2007-05-10

申请号：US11647162

申请日：2006-12-29

申请人： Yoshihiko Kobayashi ,  Susumu Sato ,  Koki Tanimoto ,  Tomio Yamada ,  Hirokazu Nakajima ,  Tomoaki Kudaishi ,  Yoshinori Shiokawa ,  Toshiharu Niitsu ,  Tsutomu Ida

发明人： Yoshihiko Kobayashi ,  Susumu Sato ,  Koki Tanimoto ,  Tomio Yamada ,  Hirokazu Nakajima ,  Tomoaki Kudaishi ,  Yoshinori Shiokawa ,  Toshiharu Niitsu ,  Tsutomu Ida

IPC分类号： H01L21/00

CPC分类号： H05K3/0052 ,  H01L21/481 ,  H01L2224/48227 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/284 ,  H05K2201/09036 ,  H05K2201/0909 ,  H05K2203/302 ,  H01L2924/00012

摘要： In a dividing method according to the present invention, a wiring board formed of ceramic is forced up (upper swing) by a lower clamp claw of a clamper, and some of a protruded wiring board portion protruding from a conveying chute is pressed against a support body to perform a first division under bending stress. Thereafter, the upward-located clamper is rotatably swung (lower swing) downward to allow an upper clamp claw to press down the protruded wiring board portion, thereby performing a reverse division at the first division section again as a second division. Since the second division allows a tensile force to act on a remaining and thin non-divided resin portion, the non-divided resin portion is torn off. Thus, the perfect division is enabled. Fractionalizing is done by a one-row division and an individual division so that each semiconductor device is formed.

摘要翻译： 在根据本发明的分割方法中，由陶瓷制成的布线基板由夹持器的下夹爪推动（上摆），并且从输送槽突出的一些突出的布线板部分被压靠在支撑件 身体在弯曲应力下进行第一次分裂。 此后，向上定位的夹持器向下可旋转地摆动（下摆动），以允许上夹爪向下按压突出的布线板部分，从而在第一分割部分再次进行相反分割，作为第二分割。 由于第二分割允许张力作用在剩余的薄的未分割树脂部分上，所以未分割树脂部分被撕开。 因此，完美的划分得以实现。 通过单行分割和单独分割来进行分数化，从而形成每个半导体器件。