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公开(公告)号：US07223636B2
公开(公告)日：2007-05-29
申请号：US10961041
申请日：2004-10-12
申请人： Yoshihiko Kobayashi , Susumu Sato , Koki Tanimoto , Tomio Yamada , Hirokazu Nakajima , Tomoaki Kudaishi , Yoshinori Shiokawa , Toshiharu Niitsu , Tsutomu Ida
发明人： Yoshihiko Kobayashi , Susumu Sato , Koki Tanimoto , Tomio Yamada , Hirokazu Nakajima , Tomoaki Kudaishi , Yoshinori Shiokawa , Toshiharu Niitsu , Tsutomu Ida
IPC分类号： H01L21/44
CPC分类号： H05K3/0052 , H01L21/481 , H01L2224/48227 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H05K1/0306 , H05K3/284 , H05K2201/09036 , H05K2201/0909 , H05K2203/302 , H01L2924/00012
摘要： In a dividing method according to the present invention, a wiring board formed of ceramic is forced up (upper swing) by a lower clamp claw of a clamper, and some of a protruded wiring board portion protruding from a conveying chute is pressed against a support body to perform a first division under bending stress. Thereafter, the upward-located clamper is rotatably swung (lower swing) downward to allow an upper clamp claw to press down the protruded wiring board portion, thereby performing a reverse division at the first division section again as a second division. Since the second division allows a tensile force to act on a remaining and thin non-divided resin portion, the non-divided resin portion is torn off. Thus, the perfect division is enabled. Fractionalizing is done by a one-row division and an individual division so that each semiconductor device is formed.
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2.发明申请公开(公告)号：US20070105283A1
公开(公告)日：2007-05-10
申请号：US11647162
申请日：2006-12-29
申请人： Yoshihiko Kobayashi , Susumu Sato , Koki Tanimoto , Tomio Yamada , Hirokazu Nakajima , Tomoaki Kudaishi , Yoshinori Shiokawa , Toshiharu Niitsu , Tsutomu Ida
发明人： Yoshihiko Kobayashi , Susumu Sato , Koki Tanimoto , Tomio Yamada , Hirokazu Nakajima , Tomoaki Kudaishi , Yoshinori Shiokawa , Toshiharu Niitsu , Tsutomu Ida
IPC分类号： H01L21/00
CPC分类号： H05K3/0052 , H01L21/481 , H01L2224/48227 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H05K1/0306 , H05K3/284 , H05K2201/09036 , H05K2201/0909 , H05K2203/302 , H01L2924/00012
摘要： In a dividing method according to the present invention, a wiring board formed of ceramic is forced up (upper swing) by a lower clamp claw of a clamper, and some of a protruded wiring board portion protruding from a conveying chute is pressed against a support body to perform a first division under bending stress. Thereafter, the upward-located clamper is rotatably swung (lower swing) downward to allow an upper clamp claw to press down the protruded wiring board portion, thereby performing a reverse division at the first division section again as a second division. Since the second division allows a tensile force to act on a remaining and thin non-divided resin portion, the non-divided resin portion is torn off. Thus, the perfect division is enabled. Fractionalizing is done by a one-row division and an individual division so that each semiconductor device is formed.
摘要翻译： 在根据本发明的分割方法中，由陶瓷制成的布线基板由夹持器的下夹爪推动（上摆），并且从输送槽突出的一些突出的布线板部分被压靠在支撑件 身体在弯曲应力下进行第一次分裂。 此后，向上定位的夹持器向下可旋转地摆动（下摆动），以允许上夹爪向下按压突出的布线板部分，从而在第一分割部分再次进行相反分割，作为第二分割。 由于第二分割允许张力作用在剩余的薄的未分割树脂部分上，所以未分割树脂部分被撕开。 因此，完美的划分得以实现。 通过单行分割和单独分割来进行分数化，从而形成每个半导体器件。
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公开(公告)号：US20050101052A1
公开(公告)日：2005-05-12
申请号：US10961041
申请日：2004-10-12
申请人： Yoshihiko Kobayashi , Susumu Sato , Koki Tanimoto , Tomio Yamada , Hirokazu Nakajima , Tomoaki Kudaishi , Yoshinori Shiokawa , Toshiharu Niitsu , Tsutomu Ida
发明人： Yoshihiko Kobayashi , Susumu Sato , Koki Tanimoto , Tomio Yamada , Hirokazu Nakajima , Tomoaki Kudaishi , Yoshinori Shiokawa , Toshiharu Niitsu , Tsutomu Ida
CPC分类号： H05K3/0052 , H01L21/481 , H01L2224/48227 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/3011 , H05K1/0306 , H05K3/284 , H05K2201/09036 , H05K2201/0909 , H05K2203/302 , H01L2924/00012
摘要： In a dividing method according to the present invention, a wiring board formed of ceramic is forced up (upper swing) by a lower clamp claw of a clamper, and some of a protruded wiring board portion protruding from a conveying chute is pressed against a support body to perform a first division under bending stress. Thereafter, the upward-located clamper is rotatably swung (lower swing) downward to allow an upper clamp claw to press down the protruded wiring board portion, thereby performing a reverse division at the first division section again as a second division. Since the second division allows a tensile force to act on a remaining and thin non-divided resin portion, the non-divided resin portion is torn off. Thus, the perfect division is enabled. Fractionalizing is done by a one-row division and an individual division so that each semiconductor device is formed.
摘要翻译： 在根据本发明的分割方法中，由陶瓷制成的布线基板由夹持器的下夹爪推动（上摆），并且从输送槽突出的一些突出的布线板部分被压靠在支撑件 身体在弯曲应力下进行第一次分裂。 此后，向上定位的夹持器向下可旋转地摆动（下摆动），以允许上夹爪压下突出的布线板部分，从而在第一分割部分再次进行相反分割，作为第二分割。 由于第二分割允许张力作用在剩余的薄的未分割树脂部分上，所以未分割树脂部分被撕开。 因此，完美的划分得以实现。 通过单行分割和单独分割来进行分数化，从而形成每个半导体器件。
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公开(公告)号：US06989587B2
公开(公告)日：2006-01-24
申请号：US10730119
申请日：2003-12-09
申请人： Mamoru Ito , Akira Muto , Tomio Yamada , Tsuneo Endoh , Satoru Konishi , Kazuaki Uehara , Tsutomu Ida , Koji Odaira , Hirokazu Nakajima
发明人： Mamoru Ito , Akira Muto , Tomio Yamada , Tsuneo Endoh , Satoru Konishi , Kazuaki Uehara , Tsutomu Ida , Koji Odaira , Hirokazu Nakajima
IPC分类号： H91L23/02
CPC分类号： H01L24/49 , H01L21/565 , H01L23/4334 , H01L24/45 , H01L24/48 , H01L2224/45124 , H01L2224/45147 , H01L2224/48137 , H01L2224/48247 , H01L2224/49175 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01042 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/014 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/15787 , H01L2924/181 , H01L2924/19041 , H01L2924/3011 , H01L2924/351 , H05K3/3426 , H05K2201/10166 , H05K2201/1084 , Y02P70/613 , H01L2924/00 , H01L2924/00014 , H01L2924/00012
摘要： There is provided a semiconductor device with enhanced reliability having a heat sink mounting a plurality of semiconductor chips, a plurality of inner leads connected electrically to the semiconductor chips, a molding body for resin molding the plurality of semiconductor chips and the plurality of inner leads, a plurality of wires for providing electrical connections between the respective electrodes of the semiconductor chips and the inner leads corresponding thereto, and wide outer leads connecting to the inner leads and exposed outside the molding body. A plurality of slits are formed in the respective portions of the outer leads located outside the molding body to extend lengthwise in directions in which the outer leads are extracted. This achieves a reduction in lead stress which is placed on the outer leads by thermal stress or the like after the mounting of a MOSFET and thereby enhances the reliability of the MOSFET.
摘要翻译： 提供了具有增强的可靠性的半导体器件，其具有安装多个半导体芯片的散热器，与半导体芯片电连接的多个内部引线，用于树脂模制多个半导体芯片和多个内部引线的成型体， 用于提供半导体芯片的各个电极和对应于其的内部引线之间的电连接的多根电线，以及连接到内部引线并暴露在模制体外部的宽的外部引线。 在位于模制体外部的外引线的各个部分中形成多个狭缝，以在外引线被抽取的方向上纵向延伸。 这实现了在安装MOSFET之后通过热应力等放置在外引线上的引线应力的降低，从而提高了MOSFET的可靠性。
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公开(公告)号：US20050082683A1
公开(公告)日：2005-04-21
申请号：US10985049
申请日：2004-11-10
申请人： Masashi Yamaura , Hirokazu Nakajima , Nobuyoshi Maejima , Mikio Negishi , Tomio Yamada , Tomomichi Koizumi , Tsuneo Endoh
发明人： Masashi Yamaura , Hirokazu Nakajima , Nobuyoshi Maejima , Mikio Negishi , Tomio Yamada , Tomomichi Koizumi , Tsuneo Endoh
CPC分类号： H05K3/284 , H01L23/29 , H01L2224/05554 , H01L2224/45144 , H01L2224/48091 , H01L2224/73265 , H01L2924/09701 , H01L2924/19105 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device comprising semiconductor chips each formed with plural pads at the main surface, chip parts each formed with connection terminals at both ends thereof, a module substrate on which the semiconductor chips and the chip parts are mounted, solder connection portions for connecting the chip parts and the substrate terminals of the module substrate by soldering, gold wires for connecting the pads of the semiconductor chips and corresponding substrate terminals of the module substrate, and a sealing portion formed with a low elasticity resin such as an insulative silicone resin or a low elasticity epoxy resin for covering the semiconductor chips, chip parts, solder connection portions and gold wires which prevents flow out of the solder in the solder connection portion by re-melting thereby preventing short-circuit.
摘要翻译： 一种半导体器件，包括在主表面上形成有多个焊盘的半导体芯片，各自形成有两端的连接端子的芯片部件，安装有半导体芯片和芯片部件的模块基板，用于连接芯片的焊接连接部 通过焊接来模块基板的部件和基板端子，用于连接半导体芯片的焊盘的金线和模块基板的相应的基板端子，以及由诸如绝缘硅树脂的低弹性树脂形成的密封部分 用于覆盖半导体芯片，芯片部件，焊料连接部分和金线的弹性环氧树脂，其通过再熔化防止焊料连接部分中的焊料流出，从而防止短路。
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公开(公告)号：US07468294B2
公开(公告)日：2008-12-23
申请号：US10985049
申请日：2004-11-10
申请人： Masashi Yamaura , Hirokazu Nakajima , Nobuyoshi Maejima , Mikio Negishi , Tomio Yamada , Tomomichi Koizumi , Tsuneo Endoh
发明人： Masashi Yamaura , Hirokazu Nakajima , Nobuyoshi Maejima , Mikio Negishi , Tomio Yamada , Tomomichi Koizumi , Tsuneo Endoh
CPC分类号： H05K3/284 , H01L23/29 , H01L2224/05554 , H01L2224/45144 , H01L2224/48091 , H01L2224/73265 , H01L2924/09701 , H01L2924/19105 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device comprising semiconductor chips each formed with plural pads at the main surface, chip parts each formed with connection terminals at both ends thereof, a module substrate on which the semiconductor chips and the chip parts are mounted, solder connection portions for connecting the chip parts and the substrate terminals of the module substrate by soldering, gold wires for connecting the pads of the semiconductor chips and corresponding substrate terminals of the module substrate, and a sealing portion formed with a low elasticity resin such as an insulative silicone resin or a low elasticity epoxy resin for covering the semiconductor chips, chip parts, solder connection portions and gold wires which prevents flow out of the solder in the solder connection portion by re-melting thereby preventing short-circuit.
摘要翻译： 一种半导体器件，包括在主表面上形成有多个焊盘的半导体芯片，各自形成有两端的连接端子的芯片部件，安装有半导体芯片和芯片部件的模块基板，用于连接芯片的焊接连接部 通过焊接来模块基板的部件和基板端子，用于连接半导体芯片的焊盘的金线和模块基板的相应的基板端子，以及由诸如绝缘硅树脂的低弹性树脂形成的密封部分 用于覆盖半导体芯片，芯片部件，焊料连接部分和金线的弹性环氧树脂，其通过再熔化防止焊料连接部分中的焊料流出，从而防止短路。
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公开(公告)号：US06710263B2
公开(公告)日：2004-03-23
申请号：US09790978
申请日：2001-02-23
申请人： Toshiyuki Kobayashi , Yasutoshi Kurihara , Takumi Ueno , Nobuyoshi Maejima , Hirokazu Nakajima , Tomio Yamada , Tsuneo Endoh
发明人： Toshiyuki Kobayashi , Yasutoshi Kurihara , Takumi Ueno , Nobuyoshi Maejima , Hirokazu Nakajima , Tomio Yamada , Tsuneo Endoh
IPC分类号： H05K116
CPC分类号： H01L24/97 , H01L23/49894 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/32225 , H01L2224/45015 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45169 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/97 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01015 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01051 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/09701 , H01L2924/10329 , H01L2924/1306 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15787 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2924/351 , H05K1/0271 , H05K1/0306 , H05K3/0052 , H05K3/284 , H05K3/4611 , H05K3/4629 , H05K2201/09036 , H05K2201/0909 , H05K2203/175 , H01L2224/92247 , H01L2224/85 , H01L2224/83 , H01L2924/00012 , H01L2924/00 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/20758 , H01L2924/20759 , H01L2924/2075 , H01L2924/2076 , H01L2924/20754 , H01L2224/05599 , H01L2924/01049
摘要： In a semiconductor device, the likely occurrence of cracking of a ceramic substrate, and the consequential disconnection of internal layer wiring, due to thermal changes suffered when the semiconductor device is mounted on external wiring boards having different thermal expansion is prevented. The semiconductor device has a ceramic substrate, a wiring pattern formed on a first principal plane and having mounted semiconductor components, an external electrode portion formed on a second principal plane and connected to an external circuit, internal layer wiring formed inside said ceramic substrate to electrically connect said wiring pattern and said external electrode portion via through-hole wiring, and semiconductor components and a resin layer covering said semiconductor components, wherein the internal layer wiring is formed internally with respect to the side of said ceramic substrate with a clearance of at least 0.05 mm.
摘要翻译： 在半导体装置中，防止了当将半导体器件安装在具有不同热膨胀的外部布线板上时，由于热变化而导致陶瓷基板的破裂的可能发生，以及由此导致的内层布线的断开。 半导体器件具有陶瓷基板，形成在第一主平面上并具有安装的半导体部件的布线图案，形成在第二主平面上并连接到外部电路的外部电极部分，形成在所述陶瓷基板内部的内部层布线， 通过通孔布线连接所述布线图案和所述外部电极部分，以及半导体部件和覆盖所述半导体部件的树脂层，其中内层布线相对于所述陶瓷基板的侧面至少形成有至少间隙 0.05毫米。
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8.发明授权公开(公告)号：US06831360B2
公开(公告)日：2004-12-14
申请号：US10021173
申请日：2001-12-19
申请人： Masashi Yamaura , Hirokazu Nakajima , Nobuyoshi Maejima , Mikio Negishi , Tomio Yamada , Tomomichi Koizumi , Tsuneo Endoh
发明人： Masashi Yamaura , Hirokazu Nakajima , Nobuyoshi Maejima , Mikio Negishi , Tomio Yamada , Tomomichi Koizumi , Tsuneo Endoh
IPC分类号： H01L2334
CPC分类号： H05K3/284 , H01L23/29 , H01L2224/05554 , H01L2224/45144 , H01L2224/48091 , H01L2224/73265 , H01L2924/09701 , H01L2924/19105 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device comprising semiconductor chips each formed with plural pads at the main surface, chip parts each formed with connection terminals at both ends thereof, a module substrate on which the semiconductor chips and the chip parts are mounted, solder connection portions for connecting the chip parts and the substrate terminals of the module substrate by soldering, gold wires for connecting the pads of the semiconductor chips and corresponding substrate terminals of the module substrate, and a sealing portion formed with a low elasticity resin such as an insulative silicone resin or a low elasticity epoxy resin for covering the semiconductor chips, chip parts, solder connection portions and gold wires which prevents flow out of the solder in the solder connection portion by re-melting thereby preventing short-circuit.
摘要翻译： 一种半导体器件，包括在主表面上形成有多个焊盘的半导体芯片，各自形成有两端的连接端子的芯片部件，安装有半导体芯片和芯片部件的模块基板，用于连接芯片的焊接连接部 通过焊接来模块基板的部件和基板端子，用于连接半导体芯片的焊盘的金线和模块基板的相应的基板端子，以及由诸如绝缘硅树脂的低弹性树脂形成的密封部分 用于覆盖半导体芯片，芯片部件，焊料连接部分和金线的弹性环氧树脂，其通过再熔化防止焊料连接部分中的焊料流出，从而防止短路。
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公开(公告)号：US20070035004A1
公开(公告)日：2007-02-15
申请号：US11585159
申请日：2006-10-24
IPC分类号： H01L23/02
CPC分类号： H05K3/303 , H01L23/3121 , H01L23/3677 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0657 , H01L2224/16225 , H01L2224/16235 , H01L2224/32013 , H01L2224/32225 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/73257 , H01L2224/73265 , H01L2224/83138 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555 , H01L2225/06582 , H01L2225/06589 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01041 , H01L2924/01047 , H01L2924/01078 , H01L2924/01082 , H01L2924/12041 , H01L2924/1306 , H01L2924/13091 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H05K1/183 , H05K2201/0367 , H05K2201/09781 , H05K2201/10515 , H05K2201/2036 , Y02P70/613 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2224/0401
摘要： The present invention realizes strengthening of a ground of a lower-surface ground electrode of an upper semiconductor chip and miniaturization in a semiconductor module on which two semiconductor chips are mounted in a stacked manner. A lower semiconductor chip is fixed to a bottom of a recess formed in an upper surface of a module board, and an upper semiconductor chip is fixed to an upper surface of a support body made of conductor which is formed over the upper surface of the module board around the recess. External electrode terminals and a heat radiation pad are formed over a lower surface of the module board.
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公开(公告)号：US20090194792A1
公开(公告)日：2009-08-06
申请号：US12413010
申请日：2009-03-27
申请人： Satoru Konishi , Tsuneo Endo , Hirokazu Nakajima , Yasunari Umemoto , Satoshi Sasaki , Chushiro Kusano , Yoshinori Imamura , Atsushi Kurokawa
发明人： Satoru Konishi , Tsuneo Endo , Hirokazu Nakajima , Yasunari Umemoto , Satoshi Sasaki , Chushiro Kusano , Yoshinori Imamura , Atsushi Kurokawa
IPC分类号： H01L27/082 , H01L23/498
CPC分类号： H01L29/4933 , H01L21/84 , H01L23/4824 , H01L23/49844 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/16 , H01L29/456 , H01L29/7835 , H01L2224/1403 , H01L2224/16235 , H01L2224/1703 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/49175 , H01L2224/73253 , H01L2224/73265 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/1305 , H01L2924/13091 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device has an external wiring for GND formed over an underside surface of a wiring substrate. A plurality of via holes connecting to the external wiring for GND are formed to penetrate the wiring substrate. A first semiconductor chip of high power consumption, including HBTs, is mounted over a principal surface of the wiring substrate. The emitter bump electrode of the first semiconductor chip is connected in common with emitter electrodes of a plurality of HBTs formed in the first semiconductor chip. The emitter bump electrode is extended in a direction in which the HBTs line up. The first semiconductor chip is mounted over the wiring substrate so that a plurality of the via holes are connected with the emitter bump electrode. A second semiconductor chip lower in heat dissipation value than the first semiconductor chip is mounted over the first semiconductor chip.
摘要翻译： 半导体器件具有在布线基板的下表面上形成的用于GND的外部布线。 连接到GND的外部配线的多个通孔形成为穿透布线基板。 包括HBT的高功率的第一半导体芯片安装在布线基板的主表面上。 第一半导体芯片的发射极电极与形成在第一半导体芯片中的多个HBT的发射极共同连接。 发射极电极沿HBT排列的方向延伸。 第一半导体芯片安装在布线基板上，使得多个通孔与发射极电极连接。 散热值比第一半导体芯片低的第二半导体芯片安装在第一半导体芯片上。
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