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公开(公告)号：US06734539B2
公开(公告)日：2004-05-11
申请号：US09964009
申请日：2001-09-26
申请人： Yinon Degani , Thomas Dixon Dudderar , Liguo Sun , Meng Zhao
发明人： Yinon Degani , Thomas Dixon Dudderar , Liguo Sun , Meng Zhao
IPC分类号： H01L2302
CPC分类号： H05K1/144 , H01L23/552 , H01L23/66 , H01L24/48 , H01L24/73 , H01L25/0652 , H01L25/105 , H01L25/18 , H01L2223/6688 , H01L2224/05599 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/85399 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/10253 , H01L2924/14 , H01L2924/15151 , H01L2924/15153 , H01L2924/15311 , H01L2924/15331 , H01L2924/19105 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： The specification describes an MCM package which contains both a digital MCM and an RF MCM in a stacked configuration. The package contains means for isolating RF signals from digital signals. In one case the digital MCM substrate is attached to the system substrate and the RF MCM substrate is attached to the digital MCM substrate. Solder bumps are used for attachment in an arrangement resembling a BGA. For high density packages, at least the digital MCM comprises stacked IC chips. In the embodiment with the RF MCM substrate on the top of the stack, Passive Through Interconnections (PTIs) are made through the digital MCM substrate, and electrically isolated therefrom. The passive through interconnections are made through the solder bumps between boards and interconnected using a passive (with respect to the digital MCM board) through hole. Both the RF ground and the RF input can be isolated using PTIs. For additional isolation, the solder bumps comprising the PTIs are shielded with a Faraday cage. The Faraday cage comprises an array of solder bumps surrounding the solder bump RF conductors.
摘要翻译： 该规范描述了包含堆叠配置中的数字MCM和RF MCM的MCM包。 该封装包含用于隔离RF信号与数字信号的装置。 在一种情况下，数字MCM基板附着到系统基板，并且RF MCM基板附接到数字MCM基板。 焊接凸块用于在类似于BGA的布置中的附接。 对于高密度封装，至少数字MCM包括堆叠的IC芯片。 在堆叠顶部具有RF MCM衬底的实施例中，通过数字MCM衬底制作被动通孔互连（PTI），并与之电隔离。 被动通过互连通过板之间的焊料凸块制成，并使用无源（相对于数字MCM板）通孔进行互连。 RF接地和RF输入都可以使用PTI进行隔离。 为了进一步隔离，包含PTI的焊料凸块用法拉第笼保护。 法拉第笼包括围绕焊料凸块RF导体的焊料凸块阵列。
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公开(公告)号：US06369444B1
公开(公告)日：2002-04-09
申请号：US09081448
申请日：1998-05-19
IPC分类号： H01L2334
CPC分类号： H01L25/0652 , H01L2224/16225 , H01L2924/15151 , H01L2924/15321
摘要： The specification describes interconnection assemblies for silicon-on-silicon multichip modules. The silicon-on-silicon MCMs are mounted on epoxy/glass laminates which have a coefficient of thermal expansion (CTE) that essentially matches the CTE of silicon. In the preferred embodiment the assembly is a PC card with card edge connectors, i.e. without fixed solder interlevel interconnections, so that the CTE of the epoxy laminate comprising the card can be modified without regard to potential mismatch with a mother board.
摘要翻译： 该规范描述了硅上硅多芯片模块的互连组件。 硅上硅MCM安装在具有基本上与硅的CTE匹配的热膨胀系数（CTE）的环氧树脂/玻璃层压板上。 在优选实施例中，组件是具有卡边缘连接器的PC卡，即没有固定的焊料层间互连，使得可以修改包含卡的环氧树脂层压体的CTE，而不考虑与母板的潜在不匹配。
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公开(公告)号：US06282100B1
公开(公告)日：2001-08-28
申请号：US09346100
申请日：1999-07-01
IPC分类号： H05K118
CPC分类号： H01L23/49833 , H01L24/45 , H01L24/48 , H01L25/0657 , H01L2224/16145 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2225/0651 , H01L2225/06517 , H01L2225/06572 , H01L2225/06586 , H01L2924/01079 , H01L2924/10253 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： The specification describes a high density I/O IC package in which the IC chip is bonded to a silicon intermediate interconnection substrate (IIS), and the IIS is wire bonded to a printed wiring board. This marriage of wire bond technology with high density I/O IC chips results in a low cost, high reliability, state of the art IC package.
摘要翻译： 该说明书描述了IC芯片与硅中间互连基板（IIS）接合的高密度I / O IC封装，并且IIS被引线接合到印刷电路板。 这种线接技术与高密度I / O IC芯片的结合导致低成本，高可靠性，最先进的IC封装。
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公开(公告)号：US06251705B1
公开(公告)日：2001-06-26
申请号：US09425706
申请日：1999-10-22
IPC分类号： H01L2148
CPC分类号： H01L24/81 , H01L2224/05124 , H01L2224/05147 , H01L2224/05572 , H01L2224/05573 , H01L2224/05671 , H01L2224/16145 , H01L2224/81801 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01075 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/12042 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H01L2924/00 , H01L2924/00014
摘要： The specification describes methods for manufacturing thin tiles for IC packages using thinning techniques. The method includes the step of thinning the IC devices in chip form. This is achieved at the final stage of assembly where the chips are flip-chip bonded to the substrate and the backside of the chips is exposed for thinning. Using this approach, final chip thickness of the order of 2-8 mils can be produced and overall package thickness is dramatically reduced.
摘要翻译： 本说明书描述了使用稀疏技术制造IC封装薄片的方法。 该方法包括以芯片形式稀疏IC器件的步骤。 这在组装的最后阶段实现，其中芯片被倒装连接到基板，并且芯片的背面暴露以使其变薄。 使用这种方法，可以产生2-8密耳数量级的最终芯片厚度，并且总体封装厚度显着降低。
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5.发明授权Thin packaging of multi-chip modules with enhanced thermal/power management 失效具有增强的热/电源管理的多芯片模块的薄封装
公开(公告)号：US5646828A
公开(公告)日：1997-07-08
申请号：US697121
申请日：1996-08-20
IPC分类号： H01L25/18 , H01L23/13 , H01L23/14 , H01L23/24 , H01L23/367 , H01L23/538 , H01L25/04 , H01L25/065 , H01L25/07 , H01L25/16 , H05K1/14 , H05K1/18 , H05K7/20
CPC分类号： H01L25/162 , H01L23/13 , H01L23/147 , H01L23/24 , H01L23/3677 , H01L23/5385 , H01L25/0655 , H01L2224/16145 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73253 , H01L24/48 , H01L2924/00014 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/10253 , H01L2924/14 , H01L2924/15151 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/15321 , H01L2924/16195 , H01L2924/181 , H01L2924/18161 , H01L2924/19041 , H01L2924/3025 , H05K1/141 , H05K1/142 , H05K1/182
摘要： A novel packaging of semiconductor elements, such as MCM tiles, with a variety of printed circuit or wired boards (PWB), the packages occupying a small size, at least in the vertical direction, relative to prior art OMPAC devices. The MCM tile includes an interconnection substrate with peripheral metallizations and at least one chip or integrated circuit (IC) mounted on the substrate by solder reflow or conductive adhesive technology. The PWB which may be a single level or a multilevel, is provided with an aperture for accommodation of at least one chip therein. Depending on the type of interconnection between the substrate and the PWB, the aperture may be larger than the substrate of the MCM tile for wire bonding interconnection or smaller than the substrate for solder reflow or conductive adhesive interconnection. In the wire bonding case, the MCM tile is positioned within the aperture resting on the surface of the PWB or of a structural member or of a heat sink which encloses one end of the aperture. The other end of the aperture may be open or enclosed by a structural member, a heat sink, another PWB or a mother board. For solder reflow or conductive adhesive interconnection, the substrate which is larger than the aperture is positioned so that its ends overlap areas of the PWB adjacent the aperture and the chips and/or substrate are positioned within the aperture. The interconnections are enclosed in a compliable encapsulating material, such as silica gel.
摘要翻译： 相对于现有技术的OMPAC设备，至少在垂直方向上具有小尺寸的半导体元件（例如MCM瓦片）与各种印刷电路板或布线板（PWB）的新型封装。 MCM瓦片包括具有外围金属化的互连基板和通过焊料回流或导电粘合技术安装在基板上的至少一个芯片或集成电路（IC）。 可以是单级或多级的PWB设置有用于在其中容纳至少一个芯片的孔。 根据基板和PWB之间的互连类型，孔径可能大于用于引线接合互连的MCM瓦片的基板，或者小于用于焊料回流或导电粘合剂互连的基板。 在引线接合壳体中，MCM瓦片位于留在PWB的表面上的孔内，或者围绕孔的一端的结构构件或散热器。 孔的另一端可以由结构构件，散热器，另一PWB或母板打开或封闭。 对于焊料回流或导电粘合剂互连，大于孔的衬底被定位成使得其端部与邻近孔的重叠区域重叠，并且芯片和/或衬底位于孔内。 互连被封装在可复制的封装材料中，例如硅胶。
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公开(公告)号：US06437990B1
公开(公告)日：2002-08-20
申请号：US09528882
申请日：2000-03-20
IPC分类号： H05K706
CPC分类号： H01L25/0655 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/81 , H01L24/85 , H01L25/18 , H01L2224/05554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/4943 , H01L2224/73253 , H01L2224/8121 , H01L2224/81815 , H01L2224/85 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01079 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/1532 , H05K1/141 , H05K3/3436 , H01L2924/00014 , H01L2924/00
摘要： The specification describes a high density IC BGA package in which one or more IC chips are wire bonded to a BGA substrate in a conventional fashion and the BGA substrate is solder ball bonded to a printed wiring board. The standoff between the BGA substrate and the printed wiring board to which it is attached provides a BGA gap which, according to the invention, accommodates one or more IC chips flip-chip bonded to the underside of the BGA substrate. The recognition that state of the art IC chips, especially chips that are thinned, can easily fit into the BGA gap makes practical this efficient use of the BGA gap. The approach of the invention also marries wire bond technology with high packing density flip-chip assembly to produce a low cost, high reliability, state of the art IC package.
摘要翻译： 该说明书描述了一种高密度IC BGA封装，其中一个或多个IC芯片以常规方式引线接合到BGA衬底，并且BGA衬底焊接到印刷线路板上。 BGA衬底与其所附接的印刷电路板之间的间隔提供了一个BGA间隙，根据本发明，它可以容纳一个或多个倒装芯片，其结合到BGA衬底的底面。 认识到现有技术的IC芯片，特别是薄型的芯片，可以很容易地适应BGA间隙，实际上可以有效地利用BGA间隙。 本发明的方法还将引线键合技术与高封装密度倒装芯片组合结合，以产生低成本，高可靠性，最先进的IC封装。
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公开(公告)号：US06370766B1
公开(公告)日：2002-04-16
申请号：US08807266
申请日：1997-02-28
IPC分类号： H05K330
CPC分类号： H05K1/0268 , G01R31/2818 , H05K3/0052 , Y10T29/4913 , Y10T29/49144
摘要： The specification describes methods for the manufacture of printed circuit cards which allow for final testing, including burn-in if required, of multiples of printed circuit cards as an integrated process panel prior to final packaging and singulation. This desired sequence of operations is made possible by the addition of arrays of test contacts at the edge of the integrated process panel where the test contacts can be accessed with an insertion test apparatus.
摘要翻译： 本说明书描述了用于制造印刷电路卡的方法，其允许最终测试，包括如果需要，在最终包装和分割之前作为集成处理面板的多个印刷电路卡进行最终测试。 通过在集成处理面板的边缘添加测试触点的阵列，可以使用插入测试装置访问测试触点，从而可以实现所需的操作顺序。
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公开(公告)号：US6077725A
公开(公告)日：2000-06-20
申请号：US940157
申请日：1992-09-03
CPC分类号： H01L24/81 , H01L21/4867 , H01L24/75 , H05K3/3484 , H01L2224/1132 , H01L2224/16 , H01L2224/742 , H01L2224/75 , H01L2224/81192 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01033 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H01L2924/30107 , H05K2201/10674 , H05K2203/048 , H05K3/1216 , H05K3/3431 , H05K3/3436 , H05K3/3463
摘要： A multichip module is assembled using flip-chip bonding technology, a stencil printable solder paste and standard surface mount equipment for interconnecting signaling input/output contact pads on devices within such multichip module.
摘要翻译： 多芯片模块使用倒装芯片焊接技术组装，模板可印刷焊膏和标准表面贴装设备，用于在这种多芯片模块中的器件上互连信号输入/输出接触焊盘。
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公开(公告)号：US06396711B1
公开(公告)日：2002-05-28
申请号：US09588336
申请日：2000-06-06
IPC分类号： H05K702
CPC分类号： B81B7/007 , H01L2224/16225 , H01L2224/48227 , H01L2924/10253 , H01L2924/19107 , H01L2924/00
摘要： The specification describes interconnection strategies for micro-electronic machined mechanical systems (MEMS). Typical MEMS device array comprise a large number of individual mechanical devices each electrically driven by multi-chip modules (MCMs). High density interconnection is achieved by mounting the MCMs mounted on both sides of a system interconnection substrate. Overall interconnection length is reduced by locating the MCMs in a common circuit driving a given mechanical element on opposite sides of the system interconnection substrate and interconnecting them using vias through the substrate. Rapid replacement/repair is facilitated by mounted all active elements in sockets using contact pin arrays for electrical connections. In service reliability is obtained by providing spare sockets for redundant MCMs.
摘要翻译： 该规范描述了微电子加工机械系统（MEMS）的互连策略。 典型的MEMS器件阵列包括大量由多芯片模块（MCM）电驱动的各个机械装置。 通过安装安装在系统互连基板两侧的MCM来实现高密度互连。 通过将MCM定位在驱动系统互连基板的相对侧上的给定机械元件的公共电路中并且使用通孔穿过基板将它们互连来减小总互连长度。 通过将所有有源元件安装在插座中，使用接触针阵列进行电气连接，便于快速更换/维修。 通过为冗余MCM提供备用插座来获得服务可靠性。
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公开(公告)号：US6160715A
公开(公告)日：2000-12-12
申请号：US149804
申请日：1998-09-08
CPC分类号： H01L23/49827 , H01L23/13 , H01L23/147 , H01L23/3128 , H01L2224/16 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/15173 , H05K2201/10477
摘要： The specification describes a recessed chip IC package in which the IC chip is bonded to a translator, and power and ground planes for IC power and ground interconnections are formed on separate interconnect levels of the translator. The multilevel interconnection capability of the translator allows crossovers, and allows power and ground pins from the IC chip to be both isolated from signal I/Os, and consolidated into fewer interconnections going to the next board level. The translator also has a large area outboard of the IC chip area to allow fan out from high pin count chips to large pitch interconnection sites for interconnection to the next board level.
摘要翻译： 本说明书描述了一种嵌入式芯片IC封装，其中IC芯片与转换器接合，并且用于IC电源和接地互连的电源和接地层形成在转换器的单独互连电平上。 转换器的多电平互联能力允许交叉，并允许IC芯片的电源和接地引脚与信号I / O隔离，并且整合到进入下一个电路板级别的较少互连。 翻译器还具有IC芯片面积大的外部面积，可将风扇从高引脚数芯片到大间距互连位置互连到下一个板级。
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