摘要:
The specification describes an MCM package which contains both a digital MCM and an RF MCM in a stacked configuration. The package contains means for isolating RF signals from digital signals. In one case the digital MCM substrate is attached to the system substrate and the RF MCM substrate is attached to the digital MCM substrate. Solder bumps are used for attachment in an arrangement resembling a BGA. For high density packages, at least the digital MCM comprises stacked IC chips. In the embodiment with the RF MCM substrate on the top of the stack, Passive Through Interconnections (PTIs) are made through the digital MCM substrate, and electrically isolated therefrom. The passive through interconnections are made through the solder bumps between boards and interconnected using a passive (with respect to the digital MCM board) through hole. Both the RF ground and the RF input can be isolated using PTIs. For additional isolation, the solder bumps comprising the PTIs are shielded with a Faraday cage. The Faraday cage comprises an array of solder bumps surrounding the solder bump RF conductors.
摘要:
The specification describes interconnection assemblies for silicon-on-silicon multichip modules. The silicon-on-silicon MCMs are mounted on epoxy/glass laminates which have a coefficient of thermal expansion (CTE) that essentially matches the CTE of silicon. In the preferred embodiment the assembly is a PC card with card edge connectors, i.e. without fixed solder interlevel interconnections, so that the CTE of the epoxy laminate comprising the card can be modified without regard to potential mismatch with a mother board.
摘要:
The specification describes a high density I/O IC package in which the IC chip is bonded to a silicon intermediate interconnection substrate (IIS), and the IIS is wire bonded to a printed wiring board. This marriage of wire bond technology with high density I/O IC chips results in a low cost, high reliability, state of the art IC package.
摘要翻译:该说明书描述了IC芯片与硅中间互连基板(IIS)接合的高密度I / O IC封装,并且IIS被引线接合到印刷电路板。 这种线接技术与高密度I / O IC芯片的结合导致低成本,高可靠性,最先进的IC封装。
摘要:
The specification describes methods for manufacturing thin tiles for IC packages using thinning techniques. The method includes the step of thinning the IC devices in chip form. This is achieved at the final stage of assembly where the chips are flip-chip bonded to the substrate and the backside of the chips is exposed for thinning. Using this approach, final chip thickness of the order of 2-8 mils can be produced and overall package thickness is dramatically reduced.
摘要:
A novel packaging of semiconductor elements, such as MCM tiles, with a variety of printed circuit or wired boards (PWB), the packages occupying a small size, at least in the vertical direction, relative to prior art OMPAC devices. The MCM tile includes an interconnection substrate with peripheral metallizations and at least one chip or integrated circuit (IC) mounted on the substrate by solder reflow or conductive adhesive technology. The PWB which may be a single level or a multilevel, is provided with an aperture for accommodation of at least one chip therein. Depending on the type of interconnection between the substrate and the PWB, the aperture may be larger than the substrate of the MCM tile for wire bonding interconnection or smaller than the substrate for solder reflow or conductive adhesive interconnection. In the wire bonding case, the MCM tile is positioned within the aperture resting on the surface of the PWB or of a structural member or of a heat sink which encloses one end of the aperture. The other end of the aperture may be open or enclosed by a structural member, a heat sink, another PWB or a mother board. For solder reflow or conductive adhesive interconnection, the substrate which is larger than the aperture is positioned so that its ends overlap areas of the PWB adjacent the aperture and the chips and/or substrate are positioned within the aperture. The interconnections are enclosed in a compliable encapsulating material, such as silica gel.
摘要:
The specification describes a high density IC BGA package in which one or more IC chips are wire bonded to a BGA substrate in a conventional fashion and the BGA substrate is solder ball bonded to a printed wiring board. The standoff between the BGA substrate and the printed wiring board to which it is attached provides a BGA gap which, according to the invention, accommodates one or more IC chips flip-chip bonded to the underside of the BGA substrate. The recognition that state of the art IC chips, especially chips that are thinned, can easily fit into the BGA gap makes practical this efficient use of the BGA gap. The approach of the invention also marries wire bond technology with high packing density flip-chip assembly to produce a low cost, high reliability, state of the art IC package.
摘要:
The specification describes methods for the manufacture of printed circuit cards which allow for final testing, including burn-in if required, of multiples of printed circuit cards as an integrated process panel prior to final packaging and singulation. This desired sequence of operations is made possible by the addition of arrays of test contacts at the edge of the integrated process panel where the test contacts can be accessed with an insertion test apparatus.
摘要:
A multichip module is assembled using flip-chip bonding technology, a stencil printable solder paste and standard surface mount equipment for interconnecting signaling input/output contact pads on devices within such multichip module.
摘要:
The specification describes interconnection strategies for micro-electronic machined mechanical systems (MEMS). Typical MEMS device array comprise a large number of individual mechanical devices each electrically driven by multi-chip modules (MCMs). High density interconnection is achieved by mounting the MCMs mounted on both sides of a system interconnection substrate. Overall interconnection length is reduced by locating the MCMs in a common circuit driving a given mechanical element on opposite sides of the system interconnection substrate and interconnecting them using vias through the substrate. Rapid replacement/repair is facilitated by mounted all active elements in sockets using contact pin arrays for electrical connections. In service reliability is obtained by providing spare sockets for redundant MCMs.
摘要:
The specification describes a recessed chip IC package in which the IC chip is bonded to a translator, and power and ground planes for IC power and ground interconnections are formed on separate interconnect levels of the translator. The multilevel interconnection capability of the translator allows crossovers, and allows power and ground pins from the IC chip to be both isolated from signal I/Os, and consolidated into fewer interconnections going to the next board level. The translator also has a large area outboard of the IC chip area to allow fan out from high pin count chips to large pitch interconnection sites for interconnection to the next board level.