公开(公告)号：EP1869958A1

公开(公告)日：2007-12-26

申请号：EP06721810.7

申请日：2006-04-12

Applicant: SIERRA WIRELESS, INC.

Inventor： LIU, Ping ,  LI, Min

IPC: H05K7/20 ,  G06F1/20

CPC classification number: H05K1/0209 ,  G06F1/203 ,  H05K2201/066 ,  H05K2201/09309 ,  H05K2201/09318 ,  H05K2201/10446

Abstract: A method and apparatus for providing thermal dissipation from a PC card is disclosed. For one embodiment of the invention, an extension portion, having a heat sink implemented thereon, is provided for a PC card. The extension portion extends beyond the PC card slot allowing thermal dissipation from the card due to air flow over the heat sink. For one embodiment of the invention, heat producing components of the PC card are identified and a thermally conductive path is provided from the components to the extension portion of the PC card.

公开(公告)号：EP1589798A4

公开(公告)日：2007-11-28

申请号：EP03815594

申请日：2003-01-31

Applicant: FUJITSU LTD

Inventor： KOYAMA HIDEKI

IPC: H01L23/498 ,  H01P3/08 ,  H05K1/11 ,  H05K1/16 ,  H05K3/42 ,  H05K3/46 ,  H01L23/12

CPC classification number: H01L23/49822 ,  H01L23/50 ,  H01L2224/16 ,  H01L2924/09701 ,  H01L2924/3011 ,  H01P3/088 ,  H05K1/0298 ,  H05K1/112 ,  H05K1/115 ,  H05K1/162 ,  H05K3/429 ,  H05K3/4641 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/10674

Abstract: A multilayer printed board comprising a plurality of capacitive coupling layers (6) each consisting of a dielectric layer (4) and a power supply layer (3) and a ground layer (5) facing each other while sandwiching the dielectric layer (4), first vias (7) connecting between the power supply layers (3) included in the plurality of capacitive coupling layers (6), and second vias (8) connecting between the ground layers (5) included in the plurality of capacitive coupling layers (6).

公开(公告)号：EP1827064A1

公开(公告)日：2007-08-29

申请号：EP05799990.6

申请日：2005-11-02

Applicant: MITSUI MINING & SMELTING CO., LTD.

Inventor： KANNO, A., c/o MITSUI MINING & SMELTING CO., LTD ,  ABE, N., c/o MITSUI MINING & SMELTING CO., LTD ,  SUGIOKA, A., c/o MITSUI MINING & SMELTING CO., LTD ,  MASHIKO, Y., c/o MITSUI MINING & SMELTING CO., LTD

IPC: H05K1/16 ,  H01G4/12

CPC classification number: H01G4/228 ,  H01G4/008 ,  H01G4/12 ,  H05K1/09 ,  H05K1/162 ,  H05K3/4641 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  Y10T428/26 ,  Y10T428/31678

Abstract: It is an object of the present invention to provide a capacitor layer forming material which is applicable to printed wiring boards manufactured through a high-temperature processing of 300°C to 400°C of a fluorine-contained resin substrate, a liquid crystal polymer and the like, and exhibits no deterioration of the strength after a high-temperature heating. In order to achieve the object, a capacitor layer forming material for a printed wiring board which comprises a first conductive layer used for forming a top electrode, a second conductive layer used for forming a bottom electrode and a dielectric layer between the first and second conductive layers, characterized in that for the second conductive layer, a nickel layer or a nickel alloy layer is employed. The nickel layer or the nickel alloy layer as the second conductive layer preferably has a thickness of 10 micron meter to 100 micron meter. Further, the sol-gel method is suitably employed to form the dielectric layer on the nickel layer or the nickel alloy layer constituting the second conductive layer.

Abstract translation: 这是本发明的一个目的是提供一种电容器层形成材料的所有其适用于通过300℃的高温加工制造成400℃的含氟树脂基板，液晶聚合物和印刷布线板 等，并且显示出高的温度加热后没有强度的劣化。 为了实现上述目的，一种用于印刷电路板的电容器层形成材料，其包括用于形成顶部电极，用于形成底部电极与所述第一和第二导电之间的介电层的第二导电层的第一导电层 层，其特征在于在没有为所述第二导电层，一个镍层或镍合金层被使用。 该镍层或镍合金层作为第二导电层的厚度优选为10微米计100微米仪。 此外，溶胶 - 凝胶法适当地用于形成镍层或构成第二导电层中的镍合金层上的电介质层。

公开(公告)号：EP1777744A2

公开(公告)日：2007-04-25

申请号：EP06019852.0

申请日：2006-09-22

Applicant: E.I. du Pont de Nemours and Company

Inventor： Swaminathan, Madhavan ,  Wan, Lixi ,  Engin, Ege ,  Muthana, Prathap

IPC: H01L23/498 ,  H05K1/16 ,  H01L23/50 ,  H01L23/64

CPC classification number: H05K1/162 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09618 ,  H05K2201/09763 ,  Y10S257/904 ,  Y10S257/924 ,  H01L2924/00

Abstract: One embodiment of the present invention provides a device for providing a low noise power supply package to an IC in the mid-frequency range of 1 MHz to 3 GHz comprising installing in said package an array of embedded discrete ceramic capacitors (1600), and optionally planar capacitor layers (1500). A further embodiment provides a device for providing a low noise power supply package to an IC in the mid-frequency range of 1 MHz to 3 GHz comprising using an array of embedded discrete ceramic capacitors with different resonance frequencies, arranged in such a way that the capacitor array's impedance vs frequency curve in the critical mid-frequency range yields impedance values at or below a targeted impedance value.

Abstract translation: 本发明的一个实施例提供了一种用于在1兆赫至3千兆赫，包括在所述封装安装到嵌入离散的陶瓷电容器（1600）的阵列的中间频率范围在IC提供低噪声电源包，以及任选地 平面电容器层（1500）。 另一实施例提供了一种用于在1兆赫至3千兆赫使用具有不同谐振频率的嵌入离散的陶瓷电容器，在寻求一种方式布置的阵列，其包括中间频率范围在IC提供低噪声电源包做了 电容器阵列的阻抗与在等于或低于目标阻抗值的临界中频范围的产率的阻抗值频率曲线。

公开(公告)号：EP1713314A1

公开(公告)日：2006-10-18

申请号：EP05709704.0

申请日：2005-02-03

Applicant: IBIDEN CO., LTD.

Inventor： INAGAKI, Yasushi; c/o IBIDEN Co., Ltd. ,  SANO, Katsuyuki; c/o IBIDEN Co., Ltd.

IPC: H05K3/46

CPC classification number: H05K1/0237 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5383 ,  H01L23/66 ,  H01L24/81 ,  H01L2223/6616 ,  H01L2223/6622 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K1/0224 ,  H05K1/0263 ,  H05K1/0265 ,  H05K1/111 ,  H05K1/115 ,  H05K1/144 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/0352 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09736 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: Provides an IC chip for high frequency region, particularly a packaged substrate in which no malfunction or error occurs even if 3GHz is exceeded. Conductive layer 34P on core substrate 30 is formed in the thickness of 30µm and a conductor circuit 58 on interlayer resin insulation layer 50 is formed in the thickness of 15µm. By thickening the conductive layer 34P, the volume of the conductor can be increased and resistance can be reduced. Further, by using the conductive layer 34 as a power source layer, the capacity of supply of power to an IC chip can be improved.

Abstract translation: 提供用于高频区域的IC芯片，特别是即使超过3GHz也不会发生故障或错误的封装基板。 核心基板30上的导电层34P形成为30μm的厚度，层间树脂绝缘层50上的导体电路58形成为15μm的厚度。 通过增厚导电层34P，可以增加导体的体积并且可以减小电阻。 此外，通过使用导电层34作为电源层，可以提高向IC芯片供电的容量。

公开(公告)号：EP1419528B1

公开(公告)日：2006-10-18

申请号：EP02761469.2

申请日：2002-08-22

Applicant: 3M Innovative Properties Company

Inventor： SYLVESTER, Mark, F. ,  HANSON, David, A. ,  PETEFISH, William, G.

IPC: H01L23/50 ,  H01L23/64

CPC classification number: H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/66 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00013 ,  H01L2924/01019 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01084 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/113 ,  H05K1/141 ,  H05K1/162 ,  H05K3/0035 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/0112 ,  H05K2201/0209 ,  H05K2201/0355 ,  H05K2201/049 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09672 ,  H05K2201/09718 ,  H05K2201/10734 ,  H05K2203/1383 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/81205

Abstract: An interconnect module for an integrated circuit chip incorporates a thin, high dielectric constant embedded capacitor structure to provide reduced power distribution impedance, and thereby promote higher frequency operation. The interconnect module is capable of reliably attaching an integrated circuit chip to a printed wiring board via solder ball connections, while providing reduced power distribution impedance of less than or equal to approximately 0.60 ohms at operating frequencies in excess of 1.0 gigahertz.

公开(公告)号：EP1692926A1

公开(公告)日：2006-08-23

申请号：EP04805147.8

申请日：2004-12-09

Applicant: Aspocomp Technology Oy

Inventor： MUUKKONEN, Esa

IPC: H05K9/00

CPC classification number: H01L23/552 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0218 ,  H05K1/185 ,  H05K2201/09309 ,  H05K2201/09563 ,  H01L2924/00

Abstract: The invention relates to a method for constructing EMI shielding around a component embedded in a circuit board. According to the method, a recess, which is extended to an insulating layer that represents the ground-reference plane, is formed around the embedding location of the component. The recess is filled or surfaced with an electrically conductive material, in such a way that the material is in electrical contact with the ground-reference plane and that the material essentially surrounds the component in the direction of the circuit board.

公开(公告)号：EP1615485A1

公开(公告)日：2006-01-11

申请号：EP04726017.9

申请日：2004-04-06

Applicant: IBIDEN CO., LTD.

Inventor： KATO, Shinobu, c/o Ibiden Co., Ltd.

IPC: H05K3/46 ,  H01L23/12

CPC classification number: H01L23/50 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19106 ,  H01L2924/3011 ,  H05K1/0263 ,  H05K1/115 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4608 ,  H05K3/4641 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09609 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: In a core substrate 30, a ground through hole 36E and a power through hole 36P are disposed in the grid formation, so that electromotive force induced in X direction and Y direction cancel out each other. As a result, even if mutual inductance is reduced and a high frequency IC chip is loaded, electric characteristic and reliability can be improved without generating malfunction or error.

Abstract translation: 在核心基板30中，以网格形式设置接地通孔36E和电源通孔36P，使得在X方向和Y方向上感应出的电动势彼此抵消。 结果，即使互感减小并且加载了高频IC芯片，也可以改善电特性和可靠性而不产生故障或错误。

公开(公告)号：EP1295516B1

公开(公告)日：2004-08-18

申请号：EP01948427.8

申请日：2001-06-14

Applicant: Sun Microsystems, Inc.

Inventor： NOVAK, Istvan

IPC: H05K1/02

CPC classification number: G06F17/5045 ,  H05K1/0231 ,  H05K3/0005 ,  H05K2201/09309 ,  H05K2201/10446 ,  H05K2201/10636 ,  Y02P70/611

公开(公告)号：EP1130950A3

公开(公告)日：2003-12-17

申请号：EP01104820.4

申请日：2001-02-27

Applicant: Kyocera Corporation

Inventor： Takeshita Yoshihiro c/o KYOCERA CORPORATION ,  Terao Shinya c/o Kyocera corporation ,  Takenouchi Satoruc/o Kyocera corporation ,  KajiMasaki c/o Kyocera corporation ,  Koga, Ryuji

IPC: H05K1/02 ,  H05K1/16 ,  H01L23/498

CPC classification number: H05K1/0234 ,  H01L23/50 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0216 ,  H05K1/0224 ,  H05K1/0298 ,  H05K1/167 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/0969 ,  H05K2201/098 ,  H05K2201/10689 ,  H01L2924/00

Abstract: A wiring board (1) of the present invention readily controls a power source voltage and unwanted irradiation noises developed across a power source layer (5) and a ground layer (6) over a broad range of frequencies with a simple arrangement. The wiring board (1) has an on-board surface (3) on the surface of a dielectric substrate (2), on which a semiconductor device (4) or the like is mounted, and a power source layer (5) and a ground layer (6), which are made of a conductor material principally composed of at least one kind of element selected from Cu, W, and Mo, are provided on the back surface of the dielectric substrate (2) or within the same. The periphery of at least one of low resistance areas (5a, 6a) of the power source layer (5) and ground layer (6), respectively is provided with a corresponding high resistance area (5b or 6b) having a higher sheet resistance than that of the respective low resistance areas (5a, 5b).

Abstract translation: 本发明的布线板（1）以简单的结构容易地控制电源电压和在宽频率范围内在电源层（5）和接地层（6）上产生的不需要的辐射噪声。 布线基板1在电介质基板2的表面上具有载置半导体装置4等的电介质基板2的表面上的电源层5以及电源层5， 在电介质基板（2）的背面或其内部设置由主要由Cu，W，Mo中的至少一种元素构成的导体材料构成的接地层（6）。 电源层（5）和接地层（6）的低电阻区域（5a，6a）中的至少一个的周边分别设置有相应的高电阻区域（5b或6b） 相应低电阻区域（5a，5b）的电阻。