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公开(公告)号：US20160204091A1
公开(公告)日：2016-07-14
申请号：US15075899
申请日：2016-03-21
Applicant: Invensas Corporation
Inventor： Ilyas Mohammed , Masud Beroz , Liang Wang
CPC classification number: H01L25/167 , H01L33/0079 , H01L33/06 , H01L33/22 , H01L33/32 , H01L33/58 , H01L33/60 , H01L33/62 , H01L2924/0002 , H01L2924/00
Abstract: Inverted optical device. In accordance with an embodiment of the present invention, a plurality of piggyback substrates are attached to a carrier wafer. The plurality of piggyback substrates are dissimilar in composition to the carrier wafer. The plurality of piggyback substrates are processed, while attached to the carrier wafer, to produce a plurality of integrated circuit devices. A flip wafer is attached to the plurality of light emitting diodes, away from the carrier wafer and the carrier wafer is removed. The plurality of light emitting diodes may be singulated to form individual light emitting diode devices.
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公开(公告)号：US09583671B2
公开(公告)日：2017-02-28
申请号：US14629487
申请日：2015-02-23
Applicant: Invensas Corporation
Inventor： Liang Wang , Ilyas Mohammed , Masud Beroz
IPC: H01L21/00 , H01L33/00 , H01L33/06 , H01L31/0352 , H01L31/105 , B82Y20/00 , H01L33/32 , H01L33/62 , H01L29/06 , H01L31/00 , H01L33/24 , H01S5/20 , H01S5/34 , H01S5/343 , H01S5/32
CPC classification number: H01L33/0075 , B82Y20/00 , H01L31/035236 , H01L31/105 , H01L33/0025 , H01L33/0066 , H01L33/06 , H01L33/24 , H01L33/32 , H01L33/62 , H01L2933/0033 , H01L2933/0066 , H01S5/2009 , H01S5/3205 , H01S5/3407 , H01S5/34333
Abstract: Improved quantum efficiency of multiple quantum wells. In accordance with an embodiment of the present invention, an article of manufacture includes a p side for supplying holes and an n side for supplying electrons. The article of manufacture also includes a plurality of quantum well periods between the p side and the n side, each of the quantum well periods includes a quantum well layer and a barrier layer, with each of the barrier layers having a barrier height. The plurality of quantum well periods include different barrier heights.
Abstract translation: 提高多量子阱的量子效率。 根据本发明的实施例，制品包括用于供应空穴的p侧和用于提供电子的n侧。 制品还包括在p侧和n侧之间的多个量子阱周期，每个量子阱周期包括量子阱层和阻挡层，其中每个势垒层具有势垒高度。 多个量子阱周期包括不同的屏障高度。
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公开(公告)号：US20190341361A1
公开(公告)日：2019-11-07
申请号：US16514104
申请日：2019-07-17
Applicant: Invensas Corporation
Inventor： Liang Wang , Ilyas Mohammed , Masud Beroz
IPC: H01L23/00 , H01L21/02 , H01L21/683 , H01L23/544 , H01L25/00 , H01L33/00 , H01L27/02
Abstract: High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.
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公开(公告)号：US09947643B2
公开(公告)日：2018-04-17
申请号：US15075899
申请日：2016-03-21
Applicant: Invensas Corporation
Inventor： Ilyas Mohammed , Masud Beroz , Liang Wang
CPC classification number: H01L25/167 , H01L33/0079 , H01L33/06 , H01L33/22 , H01L33/32 , H01L33/58 , H01L33/60 , H01L33/62 , H01L2924/0002 , H01L2924/00
Abstract: Inverted optical device. In accordance with an embodiment of the present invention, a plurality of piggyback substrates are attached to a carrier wafer. The plurality of piggyback substrates are dissimilar in composition to the carrier wafer. The plurality of piggyback substrates are processed, while attached to the carrier wafer, to produce a plurality of integrated circuit devices. A flip wafer is attached to the plurality of light emitting diodes, away from the carrier wafer and the carrier wafer is removed. The plurality of light emitting diodes may be singulated to form individual light emitting diode devices.
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公开(公告)号：US20150228633A1
公开(公告)日：2015-08-13
申请号：US14570570
申请日：2014-12-15
Applicant: Invensas Corporation
Inventor： Ilyas Mohammed , Masud Beroz , Liang Wang
CPC classification number: H01L25/162 , F21K9/23 , F21Y2115/10 , H01L21/6835 , H01L21/78 , H01L24/24 , H01L24/29 , H01L24/32 , H01L24/83 , H01L24/97 , H01L25/167 , H01L33/0079 , H01L33/62 , H01L33/644 , H01L2221/6835 , H01L2224/05567 , H01L2224/05686 , H01L2224/06102 , H01L2224/24105 , H01L2224/24226 , H01L2224/29186 , H01L2224/32225 , H01L2224/73267 , H01L2224/83896 , H01L2224/92244 , H01L2224/94 , H01L2224/97 , H01L2924/00014 , H01L2924/01322 , H01L2924/12041 , H01L2924/12042 , H01L2924/1461 , Y02B20/42 , H01L2924/01031 , H01L2924/0503 , H01L2924/053 , H01L2224/83 , H01L2924/00 , H01L2224/05552
Abstract: Front facing piggyback wafer assembly. In accordance with an embodiment of the present invention, a plurality of piggyback substrates are attached to a carrier wafer. The plurality of piggyback substrates are dissimilar in composition to the carrier wafer. The plurality of piggyback substrates are processed, while attached to the carrier wafer, to produce a plurality of integrated circuit devices. The plurality of integrated circuit devices are singulated to form individual integrated circuit devices. The carrier wafer may be processed to form integrated circuit structures prior to the attaching.
Abstract translation: 前面的背负式晶圆组件。 根据本发明的一个实施例，多个搭载基板被附着在载体晶片上。 多个背负衬底的组成与载体晶片不同。 在附着于载体晶片的同时处理多个搭载基板以产生多个集成电路装置。 多个集成电路器件被单个化以形成单独的集成电路器件。 载体晶片可以在连接之前被处理以形成集成电路结构。
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Patent Agency Ranking
公开(公告)号：US20150132894A1
公开(公告)日：2015-05-14
申请号：US14600595
申请日：2015-01-20
Applicant: Invensas Corporation
Inventor： Ilyas Mohammed , Masud Beroz
IPC: H01L21/48 , H01L21/52 , H01L23/495 , H01L21/768 , H01L23/14
CPC classification number: H01L21/4853 , H01L21/486 , H01L21/52 , H01L21/768 , H01L23/142 , H01L23/49568 , H01L24/97 , H01L2224/16225 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48472 , H01L2224/73265 , H01L2924/01322 , H01L2924/12041 , H01L2924/19107 , H01L2924/00014 , H01L2924/00 , H01L2924/00011
Abstract: Heat spreading substrate with embedded interconnects. In an embodiment in accordance with the present invention, an apparatus includes a metal parallelepiped comprising a plurality of wires inside the metal parallelepiped. The plurality of wires have a different grain structure than the metal parallelepiped. The plurality of wires are electrically isolated from the metal parallelepiped. The plurality of wires may be electrically isolated from one another.
Abstract translation: 具有嵌入式互连的散热基板。 在根据本发明的实施例中，一种装置包括金属平行六面体，其包括金属平行六面体内的多根线。 多根金属线具有与金属平行六面体不同的晶粒结构。 多个导线与金属平行六面体电绝缘。 多个电线可以彼此电隔离。
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公开(公告)号：US10396041B2
公开(公告)日：2019-08-27
申请号：US15449993
申请日：2017-03-05
Applicant: Invensas Corporation
Inventor： Liang Wang , Ilyas Mohammed , Masud Beroz
IPC: H01L23/00 , H01L33/00 , H01L21/683 , H01L25/00 , H01L27/02 , H01L21/02 , H01L23/544
Abstract: High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.
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公开(公告)号：US20150263252A1
公开(公告)日：2015-09-17
申请号：US14727810
申请日：2015-06-01
Applicant: Invensas Corporation
Inventor： Liang Wang , Masud Beroz , Ilyas Mohammed
CPC classification number: H01L33/58 , H01L33/44 , H01L51/5262 , H01L51/5268 , H01L51/5275 , H01L2251/5369 , H01L2933/0083 , H01L2933/0091
Abstract: Optical enhancement of light emitting devices. In accordance with an embodiment of the present invention, an apparatus includes an optical enhancement layer comprising nanoparticles. Each of the nanoparticles includes an electrically conductive core surrounded by an electrically insulating shell. The optical enhancement layer is disposed on a top semiconductor layer in a preferred path of optical emission of a light emitting device. The nanoparticles may enhance the light emission of the light emitting device due to emitter-surface plasmon coupling.
Abstract translation: 发光器件的光学增强。 根据本发明的实施例，一种装置包括包含纳米颗粒的光学增强层。 每个纳米颗粒包括由电绝缘壳包围的导电芯。 光学增强层设置在发光器件的光发射的优选路径中的顶部半导体层上。 纳米颗粒可以由于发射体 - 表面等离子体耦合而增强发光器件的发光。
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公开(公告)号：US20150171027A1
公开(公告)日：2015-06-18
申请号：US14466992
申请日：2014-08-23
Applicant: Invensas Corporation
Inventor： Liang Wang , Ilyas Mohammed , Masud Beroz
CPC classification number: H01L23/562 , H01L21/02002 , H01L21/02035 , H01L21/02378 , H01L21/02381 , H01L21/02389 , H01L21/02392 , H01L21/02395 , H01L21/02414 , H01L21/6835 , H01L23/544 , H01L24/19 , H01L24/32 , H01L24/83 , H01L25/50 , H01L27/0207 , H01L33/005 , H01L33/0062 , H01L2924/12041 , H01L2924/12042 , H01L2924/13091 , H01L2924/351 , H01L2924/00
Abstract: High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.
Abstract translation: 高产量基板组件。 根据第一方法实施例，将多个搭载基板附接到载体基板。 多个搭载基板的边缘彼此接合。 将多个搭载基板从载体基板上移除以形成基板组件。 处理衬底组件以在衬底组件上产生多个集成电路器件。 处理可以使用设计成处理大于多个背负式基板的单独实例的晶片的制造设备。
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公开(公告)号：US10748858B2
公开(公告)日：2020-08-18
申请号：US16514104
申请日：2019-07-17
Applicant: Invensas Corporation
Inventor： Liang Wang , Ilyas Mohammed , Masud Beroz
IPC: H01L23/00 , H01L21/683 , H01L25/00 , H01L33/00 , H01L27/02 , H01L21/02 , H01L23/544
Abstract: High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.
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