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91.发明授权Method for fabricating flip-chip semiconductor package with lead frame as chip carrier 有权制造具有引线框架作为芯片载体的倒装芯片半导体封装的方法公开(公告)号：US07781264B2
公开(公告)日：2010-08-24
申请号：US11891926
申请日：2007-08-14
申请人： Chi-Chuan Wu , Chien-Ping Huang , Han-Ping Pu
发明人： Chi-Chuan Wu , Chien-Ping Huang , Han-Ping Pu
CPC分类号： H01L24/16 , H01L23/4951 , H01L23/49558 , H01L23/49575 , H01L2224/13099 , H01L2224/16245 , H01L2924/01033 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/351 , H01L2924/00
摘要： A flip-ship semiconductor package with a lead frame as a chip carrier is provided, wherein a plurality of leads of the lead frame are each formed with at least a dam member thereon. When a chip is mounted on the lead frame by means of solder bumps, each of the solder bumps is attached to the corresponding one of the leads at a position between the dam member and an inner end of the lead. During a reflow-soldering process for wetting the solder bumps to the leads, the dam members would help control collapse height of the solder bumps, so as to enhance resistance of the solder bumps to thermal stress generated by CTE (coefficient of thermal expansion) mismatch between the chip and the leads, thereby preventing incomplete electrical connection between the chip and the leads.
摘要翻译： 提供一种具有引线框架作为芯片载体的翻转半导体封装，其中引线框架的多个引线至少形成有至少一个阻挡构件。 当通过焊料凸块将芯片安装在引线框架上时，每个焊料凸块在引线的阻挡件和引线的内端之间的位置附接到相应的一个引线。 在用于将焊料凸点润湿到引线的回流焊接过程中，阻挡构件将有助于控制焊料凸块的塌陷高度，从而增强焊料凸块对CTE产生的热应力的阻力（热膨胀系数）不匹配 在芯片和引线之间，从而防止芯片和引线之间的不完全的电连接。
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公开(公告)号：US07608915B2
公开(公告)日：2009-10-27
申请号：US12151902
申请日：2008-05-08
申请人： Chun-Ming Liao , Chien-Ping Huang , Ho-Yi Tsai , Cheng-Hsu Hsiao
发明人： Chun-Ming Liao , Chien-Ping Huang , Ho-Yi Tsai , Cheng-Hsu Hsiao
IPC分类号： H01L23/495 , H01J23/10
CPC分类号： H01L23/4334 , H01L24/73 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/48227 , H01L2224/73253 , H01L2224/73265 , H01L2924/00011 , H01L2924/00014 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/0401
摘要： A heat dissipation semiconductor package includes a chip carrier, a semiconductor chip, a heat conductive adhesive, a heat dissipation member, and an encapsulant. The semiconductor chip is flip-chip mounted on the chip carrier and defined with a heat conductive adhesive mounting area. Periphery of the heat adhesive mounting area is spaced apart from edge of the semiconductor chip. The heat dissipation member is mounted on the heat conductive adhesive formed in the heat conductive adhesive mounting area. The encapsulant formed between the chip carrier and the heat dissipation member encapsulates the semiconductor chip and the heat conductive adhesive, and embeds edges of the active surface and non-active surface and side edge of the semiconductor chip, thereby increasing bonding area between the encapsulant and the semiconductor chip. The side edges of the heat conductive adhesive and the semiconductor chip are not flush with each other, thereby preventing propagation of delamination.
摘要翻译： 散热半导体封装包括芯片载体，半导体芯片，导热粘合剂，散热构件和密封剂。 半导体芯片倒装芯片安装在芯片载体上，并用导热粘合剂安装区域限定。 热粘合剂安装区域的周边与半导体芯片的边缘间隔开。 散热构件安装在形成在导热粘合剂安装区域中的导热粘合剂上。 形成在芯片载体和散热构件之间的密封剂封装半导体芯片和导热粘合剂，并且嵌入半导体芯片的有源表面和非有源表面和侧边缘的边缘，从而增加密封剂和 半导体芯片。 导热粘合剂和半导体芯片的侧边缘彼此不齐平，从而防止分层的蔓延。
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公开(公告)号：US20080303111A1
公开(公告)日：2008-12-11
申请号：US12156901
申请日：2008-06-05
IPC分类号： H01L31/0203 , H01L31/18
CPC分类号： H01L31/0203 , H01L23/24 , H01L31/18 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2224/48091 , H01L2924/00014 , H01L2924/00
摘要： The invention discloses a sensor package and a method for fabricating the same. The sensor package includes: a substrate with an opening; a sensor chip disposed in the opening and electrically connected to the substrate; an encapsulant filling spacing between the sensor chip and the opening so as to secure the sensor chip to the substrate; and a transparent cover attached to the substrate via an adhesive layer, wherein the adhesive layer covers the sensor chip and bonding wires and is formed with an opening for exposing sensor region of the sensor chip. Securing the sensor chip in the opening of the substrate reduces the height of the sensor package, and meanwhile the process cost is reduced by eliminating the need of formation of conductive bumps on the sensor chip or the transparent cover and eliminating the need of specially designed substrate.
摘要翻译： 本发明公开了一种传感器封装及其制造方法。 传感器封装包括：具有开口的基板; 传感器芯片，其布置在所述开口中并电连接到所述基板; 传感器芯片和开口之间的密封剂填充间隔，以将传感器芯片固定到基板上; 以及通过粘合剂层附着到基板的透明盖，其中粘合剂层覆盖传感器芯片和接合线，并且形成有用于暴露传感器芯片的传感器区域的开口。 将传感器芯片固定在基板的开口中，降低传感器封装的高度，同时通过消除在传感器芯片或透明盖上形成导电凸块的需要降低工艺成本，并且不需要特别设计的基板 。
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94.发明授权Semiconductor device for use as multimedia memory card, has encapsulant with chamfer such that portion of substrate and chamfer are exposed from encapsulant and remaining portion of surface of substrate is covered by encapsulant 有权用作多媒体存储卡的半导体装置，具有倒角的封装剂，使得衬底和倒角的部分从密封剂暴露出来，并且衬底表面的剩余部分被密封剂覆盖公开(公告)号：US07443016B2
公开(公告)日：2008-10-28
申请号：US11163309
申请日：2005-10-13
CPC分类号： H01L25/18 , H01L21/565 , H01L23/04 , H01L23/3121 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/97 , H01L25/16 , H01L25/50 , H01L2224/45144 , H01L2224/48091 , H01L2224/49171 , H01L2224/49175 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01033 , H01L2924/01079 , H01L2924/15162 , H01L2924/181 , H01L2924/19105 , H05K3/284 , H05K2201/09127 , H01L2224/85 , H01L2924/00014 , H01L2924/00012
摘要： A semiconductor device and a fabrication method thereof are provided. An opening having at least one slanted side is formed on a substrate. At least one chip and at least one passive component are mounted on the substrate. An encapsulant having a cutaway corner is formed on the substrate to encapsulate the chip and the passive component, wherein the cutaway corner of the encapsulant is spaced apart from the slanted side of the opening by a predetermined distance. A singulation process is performed to cut the encapsulant to form a package with a chamfer. The package is embedded in a lid to form the semiconductor device, wherein a portion of the substrate located between the slanted side of the opening and the cutaway corner of the encapsulant is exposed from the encapsulant to form an exposed portion. The present invention also provides a carrier for the semiconductor device.
摘要翻译： 提供半导体器件及其制造方法。 具有至少一个倾斜侧的开口形成在基板上。 至少一个芯片和至少一个无源部件安装在基板上。 在基板上形成具有切口角的密封剂，以封装芯片和无源部件，其中密封剂的切口角与开口的倾斜侧隔开预定距离。 进行切割处理以切割密封剂以形成具有倒角的包装。 封装被嵌入盖子中以形成半导体器件，其中位于开口的倾斜侧和密封剂的切除角之间的基底的一部分从密封剂暴露出来以形成暴露部分。 本发明还提供了一种用于半导体器件的载体。
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公开(公告)号：US20080258306A1
公开(公告)日：2008-10-23
申请号：US12105538
申请日：2008-04-18
IPC分类号： H01L23/538 , H01L21/56
CPC分类号： H01L23/3114 , H01L21/6835 , H01L23/3135 , H01L23/3185 , H01L24/24 , H01L24/48 , H01L24/82 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2224/02371 , H01L2224/04105 , H01L2224/05001 , H01L2224/05008 , H01L2224/05023 , H01L2224/05026 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05184 , H01L2224/05548 , H01L2224/05569 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05684 , H01L2224/12105 , H01L2224/16145 , H01L2224/48091 , H01L2224/82001 , H01L2224/97 , H01L2225/06562 , H01L2225/1058 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/15311 , H01L2224/82 , H01L2924/01028 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention provides a semiconductor device and a method for fabricating the same. The semiconductor device includes a chip having an active surface and an opposing non-active surface, wherein a plurality of bond pads are formed on the active surface, and first metal layers are formed on the bond pads and to edges of the non-active surface; conductive traces disposed on the non-active surface of the chip; a dielectric layer covering sides of the chip and formed with a plurality of openings therein to expose a portion of the conductive traces; and a plurality of second metal layers formed in the openings of the dielectric layer and on the first metal layers, such that the bond pads are electrically connected to the conductive traces via the first and second metal layers.
摘要翻译： 本发明提供一种半导体器件及其制造方法。 半导体器件包括具有活性表面和相对的非活性表面的芯片，其中在有源表面上形成多个接合焊盘，并且第一金属层形成在接合焊盘和非活性表面的边缘上 ; 布置在芯片的非有源表面上的导电迹线; 介电层，其覆盖所述芯片的侧面并在其中形成有多个开口以暴露所述导电迹线的一部分; 以及多个第二金属层，形成在电介质层的开口中和第一金属层上，使得接合焊盘经由第一和第二金属层电连接到导电迹线。
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公开(公告)号：US20080251937A1
公开(公告)日：2008-10-16
申请号：US12082724
申请日：2008-04-11
CPC分类号： H01L21/76898 , H01L25/0657 , H01L2224/48091 , H01L2225/06513 , H01L2225/06551 , H01L2225/06562 , H01L2924/00014
摘要： A stackable semiconductor device and a manufacturing method thereof are disclosed. The method includes providing a wafer comprised of a plurality of chips, wherein a plurality of solder pads are formed on the active surface of each chip, and a plurality of grooves are formed between the solder pads of any two adjacent ones of the chips; forming a dielectric layer on regions between the solder pads of any two adjacent ones of the chips ; forming a metal layer on the dielectric layer electrically connected to the solder pads and forming a connective layer on the metal layer, wherein the width of the connective layer is smaller than that of the metal layer; cutting along the grooves to break off the electrical connection between adjacent chips; thinning the non-active surface of the wafer to the extent that the metal layer is exposed from the wafer; and separating the chips to form a plurality of stackable semiconductor devices. Accordingly, a multi-chip stack structure can be obtained by stacking and electrically connecting a plurality of semiconductor devices through the electrical connection between the connective layer of a semiconductor device and the metal layer of another semiconductor device, thereby effectively integrating more chips without having to increase the stacking area, and further the problems of poor electrical connection, complicated manufacturing processes and high costs known in the prior art can be avoided.
摘要翻译： 公开了一种可堆叠半导体器件及其制造方法。 该方法包括提供由多个芯片组成的晶片，其中在每个芯片的有源表面上形成多个焊盘，并且在任何两个相邻芯片的焊盘之间形成多个沟槽; 在任何两个相邻芯片的焊盘之间的区域上形成电介质层; 在与所述焊料焊盘电连接的所述电介质层上形成金属层，并在所述金属层上形成连接层，其中所述连接层的宽度小于所述金属层的宽度; 沿着凹槽切割以破坏相邻芯片之间的电连接; 使晶片的非活性表面变薄至金属层从晶片露出的程度; 并分离所述芯片以形成多个可堆叠半导体器件。 因此，通过半导体器件的连接层与另一半导体器件的金属层之间的电连接层叠并电连接多个半导体器件，可以获得多芯片堆叠结构，从而有效地集成更多的芯片，而不必 增加堆积面积，进一步避免了现有技术中已知的电连接不良，制造工艺复杂，成本高的问题。
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公开(公告)号：US20080197438A1
公开(公告)日：2008-08-21
申请号：US12070003
申请日：2008-02-14
IPC分类号： H01L31/0203 , H01L31/18
CPC分类号： H01L31/0203 , H01L21/78 , H01L27/14618 , H01L27/14687 , H01L2224/94
摘要： This invention discloses a sensor semiconductor device and a manufacturing method thereof, including: providing a wafer having a plurality of sensor chips, forming a plurality of grooves between bond pads on active surfaces of the adjacent sensor chips; forming conductive traces in the grooves for electrically connecting the bond pads; mounting a transparent medium on the wafer for covering sensing areas of the sensor chips; thinning the sensor chips from the non-active surfaces down to the grooves, thereby exposing the conductive traces; cutting the wafer to separate the sensor chips; mounting the sensor chips on a substrate module having a plurality of substrates, electrically connecting the conductive traces to the substrates; providing an insulation material on the substrate module and between the sensor chips so as to encapsulate the sensor chips but expose the transparent medium; and cutting the substrate module to separate a plurality of resultant sensor semiconductor devices.
摘要翻译： 本发明公开了一种传感器半导体器件及其制造方法，包括：提供具有多个传感器芯片的晶片，在相邻传感器芯片的有源表面上的接合焊盘之间形成多个沟槽; 在沟槽中形成导电迹线以电连接接合焊盘; 在所述晶片上安装透明介质以覆盖所述传感器芯片的感测区域; 将传感器芯片从非活性表面减薄到凹槽，从而暴露导电迹线; 切割晶片以分离传感器芯片; 将传感器芯片安装在具有多个基板的基板模块上，将导电迹线电连接到基板; 在衬底模块上和传感器芯片之间提供绝缘材料，以封装传感器芯片，但暴露透明介质; 以及切割所述基板模块以分离多个所得传感器半导体器件。
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公开(公告)号：US20080185726A1
公开(公告)日：2008-08-07
申请号：US12011906
申请日：2008-01-30
申请人： Yu-Po Wang , Chien-Ping Huang , Wei-Chun Lin , Wen Cheng Lee
发明人： Yu-Po Wang , Chien-Ping Huang , Wei-Chun Lin , Wen Cheng Lee
IPC分类号： H01L23/49
CPC分类号： H01L23/49838 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/48227 , H01L2224/49171 , H01L2224/49433 , H01L2924/00014 , H01L2924/01015 , H01L2924/01033 , H01L2924/01082 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： A semiconductor package substrate proposed by the invention includes a base body and a plurality of finger pads disposed on surface of the base body, wherein the finger pads are arranged in such a way that an angle is formed between connecting line of centers of two adjacent finger pads and the direction in which the finger pads are arranged. The finger pads are waterdrop shaped finger pads with arc ends and angle ends alternately disposed on surface of the substrate, alternately disposed waterdrop shaped finger pads and arc shaped finger pads, or alternately disposed arc shaped finger pads at a predetermined spacing. According to the present invention, distance between adjacent finger pads is reduced and problem of short circuit as a result of erroneous contact between bonding wire and adjacent finger pad is prevented.
摘要翻译： 本发明提出的半导体封装基板包括基体和设置在基体表面上的多个指垫，其中指垫以这样一种方式布置，使得两个相邻手指的中心的连接线之间形成一角度 垫和指垫的排列方向。 手指垫是具有弧端的水滴状指垫，并且角度端交替地设置在基板的表面上，交替地设置水滴形指状垫和弧形指状垫，或者以预定间隔交替布置的圆弧形指垫。 根据本发明，相邻指垫之间的距离减小，并且防止了接合线和相邻指垫之间的错误接触的结果导致的短路问题。
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公开(公告)号：US20080185671A1
公开(公告)日：2008-08-07
申请号：US12011933
申请日：2008-01-30
CPC分类号： H01L27/14618 , H01L27/14632 , H01L27/14687 , H01L31/0203 , H01L2224/05147 , H01L2224/05166 , H01L2224/05548 , H01L2224/05573 , H01L2224/0558 , H01L2224/05655 , H01L2224/13 , H01L2924/00014
摘要： A sensor semiconductor package and a fabrication method thereof are provided in the present application. The fabrication method comprises steps of: forming a plurality of grooves on a wafer between bond pads on active surfaces of every adjacent chips; forming metal layers in the grooves for electrically connecting with the bond pads of adjacent chips; thinning the non-active surfaces to expose the metal layers therefrom; forming a cover layer on the non-active surfaces with the metal layers are exposed therefrom; forming a solder resist layer on the covering layer and the conductive wirings with terminals of the conductive wirings are exposed therefrom; and cutting along cutting paths between every sensor chips to form a plurality of sensor semiconductor packages. Accordingly, the prior art problems such as misalignment of forming beveled grooves, concentrated stress and breakage can be solved.
摘要翻译： 在本申请中提供了一种传感器半导体封装及其制造方法。 该制造方法包括以下步骤：在每个相邻芯片的有源表面上的接合焊盘之间的晶片上形成多个凹槽; 在所述凹槽中形成用于与相邻芯片的接合焊盘电连接的金属层; 使非活性表面变薄从而使金属层露出; 在金属层的非活性表面上形成覆盖层从其露出; 在覆盖层上形成阻焊层，并且导电布线与导电配线的端子相接触; 并且沿着每个传感器芯片之间的切割路径切割以形成多个传感器半导体封装。 因此，可以解决现有技术的问题，例如形成斜槽的未对准，集中应力和断裂。
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100.发明申请公开(公告)号：US20080122071A1
公开(公告)日：2008-05-29
申请号：US11986362
申请日：2007-11-21
IPC分类号： H01L23/373
CPC分类号： H01L23/3128 , H01L21/568 , H01L23/4334 , H01L2224/16225 , H01L2224/16227 , H01L2224/32245 , H01L2224/73253 , H01L2924/15311
摘要： A heat dissipating semiconductor package and the fabrication method therefor are provided. The fabrication method for the heat dissipating semiconductor package mainly includes steps of: containing a substrate having a chip mounted thereon in an aperture of a carrier, wherein the carrier has an electroconductive layer; allowing a heat dissipating structure having supporting portions to be mounted on and electrically connected to the electroconductive layer of the carrier via the supporting portions thereof while heat dissipating structure being mounted on the chip; after an encapsulation process and removing a part of the encapsulant above the heat dissipating sheet by lapping to expose a surface of the heat dissipating structure from the encapsulant, depositing and forming a metal passivation layer on the surface of the heat dissipating structure by electroplating for preventing the heat dissipating structure from oxidizing.
摘要翻译： 提供一种散热半导体封装及其制造方法。 用于散热半导体封装的制造方法主要包括以下步骤：在载体的孔中容纳其上安装有芯片的基板，其中载体具有导电层; 允许散热结构，其具有支撑部分，其安装在载体的导电层上并通过其支撑部分电连接，同时散热结构安装在芯片上; 在封装工艺之后并且通过研磨去除散热片上方的一部分密封剂，以从密封剂暴露出散热结构的表面，在散热结构的表面上沉积和形成金属钝化层，通过电镀防止 散热结构从氧化。
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