公开(公告)号：US20140275440A1

公开(公告)日：2014-09-18

申请号：US13845279

申请日：2013-03-18

Applicant: UNIMICRON TECHNOLOGY CORP.

Inventor： HAN-PEI HUANG

IPC: C08G73/10 ,  C07C213/00 ,  C07C217/90

CPC classification number: C07C213/02 ,  C07C205/38 ,  C07C213/00 ,  C07C217/90 ,  C07C2603/74 ,  C08G73/1046 ,  C08G73/105 ,  C08G73/1071

Abstract: A diamine monomer having a large side chain R is provided. The large side chain would interrupt the symmetry and regularity of diamine monomer. The diamine monomer has the general formula shown as formula (V) below: The functional group R includes α-substitution cycloalkene with at least a tertiary carbon atom, cycloalkene with at least a tertiary carbon atom, cycloalkane with at least a tertiary carbon atom, α-substitution phenyl, phenyl, α-substitution naphthalyl, naphthalyl, α-substitution phenanthrenyl, phenanthrenyl, α-substitution anthracenyl, anthracenyl, α-substitution adamantyl, adamantyl, α-substitution diamantyl and diamantyl.

Abstract translation: 提供具有大侧链R的二胺单体。 大侧链会破坏二胺单体的对称性和规则性。 二胺单体具有如下式（V）所示的通式：官能团R包括至少具有叔碳原子的α-取代环烯烃，至少具有叔碳原子的环烯烃，至少具有叔碳原子的环烷烃， α-取代苯基，苯基，α-取代萘基，萘基，α-取代菲基，菲基，α-取代蒽基，蒽基，α-取代金刚烷基，金刚烷基，α-取代二硬脂基和二金刚烷基。

公开(公告)号：US20140174791A1

公开(公告)日：2014-06-26

申请号：US13726659

申请日：2012-12-26

Applicant: UNIMICRON TECHNOLOGY CORP.

Inventor： Cheng-Po Yu ,  Han-Pei Huang ,  Shang-Feng Huang

IPC: H05K3/06 ,  H05K1/02

CPC classification number: H05K3/465 ,  H05K3/06 ,  H05K3/108 ,  H05K2203/0723

Abstract: A circuit board and a manufacturing method thereof are provided. A dielectric layer is formed on a substrate, wherein an internal circuit layer is formed on the substrate and the dielectric layer covers the internal circuit layer. A first trench, a second trench and an opening are formed in the dielectric layer. The opening is located below the first trench and connected with the first trench, and a portion of the internal circuit layer is exposed by the opening. A patterned conductive layer is formed on the dielectric layer. The patterned conductive layer covers a portion of the dielectric layer and fills the first trench, the second trench and the opening so as to form a first circuit layer, a second circuit layer and a conductive through via, respectively, wherein the conductive through via is electrically connected with the first circuit layer and the internal circuit layer.

Abstract translation: 提供一种电路板及其制造方法。 在基板上形成电介质层，在基板上形成内部电路层，电介质层覆盖内部电路层。 在电介质层中形成第一沟槽，第二沟槽和开口。 开口位于第一沟槽的下方并与第一沟槽连接，内部电路层的一部分被开口露出。 在电介质层上形成有图案的导电层。 图案化的导电层覆盖电介质层的一部分并且填充第一沟槽，第二沟槽和开口，以分别形成第一电路层，第二电路层和导电通孔，其中导电通孔是 与第一电路层和内部电路层电连接。

公开(公告)号：US20140151107A1

公开(公告)日：2014-06-05

申请号：US13845325

申请日：2013-03-18

Applicant: UNIMICRON TECHNOLOGY CORP.

Inventor： CHENG-MING WENG ,  WEI-MING CHENG ,  HAN-PEI HUANG

IPC: H05K1/11 ,  H05K3/42

CPC classification number: H05K1/115 ,  H05K3/0032 ,  H05K3/42 ,  H05K3/426 ,  H05K2201/09563 ,  H05K2201/09709 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2203/1476 ,  H05K2203/1572 ,  Y10T29/49165

Abstract: A wiring board includes a substrate, a first conductor layer, a second conductor layer, and a through-via conductor. The substrate has a first surface, a second surface, and at least one through-via. The first conductor layer is formed on the first surface, and the second conductor layer is formed on the second surface. The through-via conductor is formed in the through-via for electrically connecting to the first conductor layer and the second conductor layer. The through-via has a first depressed portion exposed in the first surface, a second depressed portion exposed in the second surface, and a tunnel portion between the first depressed portion and the second depressed portion for connecting the first depressed portion and the second depressed portion. The first depressed portion and the second depressed, portion are non-coaxial.

Abstract translation: 布线基板包括基板，第一导体层，第二导体层和通孔导体。 衬底具有第一表面，第二表面和至少一个通孔。 第一导体层形成在第一表面上，第二导体层形成在第二表面上。 通孔导体形成在用于电连接到第一导体层和第二导体层的通孔中。 通孔具有暴露在第一表面中的第一凹陷部分，暴露在第二表面中的第二凹部，以及在第一凹陷部分和第二凹陷部分之间的用于连接第一凹陷部分和第二凹陷部分的隧道部分 。 第一凹陷部分和第二凹陷部分是非同轴的。

公开(公告)号：US20140151099A1

公开(公告)日：2014-06-05

申请号：US13845339

申请日：2013-03-18

Applicant: UNIMICRON TECHNOLOGY CORP.

Inventor： CHENG MING WENG ,  WEI-MING CHENG ,  HAN-PEI HUANG

IPC: H05K1/11 ,  H05K3/46

CPC classification number: H05K1/115 ,  H05K1/0366 ,  H05K3/0035 ,  H05K2201/09827

Abstract: A laser drilling method of a wiring board is provided. In the method, a laser beam shines on a wiring substrate including an insulating layer to remove a portion of the insulating layer. The wiring substrate is placed in a focus section of the laser beam. The focus section contains a central region, an optical axis located in the central region, and a peripheral region surrounding the central region. The maximum light intensity of the focus section is located in the peripheral region.

Abstract translation: 提供一种布线板的激光钻孔方法。 在该方法中，激光束照射在包括绝缘层的布线基板上，以去除绝缘层的一部分。 布线基板被放置在激光束的聚焦部分中。 焦点部分包含中心区域，位于中心区域的光轴以及围绕中心区域的周边区域。 焦点部分的最大光强度位于周边区域。

公开(公告)号：US08736033B1

公开(公告)日：2014-05-27

申请号：US13798116

申请日：2013-03-13

Applicant: Unimicron Technology Corp.

Inventor： Yu-Chen Chuo ,  Wei-Ming Cheng

IPC: H01L23/60

CPC classification number: H01L24/19 ,  H01L23/552 ,  H01L2224/04105 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/0715

Abstract: An embedded-electronic-device package includes a core layer, an electronic device, a first dielectric layer, a second dielectric layer, a shielding-metal layer and conductive vias. The core layer includes a first surface, a second surface opposite to the second surface and a cavity penetrating the core layer. The electronic device is disposed in the cavity including an inner surface. The first dielectric layer disposed on the first surface is filled in part of the cavity and covers part of the electronic device. The second dielectric layer disposed on the second surface is filled in rest of the cavity, covers rest of the electronic device. The first and second dielectric layers cover the electronic device. The shielding-metal layer covers the inner surface. The conductive vias are respectively disposed in the first and second dielectric layers and extended respectively from outer surfaces of the first and second dielectric layers to the shielding-metal layer.

Abstract translation: 嵌入式电子器件封装包括芯层，电子器件，第一介电层，第二介电层，屏蔽金属层和导电通孔。 芯层包括第一表面，与第二表面相对的第二表面和穿透核心层的空腔。 电子设备设置在包括内表面的空腔中。 布置在第一表面上的第一介电层填充在空腔的一部分中并覆盖电子设备的一部分。 设置在第二表面上的第二介电层填充在空腔的其余部分中，覆盖电子设备的其余部分。 第一和第二电介质层覆盖电子器件。 屏蔽金属层覆盖内表面。 导电通孔分别设置在第一和第二电介质层中，分别从第一和第二电介质层的外表面延伸到屏蔽金属层。

公开(公告)号：US08709940B2

公开(公告)日：2014-04-29

申请号：US13046441

申请日：2011-03-11

Applicant: Shing-Ru Wang ,  Hsien-Shou Wang ,  Shih-Ping Hsu

Inventor： Shing-Ru Wang ,  Hsien-Shou Wang ,  Shih-Ping Hsu

IPC: H01L21/4763

CPC classification number: H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/92244 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517

Abstract: A circuit board structure and a method for fabricating the same are proposed. The structure includes an insulating protective layer having a plurality of openings in which conductive vias are formed, a patterned circuit layer formed on the surface of the insulating protective layer and electrically connected to the conductive vias in the openings of the insulating protective layer, and a dielectric layer formed on the insulating protective layer and on the surface of the patterned circuit layer, wherein a plurality of openings are formed in the dielectric layer to thereby expose parts of the patterned circuit layer. Accordingly, the present invention reduces the thickness of a circuit board, which reduces package size, improves product performance, and conforms to the developmental trend toward smaller electronic devices.

Abstract translation: 提出了一种电路板结构及其制造方法。 该结构包括具有多个开口的绝缘保护层，其中形成导电通孔;形成在绝缘保护层的表面上并电连接到绝缘保护层的开口中的导电通孔的图案化电路层，以及 电介质层，其形成在绝缘保护层上和图案化电路层的表面上，其中在电介质层中形成多个开口，从而露出图案化电路层的部分。 因此，本发明可以减小电路板的厚度，减小封装尺寸，提高产品性能，并符合朝向较小型电子器件的发展趋势。

公开(公告)号：US08590147B2

公开(公告)日：2013-11-26

申请号：US12652226

申请日：2010-01-05

Applicant: Shao-Chien Lee ,  Chih-Ming Chang

Inventor： Shao-Chien Lee ,  Chih-Ming Chang

IPC: H01K3/10

CPC classification number: H01K3/10 ,  H01L21/4853 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/5384 ,  H01L2924/0002 ,  H05K1/113 ,  H05K3/06 ,  H05K3/3457 ,  H05K3/423 ,  H05K3/4647 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09827 ,  H05K2203/0733 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A method of fabricating a circuit board structure with concave conductive cylinders is provided. Firstly, a conductive layer is provided and a dielectric layer is formed on a surface of the conductive layer. Next, a plurality of vias is formed in the dielectric layer, where the vias are exposed on the surface of the conductive layer. A conductive material is then filled in the vias to form a plurality of conductive cylinders on the surface of the conductive layer, so that the tips of the conductive cylinders are exposed on a surface of the dielectric layer relatively far away from the conductive layer. The exposed tips of the conductive cylinders are removed, so that the height of the conductive cylinders is lower than the dielectric layer and the conductive cylinders sunk into the dielectric layer.

Abstract translation: 提供一种制造具有凹形导电圆柱体的电路板结构的方法。 首先，提供导电层，并且在导电层的表面上形成电介质层。 接下来，在电介质层中形成多个通孔，其中通孔暴露在导电层的表面上。 然后将导电材料填充在通孔中以在导电层的表面上形成多个导电圆柱体，使得导电圆柱体的尖端暴露在相对远离导电层的电介质层的表面上。 去除导电圆柱体的暴露的尖端，使得导电圆柱体的高度低于电介质层，并且导电圆柱体沉入介电层。

公开(公告)号：US20130212877A1

公开(公告)日：2013-08-22

申请号：US13846871

申请日：2013-03-18

Applicant: Unimicron Technology Corp.

Inventor： Chen-Chuan Chang

IPC: H05K3/00

CPC classification number: H05K3/007 ,  H05K1/183 ,  H05K3/0035 ,  H05K3/06 ,  H05K3/062 ,  H05K3/108 ,  H05K3/428 ,  H05K3/4697 ,  H05K2201/09036 ,  H05K2201/09127 ,  H05K2201/09781 ,  H05K2203/0554 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A manufacturing method of a circuit board is provided. Providing a substrate, where a first laser resistant structure is disposed on a first dielectric layer and at the periphery of a pre-removing area, a second dielectric layer covers the first laser resistant structure, a circuit layer is disposed on the second dielectric layer, a second laser resistant structure is disposed on the second dielectric layer and at the periphery of the pre-removing area, a third dielectric layer covers the circuit layer and the second laser resistant structure. There are gaps between the second laser resistant structure and the circuit layer, and the vertical projection of the gaps on the first dielectric layer overlaps the first laser resistant structure. A laser machining process is performed to etch the third dielectric layer at the periphery of the pre-removing area. The portion of the third dielectric layer within the pre-removing area is removed.

Abstract translation: 提供电路板的制造方法。 提供一种基板，其中第一耐光结构设置在第一电介质层上并在预除去区域的周围，第二介电层覆盖第一耐光结构，电路层设置在第二介电层上， 第二激光结构被设置在第二介质层上，并且在预除去区域的周围，第三介电层覆盖电路层和第二激光结构。 第二激光电阻结构和电路层之间存在间隙，并且第一电介质层上的间隙的垂直投影与第一耐磨结构重叠。 执行激光加工处理以在预除去区域的周边蚀刻第三介电层。 除去去除区域内的第三电介质层的部分。

公开(公告)号：US08436254B2

公开(公告)日：2013-05-07

申请号：US13301812

申请日：2011-11-22

Applicant: Cheng-Po Yu ,  Han-Pei Huang

Inventor： Cheng-Po Yu ,  Han-Pei Huang

IPC: H05K1/00

CPC classification number: H05K1/11 ,  H05K1/0284 ,  H05K1/142 ,  H05K3/185 ,  H05K3/4007 ,  H05K3/4661 ,  H05K2201/0236 ,  H05K2201/09045 ,  H05K2201/09118 ,  H05K2201/09163 ,  H05K2201/09436 ,  H05K2201/09509 ,  H05K2201/09845 ,  H05K2203/1327 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T428/24802 ,  Y10T428/24917

Abstract: A method of fabrication a circuit board structure comprising providing a circuit board main body, forming a molded, irregular plastic body having a non-plate type, stereo structure and at least one scraggy surface by encapsulating at least a portion of said circuit board main body with injection molded material, and forming a first three-dimensional circuit pattern on said molded, irregular plastic body thereby defining a three-dimensional circuit device.

Abstract translation: 一种制造电路板结构的方法，包括提供电路板主体，通过封装所述电路板主体的至少一部分来形成具有非板型，立体结构和至少一个刮痕表面的模制的不规则塑料体 并且在所述模制的不规则塑料体上形成第一三维电路图案，从而限定三维电路装置。

公开(公告)号：US20130040071A1

公开(公告)日：2013-02-14

申请号：US13653423

申请日：2012-10-17

Applicant: UNIMICRON TECHNOLOGY CORP.

Inventor： Cheng-Po Yu ,  Chi-Min Chang ,  Wei-Ming Cheng

IPC: B05D5/00 ,  B05D3/06

CPC classification number: H05K3/185 ,  H05K3/0032 ,  H05K3/107 ,  H05K3/465 ,  H05K3/4661 ,  H05K2201/0236

Abstract: A method for fabricating a circuit board is provided. A non-conductive material layer is provided on a core substrate, wherein the non-conductive material layer comprises a dielectric material and catalytic particles. A recessed circuit structure is then formed in the non-conductive material layer with a laser beam. Simultaneously, the catalytic particles in the recessed circuit structure are activated with aid of the laser. A buried conductive structure is then formed in the recessed circuit structure by chemical copper deposition methods.

Abstract translation: 提供一种制造电路板的方法。 非导电材料层设置在芯基板上，其中非导电材料层包括电介质材料和催化颗粒。 然后在非导电材料层中用激光束形成凹陷的电路结构。 同时，凹陷电路结构中的催化颗粒借助于激光器被激活。 然后通过化学铜沉积方法在凹陷电路结构中形成掩埋导电结构。