公开(公告)号：US09425193B2

公开(公告)日：2016-08-23

申请号：US14129630

申请日：2012-06-22

申请人： Richard Price ,  Scott White

发明人： Richard Price ,  Scott White

IPC分类号： H01L21/12 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L21/768 ,  H01L27/088 ,  H01L21/027

CPC分类号： H01L27/088 ,  G03F7/0002 ,  H01L21/0272 ,  H01L21/28008 ,  H01L21/283 ,  H01L21/31144 ,  H01L21/76895 ,  H01L21/823437 ,  H01L21/823475 ,  H01L23/528 ,  H01L27/11803 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1288 ,  H01L27/1292 ,  H01L29/66757 ,  H01L29/66969 ,  H01L29/78666 ,  H01L29/78675 ,  H01L29/7869 ,  H01L51/0541

摘要： A method of manufacturing a transistor comprising: providing a substrate, a region of semiconductive material supported by the substrate, and a region of electrically conductive material supported by the region of semiconductive material; forming at least one layer of resist material over said regions to form a covering of resist material over said regions; forming a depression in a surface of the covering of resist material, said depression extending over a first portion of said region of conductive material, said first portion separating a second portion of the conductive region from a third portion of the conductive region; removing resist material located under said depression so as to form a window, through said covering, exposing said first portion of the electrically conductive region; removing said first portion to expose a connecting portion of the region of semiconductive material, said connecting portion connecting the second portion to the third portion of the conductive region; forming a layer of dielectric material over the exposed portion of the region of semiconductive material; and depositing electrically conductive material to form a layer of electrically conductive material over said layer of dielectric material, the layer of dielectric material electrically isolating the layer of electrically conductive material from the second and third portions of the conductive region.

摘要翻译： 一种制造晶体管的方法，包括：提供衬底，由衬底支撑的半导体材料的区域和由半导体材料区域支撑的导电材料区域; 在所述区域上形成至少一层抗蚀剂材料，以在所述区域上形成抗蚀剂材料的覆盖层; 在抗蚀剂材料的覆盖物的表面上形成凹陷，所述凹陷在所述导电材料区域的第一部分上延伸，所述第一部分将导电区域的第二部分与导电区域的第三部分分开; 去除位于所述凹陷下方的抗蚀剂材料，以形成通过所述覆盖物的窗口，暴露所述导电区域的所述第一部分; 去除所述第一部分以暴露所述半导体材料区域的连接部分，所述连接部分将所述第二部分连接到所述导电区域的第三部分; 在半导体材料的区域的暴露部分上形成介电材料层; 以及沉积导电材料以在所述介电材料层上形成导电材料层，所述介电材料层将所述导电材料层与所述导电区域的第二和第三部分电隔离。

公开(公告)号：US09040382B2

公开(公告)日：2015-05-26

申请号：US14319037

申请日：2014-06-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jing-Cheng Lin ,  Chen-Hua Yu

IPC分类号： H01L21/12 ,  H01L21/02 ,  H01L21/762 ,  H01L29/165 ,  H01L29/267

CPC分类号： H01L21/02494 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02455 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/02587 ,  H01L21/02639 ,  H01L21/76224 ,  H01L29/165 ,  H01L29/267

摘要： A semiconductor device includes a substrate formed of a first semiconductor material; two insulators on the substrate; and a semiconductor region having a portion between the two insulators and over the substrate. The semiconductor region has a bottom surface contacting the substrate and having sloped sidewalls. The semiconductor region is formed of a second semiconductor material different from the first semiconductor material.

摘要翻译： 半导体器件包括由第一半导体材料形成的衬底; 基板上有两个绝缘子; 以及半导体区域，其具有在所述两个绝缘体之间并且在所述衬底上的部分。 半导体区域具有与衬底接触并具有倾斜侧壁的底表面。 半导体区域由与第一半导体材料不同的第二半导体材料形成。

公开(公告)号：US08987072B2

公开(公告)日：2015-03-24

申请号：US14260101

申请日：2014-04-23

申请人： EverDisplay Optronics (Shanghai) Limited

发明人： Li Tan ,  ChihMing Lin ,  HsinAn Lin

IPC分类号： H01L21/12 ,  H01L27/12 ,  H01L29/66

CPC分类号： H01L27/127 ,  H01L27/1203 ,  H01L27/1214 ,  H01L27/1288 ,  H01L29/66795

摘要： The present disclosure discloses a method of manufacturing the LTPS array substrate, comprising: depositing a polysilicon layer and an amorphous silicon layer on the substrate successively and crystallizing the amorphous silicon layer to form the polysilicon layer by laser annealing; coating a photoresist layer covering the PMOS area, NMOS area and TFT area of the polysilicon layer; forming a polysilicon pattern and a channel by dry etching the polysilicon layer, then removing the regions of the photoresist layer which are thinner and covering the NMOS area and the TFT area by ashing, the region of the photoresist layer covering the PMOS area is remained. The present disclosure saves the cost of the equipment, improves the yield, reduces the design defect and the process difficulty of the conventional process using 8 photomasks.

摘要翻译： 本公开公开了一种制造LTPS阵列基板的方法，包括：在基板上依次沉积多晶硅层和非晶硅层，并通过激光退火使非晶硅层结晶以形成多晶硅层; 涂覆覆盖PMOS区域的光致抗蚀剂层，多晶硅层的NMOS区域和TFT区域; 通过干蚀刻多晶硅层形成多晶硅图案和沟道，然后通过灰化除去较薄的并覆盖NMOS区域和TFT区域的光致抗蚀剂层的区域，保留覆盖PMOS区域的光致抗蚀剂层的区域。 本发明使用8个光掩模来节省设备的成本，提高产量，减少设计缺陷和使用8个光掩模的常规工艺的工艺难度。

公开(公告)号：US08963167B2

公开(公告)日：2015-02-24

申请号：US14165492

申请日：2014-01-27

申请人： NeoKismet, LLC

发明人： Jawahar M. Gidwani ,  Anthony C. Zuppero

IPC分类号： H01L21/00 ,  H01L21/12 ,  H01L21/26 ,  H02N11/00 ,  H01L29/66 ,  H02S10/00 ,  H02N2/18

CPC分类号： H02N11/002 ,  H01L29/66 ,  H02N2/18 ,  H02S99/00 ,  Y10S136/291

摘要： An improved diode energy converter for chemical kinetic electron energy transfer is formed using nanostructures and includes identifiable regions associated with chemical reactions isolated chemically from other regions in the converter, a region associated with an area that forms energy barriers of the desired height, a region associated with tailoring the boundary between semiconductor material and metal materials so that the junction does not tear apart, and a region associated with removing heat from the semiconductor.

摘要翻译： 使用纳米结构形成用于化学动力学电子能量转移的改进的二极管能量转换器，并且包括与转化器中其他区域化学分离的化学反应相关联的可识别区域，与形成期望高度的能量屏障的区域相关联的区域， 可以调整半导体材料和金属材料之间的边界，使得结不会被撕裂，而与从半导体去除热量有关的区域。

公开(公告)号：US08890176B2

公开(公告)日：2014-11-18

申请号：US14169581

申请日：2014-01-31

申请人： LG Innotek Co., Ltd.

发明人： Sung Min Kong ,  Choong Youl Kim ,  Hee Seok Choi

IPC分类号： H01L27/15 ,  H01L29/267 ,  H01L21/12 ,  H01L33/00 ,  H01L33/62 ,  H01L33/60 ,  H01L33/32 ,  H01L33/48

CPC分类号： H01L33/60 ,  H01L33/30 ,  H01L33/32 ,  H01L33/486 ,  H01L33/54 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014

摘要： Disclosed is an LED package. The LED package includes a package body, a first frame and a second frame on the package body and a light emitting device chip on the first frame. The first frame is separated from the second frame, and the first frame includes a bottom frame on the package body and at least two sidewall frames extending from the bottom frame and inclined with respect to the bottom frame.

公开(公告)号：US08859332B2

公开(公告)日：2014-10-14

申请号：US13884495

申请日：2011-10-26

申请人： Juergen Steiger ,  Duy Vu Pham ,  Heiko Thiem ,  Alexey Merkulov ,  Arne Hoppe

发明人： Juergen Steiger ,  Duy Vu Pham ,  Heiko Thiem ,  Alexey Merkulov ,  Arne Hoppe

IPC分类号： H01L21/16 ,  H01L29/10 ,  H01L21/12 ,  B05D5/12 ,  H01L21/288 ,  H01L29/22 ,  C23C18/12 ,  H01L21/02 ,  H01L29/43

CPC分类号： H01L21/02628 ,  C23C18/1216 ,  H01L21/288 ,  H01L29/22 ,  H01L29/43

摘要： The present invention relates to a liquid phase process for producing indium oxide-containing layers, in which a coating composition preparable from a mixture comprising at least one indium oxide precursor and at least one solvent and/or dispersion medium, in the sequence of points a) to d), a) is applied to a substrate, and b) the composition applied to the substrate is irradiated with electromagnetic radiation, c) optionally dried and d) converted thermally into an indium oxide-containing layer, where the indium oxide precursor is an indium halogen alkoxide of the generic formula InX(OR)2 where R is an alkyl radical and/or alkoxyalkyl radical and X is F, Cl, Br or I and the irradiation is carried out with electromagnetic radiation having significant fractions of radiation in the range of 170-210 nm and of 250-258 nm, to the indium oxide-containing layers producible with the process, and the use thereof.

摘要翻译： 本发明涉及一种用于生产含氧化铟的层的液相方法，其中可以从包含至少一种氧化铟前体和至少一种溶剂和/或分散介质的混合物制备的涂料组合物以点a ）至d），a）施加到基底上，b）用电磁辐射照射施加到基底上的组合物，c）任选干燥，d）热转换成含氧化铟的层，其中氧化铟前体 是通式为InX（OR）2的卤素烷氧化物，其中R是烷基和/或烷氧基烷基，X是F，Cl，Br或I，并且用具有显着部分辐射的电磁辐射进行照射 170-210nm和250-258nm的范围，与该方法可生产的含氧化铟的层及其用途。

公开(公告)号：US08377763B2

公开(公告)日：2013-02-19

申请号：US12960593

申请日：2010-12-06

申请人： Narasimhulu Kanike

发明人： Narasimhulu Kanike

IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L27/01 ,  H01L21/12 ,  H01L31/0392

CPC分类号： H01L27/0629 ,  H01L28/20

摘要： A method is provided for fabricating a microelectronic device and a resistor on a substrate. The method can include forming device regions in a monocrystalline semiconductor region of a substrate, in which the device regions have edges defined according to a first semiconductor feature overlying a major surface of the semiconductor region. A dielectric region is formed having a planarized surface overlying the semiconductor region and overlying a second semiconductor feature disposed above a surface of an isolation region in the substrate. The surface of the isolation region can be disposed below the major surface. The method can further include removing at least a portion of the first semiconductor feature exposed at the planarized surface of the dielectric region to form an opening and forming a gate at least partially within the opening. Thereafter, further processing can include forming electrically conductive contacts extending through apertures in the dielectric region to the second semiconductor feature and the device regions, respectively. The step of forming electrically conductive contacts may include forming silicide regions contacting portions of the second semiconductor feature and the device regions, respectively. In such way, the method can define a resistor having a current path through the second semiconductor feature, and a microelectronic device including the gate and the device regions.

摘要翻译： 提供了一种在衬底上制造微电子器件和电阻器的方法。 该方法可以包括在衬底的单晶半导体区域中形成器件区域，其中器件区域具有根据覆盖半导体区域的主表面的第一半导体特征限定的边缘。 形成具有覆盖在半导体区域上的平坦化表面并覆盖设置在衬底中的隔离区域的表面上方的第二半导体特征的电介质区域。 隔离区域的表面可以设置在主表面的下方。 该方法还可以包括去除暴露在电介质区域的平坦化表面处的第一半导体特征的至少一部分以形成开口并且至少部分地在开口内形成栅极。 此后，进一步的处理可以包括分别形成延伸穿过介质区域中的孔的导电触头到第二半导体特征和器件区域。 形成导电触点的步骤可以包括分别形成接触第二半导体特征部分和器件区域的硅化物区域。 以这种方式，该方法可以限定具有穿过第二半导体特征的电流路径的电阻器，以及包括栅极和器件区域的微电子器件。

公开(公告)号：US08338912B2

公开(公告)日：2012-12-25

申请号：US12482022

申请日：2009-06-10

申请人： Shuichi Oka ,  Katsuji Matsumoto ,  Shusaku Yanagawa

发明人： Shuichi Oka ,  Katsuji Matsumoto ,  Shusaku Yanagawa

IPC分类号： H01F27/06 ,  H01F27/30 ,  H01L21/12

CPC分类号： H01L23/645 ,  H01L23/552 ,  H01L24/45 ,  H01L24/48 ,  H01L25/16 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2924/00011

摘要： Disclosed herein is an inductor module including a substrate functioning as a printed wiring board or an interposer; an IC mounting part formed on a surface of the substrate; an inductor which is formed in the substrate at such a position as to overlap with the IC mounting part on a plan-view basis and which is connected to an IC mounted on the IC mounting part; and a magnetic body including a magnetic material selected from among a NiZn ferrite, a NiZnCu ferrite and a Ba ferrite, the magnetic body being disposed intermediately between the IC mounting part and the inductor.

摘要翻译： 这里公开了一种电感器模块，其包括用作印刷线路板或插入件的基板; 形成在所述基板的表面上的IC安装部; 电感器，其形成在基板上，在与IC安装部重叠的位置上，并且与安装在IC安装部上的IC连接， 以及包括选自NiZn铁氧体，NiZnCu铁氧体和Ba铁氧体的磁性材料的磁体，所述磁体设置在IC安装部和电感之间。

公开(公告)号：US07821125B2

公开(公告)日：2010-10-26

申请号：US12109417

申请日：2008-04-25

申请人： Shigeru Tokita ,  Hiroo Matsue ,  Fumihide Maeda

发明人： Shigeru Tokita ,  Hiroo Matsue ,  Fumihide Maeda

IPC分类号： H01L21/12

CPC分类号： H01L23/433 ,  H01L23/053 ,  H01L23/562 ,  H01L24/32 ,  H01L2224/16225 ,  H01L2224/32057 ,  H01L2224/73253 ,  H01L2224/83385 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/16152 ,  H01L2924/19041 ,  H05K7/20472 ,  H01L2924/3512 ,  H01L2924/00

摘要： The invention provides a heat radiating structure which reduces a mechanical stress applied to an electronic part mounted on a printed circuit board including a semiconductor package. The heat radiating structure is constructed by a semiconductor package mounted on a printed circuit board, a thermal conduction sheet arranged on an upper surface of the semiconductor package, and a metal case provided with a heat radiating fin for receiving a heat transmitted form the thermal conduction sheet so as to discharge to an atmospheric air, and the metal case is provided with a concavo-convex structure in a contact portion with the thermal conduction sheet.

摘要翻译： 本发明提供了一种减少施加到安装在包括半导体封装的印刷电路板上的电子部件上的机械应力的散热结构。 散热结构由安装在印刷电路板上的半导体封装，布置在半导体封装的上表面上的导热片构成，金属壳由散热片构成，散热片用于接收热传导的热量 片材，以排出到大气中，金属壳体在与导热片的接触部分中设置有凹凸结构。

公开(公告)号：US07741652B2

公开(公告)日：2010-06-22

申请号：US12044597

申请日：2008-03-07

申请人： Hsiao-Wen Lee

发明人： Hsiao-Wen Lee

IPC分类号： H01L21/12 ,  H01L21/76

CPC分类号： G02B7/02 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14685 ,  H01L33/58 ,  H01L2924/0002 ,  H04N5/2253 ,  H04N5/2254 ,  H04N5/2257 ,  H01L2924/00

摘要： An alignment device and applications thereof are disclosed. The device comprises a dam structure disposed on a first substrate, and a post disposed on a second substrate at a position corresponding to the dam structure. The dam structure comprises a groove. The post is disposed in the groove of the dam structure when bonding the first and second substrates.

摘要翻译： 公开了对准装置及其应用。 该装置包括设置在第一基板上的坝结构和在对应于坝结构的位置处设置在第二基板上的柱。 坝结构包括槽。 当接合第一和第二基板时，该柱设置在坝结构的槽中。