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111.发明授权公开(公告)号：US06485778B1
公开(公告)日：2002-11-26
申请号：US09531551
申请日：2000-03-20
IPC分类号： B05D512
CPC分类号： H01L24/06 , H01L21/67132 , H01L23/4951 , H01L24/27 , H01L24/45 , H01L24/48 , H01L24/743 , H01L2224/04042 , H01L2224/05599 , H01L2224/06136 , H01L2224/32245 , H01L2224/45014 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/73215 , H01L2224/83192 , H01L2224/83856 , H01L2224/85399 , H01L2924/00014 , H01L2924/00015 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A method and apparatus for achieving a level exposed surface of an adhesive material pool for applying the adhesive material to lead fingers of a lead frame by contacting the lead fingers with the adhesive material pool within an adhesive reservoir. The level adhesive material exposed surface is achieved by attaching a coating stencil having small apertures, such as a screen or a plate with slots, to the adhesive reservoir, such that the only upward outlet for the adhesive material is through the apertures in the coating stencil. The surface tension between walls of the small apertures and the adhesive material flattens out the exposed surface of the adhesive material. This allows a larger area to be printed with a more uniform thickness layer.
摘要翻译： 一种用于实现粘合剂材料池的水平暴露表面的方法和装置，用于通过使引线指与粘合剂储存器内的粘合剂材料池接触来将粘合剂材料施加到引线框架的引线指状件。 水平粘合剂材料暴露表面通过将具有小孔的涂层模板（例如屏幕或具有狭缝的板）附接到粘合剂储存器来实现，使得用于粘合剂材料的唯一向上的出口通过涂布模板中的孔 。 小孔的壁和粘合剂材料的表面张力使粘合剂材料的暴露表面平坦化。 这允许用更均匀的厚度层印刷较大的面积。
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公开(公告)号：US06455928B2
公开(公告)日：2002-09-24
申请号：US09917969
申请日：2001-07-30
IPC分类号： H01L2302
CPC分类号： H01L24/06 , H01L23/3107 , H01L24/48 , H01L25/0657 , H01L25/105 , H01L2224/0401 , H01L2224/04042 , H01L2224/05599 , H01L2224/06136 , H01L2224/16 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2224/85399 , H01L2225/0651 , H01L2225/0652 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06586 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： A stackable FBGA package is configured such that conductive elements are placed along the outside perimeter of an integrated circuit (IC) device mounted to the FBGA. The conductive elements also are of sufficient size so that they extend beyond the bottom or top surface of the IC device, including the wiring interconnect and encapsulate material, as the conductive elements make contact with the FBGA positioned below or above to form a stack. The IC device, such as a memory chip, is mounted upon a first surface of a printed circuit board substrate forming part of the FBGA. Lead wires are used to attach the IC device to the printed board substrate and encapsulant is used to contain the IC device and wires within and below the matrix and profile of the conductive elements.
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113.发明授权Module assembly for stacked BGA packages with a common bus bar in the assembly 有权用于堆叠BGA封装的模块组件，在组件中带有公共母线公开(公告)号：US06414391B1
公开(公告)日：2002-07-02
申请号：US09343746
申请日：1999-06-30
IPC分类号： H01L2350
CPC分类号： H01L24/06 , H01L23/13 , H01L23/49816 , H01L23/4985 , H01L24/48 , H01L25/105 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/06136 , H01L2224/32225 , H01L2224/45099 , H01L2224/4824 , H01L2224/73215 , H01L2224/85399 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2225/1094 , H01L2924/00014 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H05K1/141 , H05K1/145 , H05K3/222 , H05K2201/10515 , H05K2201/1053 , H05K2201/10734 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays. The ball grid array packages comprise flexible or rigid substrates. The ball grid array packages additionally comprise an arrangement for the substantial matching of impedance for the circuits connected to the semiconductor devices.
摘要翻译： 可堆叠形成高密度组件的球栅阵列封装以及堆叠球栅阵列的方法。 球栅阵列封装包括柔性或刚性衬底。 球栅阵列封装还包括用于连接到半导体器件的电路的阻抗的基本匹配的布置。
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公开(公告)号：US06346152B1
公开(公告)日：2002-02-12
申请号：US09405943
申请日：1999-09-27
IPC分类号： B05C300
CPC分类号： H01L24/27 , H01L23/4951 , H01L24/06 , H01L24/48 , H01L24/49 , H01L24/743 , H01L24/83 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/06136 , H01L2224/2919 , H01L2224/32245 , H01L2224/48091 , H01L2224/4826 , H01L2224/48472 , H01L2224/49175 , H01L2224/73215 , H01L2224/743 , H01L2224/7565 , H01L2224/83194 , H01L2224/8385 , H01L2224/85399 , H01L2224/92147 , H01L2924/00014 , H01L2924/00015 , H01L2924/01005 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/0665 , H01L2924/07802 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A method for applying a viscous material to a lead frame element. A method of the invention includes positioning the lead frame facing downward and bringing the lead fingers into contact with a pool of adhesive material. The contact of the lead fingers to the adhesive material results in a portion of the lead fingers receiving a portion of the adhesive material from the pool of adhesive material. The gravitational forces on the adhesive material on the downward facing lead frame maintain the shape and boundary definition of the adhesive material.
摘要翻译： 一种将粘性材料施加到引线框架元件的方法。 本发明的一种方法包括将引线框架朝下定位并使引线指与一块粘合剂材料接触。 引线指与粘合剂材料的接触导致引线指的一部分从粘合剂材料池接收粘合材料的一部分。 面向下的引线框架上的粘合剂材料上的重力保持粘合剂材料的形状和边界限定。
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公开(公告)号：US06342731B1
公开(公告)日：2002-01-29
申请号：US09002160
申请日：1997-12-31
IPC分类号： H01L2302
CPC分类号： H05K3/301 , H01L25/105 , H01L2225/107 , H01L2924/0002 , H01L2924/09701 , H01L2924/3011 , H05K2201/10454 , H05K2201/10696 , Y10S83/942 , Y10T29/49121 , Y10T29/4913 , Y10T29/49135 , Y10T29/49147 , Y10T29/49156 , Y10T29/49169 , Y10T29/53174 , Y10T29/53178 , H01L2924/00
摘要： A vertically mountable semiconductor device including a plurality of stub contacts extending perpendiculary from a bottom edge thereof. A complementary alignment device includes a receptacle for receiving the vertically mountable semiconductor device. The alignment device is attachable to a carrier substrate. Upon attachment of the alignment device to a carrier substrate and insertion of a vertically mountable semiconductor device into the receptacle, a contact element applies a downward force to the vertically mountable semiconductor device to establish and maintain an electrical connection between the vertically mountable semiconductor device and the carrier substrate.
摘要翻译： 一种垂直安装的半导体器件，包括从其底部边缘延伸的多个短截线触点。 互补对准装置包括用于接收垂直安装的半导体器件的插座。 对准装置可附接到载体基板。 在将对准装置附接到载体基板并将可垂直安装的半导体装置插入到插座中时，接触元件向垂直安装的半导体器件施加向下的力，以建立并保持可垂直安装的半导体器件与 载体衬底。
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公开(公告)号：US06316292B1
公开(公告)日：2001-11-13
申请号：US09394180
申请日：1999-09-10
申请人： Jerrold L. King , J. Mike Brooks , Walter L. Moden
发明人： Jerrold L. King , J. Mike Brooks , Walter L. Moden
IPC分类号： H01L2144
CPC分类号： H01L23/3142 , H01L23/4951 , H01L24/48 , H01L2224/05599 , H01L2224/32014 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/73215 , H01L2224/85399 , H01L2924/00014 , H01L2924/0102 , H01L2924/01029 , H01L2924/01046 , H01L2924/01078 , H01L2924/10253 , H01L2924/14 , H01L2924/1532 , H01L2924/181 , H01L2924/1815 , Y10S438/926 , Y10S438/928 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： A semiconductor die includes a metal layer deposited thereon for enhancing adhesion between the die and a mold compound package. The metal layer is substantially oxide free. The die is coated with a layer or layers of copper (Cu) and/or palladium (Pd) by electroplating or electroless coating techniques. The metal layer provides a uniform wetting surface for better adhesion of the die with the mold compound during encapsulation. The increased adhesion reduces the delamination potential of the die from the package.
摘要翻译： 半导体管芯包括沉积在其上的金属层，用于增强管芯和模具复合封装之间的附着力。 金属层基本上不含氧化物。 通过电镀或无电涂覆技术将模具涂覆有一层或多层铜（Cu）和/或钯（Pd）。 金属层提供均匀的润湿表面，用于在封装期间模具与模具化合物的更好粘合。 增加的粘附力降低了模具从包装中的分层势。
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公开(公告)号：US06297546B1
公开(公告)日：2001-10-02
申请号：US09207889
申请日：1998-12-08
申请人： Walter L. Moden
发明人： Walter L. Moden
IPC分类号： H01L23495
CPC分类号： H01L24/06 , H01L23/4951 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/04042 , H01L2224/05647 , H01L2224/06136 , H01L2224/32014 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48647 , H01L2224/48747 , H01L2224/49171 , H01L2224/73215 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/0102 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2924/1815 , Y10T29/49121 , Y10T428/24165 , Y10T428/24207 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： An LOC die assembly is disclosed including a die dielectrically adhered to the underside of a lead frame. An underfill material is introduced between each lead finger and semiconductor die, extending from the bonding location of the die and the edge of the die, in order to prevent filler particles from lodging between the leads and the active surface of the die during transfer molding of a plastic encapsulant. The seal created by P the underfill material reduces point stresses on the active surface of the die usually caused by the filler particles. The decreased flexure in the leads further enhances the locking of the leads in position with respect to the die.
摘要翻译： 公开了一种LOC模具组件，其包括介电粘附到引线框架的下侧的模具。 在每个引线指和半导体管芯之间引入底部填充材料，其从模具的结合位置和模具的边缘延伸，以防止填料颗粒在传递模塑期间在引线和模具的有效表面之间倒伏 塑料密封剂。 由P底部填充材料产生的密封通常由填料颗粒引起的模具的活性表面上的点应力降低。 引线中的弯曲减小进一步增强了引线相对于管芯的位置锁定。
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公开(公告)号：US06294839B1
公开(公告)日：2001-09-25
申请号：US09385766
申请日：1999-08-30
IPC分类号： H01L2348
CPC分类号： H01L22/26 , H01L23/055 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L2224/05554 , H01L2224/05599 , H01L2224/16225 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/73253 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06517 , H01L2225/06555 , H01L2225/06572 , H01L2225/06582 , H01L2225/06586 , H01L2225/06596 , H01L2924/00014 , H01L2924/01322 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2924/00 , H01L2224/45099
摘要： Apparatus and methods of packaging and testing die. In one embodiment, a stacked die package includes a packaging substrate having a first surface with a recess disposed therein and a plurality of conductive leads coupled thereto, a first die attached to the packaging substrate within the recess and having a plurality of first bond pads electrically coupled to at least some of the conductive leads, and a second die attached to the first die and having a plurality of second bond pads that are electrically coupled to at least some of the conductive leads. When the stacked die package is engaged with, for example, a circuit board, the first surface of the packaging substrate is proximate the circuit board so that the packaging substrate at least partially encloses and protects the first and second die. The properties and dimensions of the packaging substrate are tailored to optimize the operational environment of the die, including improving thermal dissipation and enhancing performance of the die. In an alternate embodiment, the packaging substrate comprises an electrically conductive substrate and an electrically insulative material is formed between the conductive leads and the packaging substrate. In another embodiment, the first bond pads are electrically coupled to the conductive leads by wire-bonding. Alternately, the first bond pads are in direct contact with the conductive leads in a flip chip arrangement. In another embodiment, the die is sealed within an encapsulating layer to protect the first and second die.
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公开(公告)号：US6134111A
公开(公告)日：2000-10-17
申请号：US060562
申请日：1998-04-15
IPC分类号： H01L23/367 , H01L23/433 , H05K1/02 , H05K3/30 , H05K7/02
CPC分类号： H05K3/303 , H01L23/3675 , H01L23/4334 , H01L2924/0002 , H05K1/0203 , H05K2201/09709 , H05K2201/10454 , H05K2201/10659 , H05K2201/10696 , Y02P70/613
摘要： A high density vertical surface mount package and thermal carrier therefor including a heat sink.
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公开(公告)号：US6088238A
公开(公告)日：2000-07-11
申请号：US309331
申请日：1999-05-11
CPC分类号： H05K7/1007 , H01R12/89
摘要： A socket that secures bare and minimally packaged semiconductor devices substantially perpendicularly relative to a carrier substrate. The socket includes intermediate conductive elements and a member which moves the intermediate conductive elements between an insertion position and a biased position. After placement of the intermediate conductive elements into an insertion position, a semiconductor device may be inserted into a receptacle of the socket with minimal insertion force. Movement of the member to a biased position facilitates biasing of the intermediate conductive elements against a bond pad of the semiconductor device. The intermediate conductive elements establish an electrical connection between the semiconductor device and the carrier substrate. A first embodiment of the socket includes a member which moves transversely relative to the remainder of the socket. In a second embodiment of the socket, the member moves vertically relative to the socket body.
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