System and method for process contamination prevention for semiconductor manufacturing
    141.
    发明授权
    System and method for process contamination prevention for semiconductor manufacturing 有权
    用于半导体制造的工艺污染防止系统和方法

    公开(公告)号:US07035705B2

    公开(公告)日:2006-04-25

    申请号:US10791930

    申请日:2004-03-03

    CPC classification number: G05B19/41875 Y02P90/22

    Abstract: Provided are a system and method for preventing contamination in a semiconductor manufacturing environment. The method includes comparing one or more attributes associated with a product, such as a substrate, with one or more attributes associated with an operation. If the comparison indicates that the product is not compatible with the operation, then the operation is suspended with respect to the product. If the comparison indicates that the product is compatible with the operation, then the operation is performed on the product.

    Abstract translation: 提供一种用于防止半导体制造环境中的污染的系统和方法。 该方法包括将与产品(例如底物)相关联的一个或多个属性与与操作相关联的一个或多个属性进行比较。 如果比较表明该产品与该操作不兼容,则该操作将相对于该产品暂停。 如果比较表示产品与操作兼容,则对产品执行操作。

    METHOD FOR CONTROLLING FAN SPEED
    142.
    发明申请
    METHOD FOR CONTROLLING FAN SPEED 有权
    风扇转速控制方法

    公开(公告)号:US20060054713A1

    公开(公告)日:2006-03-16

    申请号:US11161132

    申请日:2005-07-25

    CPC classification number: H05K7/20209

    Abstract: A method for controlling the fan speed by detecting different power supplies of a mobile electronic device is proposed. When an external power source is used for mobile electronic device and detected by the embedded controller, the first fan control table is used to control the fan speed to increase the heat dissipation capability of the mobile electronic device. When battery power is used as the power source and detected by the embedded controller, a second fan control table is used to control the fan speed to extend the battery life. The first fan control table and the second fan control table become the relation control table between the temperature of the processor and the fan speed or the relation fan control table between the temperature of the processor and the input voltage of the fan for controlling the fan speed according to the temperature of the processor.

    Abstract translation: 提出了一种通过检测移动电子设备的不同电源来控制风扇速度的方法。 当外部电源用于移动电子设备并由嵌入式控制器检测时,第一风扇控制台用于控制风扇速度以增加移动电子设备的散热能力。 当电池电源用作电源并由嵌入式控制器检测时,第二个风扇控制台用于控制风扇转速以延长电池寿命。 第一风扇控制表和第二风扇控制表成为处理器的温度与风扇转速之间的关系控制表,或处理器的温度与用于控制风扇转速的风扇的输入电压之间的关系风扇控制表 根据处理器的温度。

    Method for generating organizational structure and method for controlling authorization thereof
    143.
    发明申请
    Method for generating organizational structure and method for controlling authorization thereof 审中-公开
    生成组织结构及其授权控制方法

    公开(公告)号:US20050240913A1

    公开(公告)日:2005-10-27

    申请号:US11107446

    申请日:2005-04-15

    CPC classification number: G06Q10/06

    Abstract: A method of generating organizational structure and a method of controlling authorization thereof are provided. The method separates an organization into a plurality of nodes and links, and defines attributes for nodes and links, so as to describe the details of nodes and links, respectively. In case an attribute of some node (link) needs to be modified, the whole organizational structure is automatically modified by only modifying the node (link) attribute without having to sequentially change all attributes.

    Abstract translation: 提供了一种生成组织结构的方法和一种控制其授权的方法。 该方法将组织分为多个节点和链路,并定义节点和链路的属性,以分别描述节点和链路的细节。 如果需要修改某个节点(链接)的属性,则只需修改节点(链接)属性即可自动修改整个组织结构,而不必依次更改所有属性。

    Wafer-dicing process
    144.
    发明授权
    Wafer-dicing process 有权
    晶圆切割工艺

    公开(公告)号:US06319754B1

    公开(公告)日:2001-11-20

    申请号:US09613553

    申请日:2000-07-10

    Abstract: A wafer-dicing process includes the steps of attaching the wafer to a wafer mounting sheet which includes a bonding adhesive layer, a releasable film layer, a resilient substrate layer, and a light-curable adhesive layer, laying assembly of the wafer and the wafer mounting sheet on a wafer carrier sheet, exposing assembly of the wafer, the wafer mounting sheet and the wafer carrier sheet to cure the light-curable adhesive layer, cutting the wafer to form bare dice, sucking one of the dice and pushing upwardly the carrier sheet, and moving and mounting the die to a die mounting substrate.

    Abstract translation: 晶片切割工艺包括以下步骤:将晶片连接到晶片安装片上,该晶片安装片包括粘合粘合剂层,可剥离膜层,弹性基底层和可光固化粘合剂层,晶片和晶片的铺设组件 安装片在晶片载体片上,暴露晶片,晶片安装片和晶片载体片的组件以固化可光固化粘合剂层,切割晶片以形成裸裸片,吸取骰子中的一个并向上推动载体 片,并将模具移动并安装到管芯安装基板。

    Method and system for managing a flash memory mass storage system
    145.
    发明授权
    Method and system for managing a flash memory mass storage system 失效
    用于管理闪存大容量存储系统的方法和系统

    公开(公告)号:US5956473A

    公开(公告)日:1999-09-21

    申请号:US755194

    申请日:1996-11-25

    Abstract: The present application discloses methods to provide defect management, wear leveling and data security to a mass storage system implemented using flash memory. The flash memory is organized into a plurality of blocks. Each block has a special region for storing its attributes. In defect management, defects arising from manufacturing and on-the-fly defects are scanned. Defective blocks are marked by altering its attributes. The present application also discloses a wear leveling method in which the difference between the number of erasures of any two blocks (except the defective blocks) is within a predetermined value. The present application further discloses a new error detection and correction method. The same data is stored in two separate memory locations. The content of these two locations are later "ored" or "anded" together (depending on the nature of error giving rise to the error) to recover the correct data.

    Abstract translation: 本申请公开了向使用闪存实现的大容量存储系统提供缺陷管理,磨损均衡和数据安全性的方法。 闪存被组织成多个块。 每个块都有一个用于存储其属性的特殊区域。 在缺陷管理中,扫描了由制造和飞行缺陷引起的缺陷。 有缺陷的块通过改变其属性来标记。 本申请还公开了一种磨损均衡方法,其中任何两个块(除了缺陷块之外)的擦除次数之间的差异在预定值内。 本申请还公开了一种新的错误检测和校正方法。 相同的数据存储在两个单独的存储器位置。 这两个位置的内容随后“一起”或“并入”(取决于引起错误的错误的性质)来恢复正确的数据。

    Flash memory mass storage system
    146.
    发明授权

    公开(公告)号:US5745418A

    公开(公告)日:1998-04-28

    申请号:US756304

    申请日:1996-11-25

    Abstract: An architecture for a mass storage system using flash memory is described. This architecture involves organizing the flash memory into a plurality of blocks. These blocks are then divided into several categories. One of the categories is a working category used to store data organized in accordance with a pre-defined addressing scheme (such as the logical block address used in Microsoft's operating system). The other category is a temporary buffer used to store data intended to be written to one of the working blocks. Another category contains blocks that need to be erased. When data is written into the mass storage system, a block in the second category is allocated from a block in the third category. The allocated block will then be changed to a block in the first category when writing to the allocated block is completed. The correspond block in the first category is placed into the third category. As a result, blocks can be recycled. Consequently, there is a constant supply of blocks in the second category. In another embodiment of the present invention, a new category is developed to handle random writing to the working blocks.

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