公开(公告)号：US20130187277A1

公开(公告)日：2013-07-25

申请号：US13443556

申请日：2012-04-10

申请人： Yu-Feng Chen ,  Chun-Hung Lin ,  Han-Ping Pu ,  Chih-Hang Tung ,  Kai-Chiang Wu ,  Ming-Che Ho

发明人： Yu-Feng Chen ,  Chun-Hung Lin ,  Han-Ping Pu ,  Chih-Hang Tung ,  Kai-Chiang Wu ,  Ming-Che Ho

IPC分类号： H01L23/48

CPC分类号： H01L24/13 ,  H01L23/488 ,  H01L24/02 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05111 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05551 ,  H01L2224/05555 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05686 ,  H01L2224/10125 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13012 ,  H01L2224/13076 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/12042 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01047 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor die includes a crack stopper on an under-bump metallization (UBM) layer. The crack stopper is in the shape of hollow cylinder with at least two openings.

摘要翻译： 半导体管芯包括在凸块下金属化（UBM）层上的裂纹阻挡层。 裂缝止动器为具有至少两个开口的中空圆筒形状。

公开(公告)号：US09159686B2

公开(公告)日：2015-10-13

申请号：US13443556

申请日：2012-04-10

申请人： Yu-Feng Chen ,  Chun-Hung Lin ,  Han-Ping Pu ,  Chih-Hang Tung ,  Kai-Chiang Wu ,  Ming-Che Ho

发明人： Yu-Feng Chen ,  Chun-Hung Lin ,  Han-Ping Pu ,  Chih-Hang Tung ,  Kai-Chiang Wu ,  Ming-Che Ho

IPC分类号： H01L23/00 ,  H01L23/488

CPC分类号： H01L24/13 ,  H01L23/488 ,  H01L24/02 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05111 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05551 ,  H01L2224/05555 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05686 ,  H01L2224/10125 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13012 ,  H01L2224/13076 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/12042 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01047 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor die includes a crack stopper on an under-bump metallization (UBM) layer. The crack stopper is in the shape of hollow cylinder with at least two openings.

摘要翻译： 半导体管芯包括在凸块下金属化（UBM）层上的裂纹阻挡层。 裂缝止动器为具有至少两个开口的中空圆筒形状。

公开(公告)号：US09082763B2

公开(公告)日：2015-07-14

申请号：US13421040

申请日：2012-03-15

申请人： Chen-Hua Yu ,  Da-Yuan Shih ,  Chih-Hang Tung

发明人： Chen-Hua Yu ,  Da-Yuan Shih ,  Chih-Hang Tung

IPC分类号： H01L23/00 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/44 ,  H01L21/441 ,  H01L21/48 ,  H01L23/498

CPC分类号： H01L23/49811 ,  H01L21/44 ,  H01L21/441 ,  H01L21/4853 ,  H01L23/48 ,  H01L23/52 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/42 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05664 ,  H01L2224/1134 ,  H01L2224/13005 ,  H01L2224/13011 ,  H01L2224/13016 ,  H01L2224/13027 ,  H01L2224/13078 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/1411 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/48611 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48664 ,  H01L2224/4911 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/83411 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3841 ,  H01L2924/00012 ,  H01L2224/45124 ,  H01L2924/00011 ,  H01L2924/206 ,  H01L2224/05147 ,  H01L2224/05144 ,  H01L2224/05164 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2224/05552

摘要： Disclosed embodiments include wire joints and methods of forming wire joints that can enable realization of fine pitch joints and collapse control for various packages. A first embodiment is a structure comprising a first substrate, a second substrate, and a wire joint. The first substrate comprises a first bonding surface, and the second substrate comprises a second bonding surface. The first bonding surface is opposite and faces the second bonding surface. The wire joint is attached to and between the first bonding surface and the second bonding surface.

摘要翻译： 公开的实施例包括线接头和形成线接头的方法，其可以实现细间距接头和各种包装件的塌陷控制。 第一实施例是包括第一基板，第二基板和线接头的结构。 第一衬底包括第一接合表面，并且第二衬底包括第二接合表面。 第一接合表面相对并面向第二接合表面。 线接头附接到第一接合表面和第二接合表面之间。

公开(公告)号：US20140041918A1

公开(公告)日：2014-02-13

申请号：US13570089

申请日：2012-08-08

申请人： Hsin-An Shen ,  Yung Ching Chen ,  Ming-Chung Sung ,  Chih-Hang Tung ,  Chien-Hsun Lee ,  Da-Yuan Shih

发明人： Hsin-An Shen ,  Yung Ching Chen ,  Ming-Chung Sung ,  Chih-Hang Tung ,  Chien-Hsun Lee ,  Da-Yuan Shih

IPC分类号： H02G15/00 ,  H01R43/16 ,  H05K1/11

CPC分类号： H05K3/4015 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2924/15311 ,  H01L2924/19107 ,  H05K3/3436 ,  H05K2201/10287 ,  H05K2203/049 ,  Y10T29/49147 ,  Y10T29/49204 ,  H01L2924/00014 ,  H01L2924/00

摘要： Disclosed herein is a system and method for mounting packages by forming one or more wire loop interconnects, optionally, with a wirebonder, and mounting the interconnects to a mounting pad on a first substrate. A first and second stud ball may each have at least one flat surface be disposed on a single mounting pad, and a wire having a bend region and forming a loop may be disposed between the stud balls. The stud balls may be formed from a deformed mouthing node formed on a wire. The loop may be mounted on a mounting pad on a first substrate and a second substrate may be mounted on the loop via a conductive material such as solder.

摘要翻译： 本文公开了一种用于通过形成一个或多个线环互连件（可选地，使用引线键合器）并将互连件安装到第一基板上的安装焊盘来安装封装件的系统和方法。 第一和第二螺柱球可以各自具有设置在单个安装垫上的至少一个平坦表面，并且具有弯曲区域并形成环的线可以设置在螺柱球之间。 螺柱球可以由形成在线上的变形的口部节点形成。 环可以安装在第一基板上的安装焊盘上，并且第二基板可以经由诸如焊料的导电材料安装在环上。

公开(公告)号：US20130040423A1

公开(公告)日：2013-02-14

申请号：US13206602

申请日：2011-08-10

申请人： Chih-Hang Tung ,  Chun Hui Yu ,  Chen-Hua Yu ,  Da-Yuan Shih

发明人： Chih-Hang Tung ,  Chun Hui Yu ,  Chen-Hua Yu ,  Da-Yuan Shih

IPC分类号： H01L21/56 ,  H01L21/82

CPC分类号： H01L25/50 ,  H01L21/4882 ,  H01L21/561 ,  H01L21/563 ,  H01L21/76879 ,  H01L21/78 ,  H01L23/3114 ,  H01L24/03 ,  H01L24/09 ,  H01L24/11 ,  H01L24/17 ,  H01L24/19 ,  H01L24/24 ,  H01L24/27 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/02311 ,  H01L2224/02381 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05572 ,  H01L2224/08146 ,  H01L2224/12105 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73217 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/03

摘要： A method of multi-chip wafer level packaging comprises forming a reconfigured wafer using a plurality of photo-sensitive material layers. A plurality of semiconductor chips and wafers are embedded in the photo-sensitive material layers. Furthermore, a variety of through assembly vias are formed in the photo-sensitive material layers. Each semiconductor chip embedded in the photo-sensitive material layers is connected to input/output pads through connection paths formed by the through assembly vias.

摘要翻译： 多芯片晶片级封装的方法包括使用多个感光材料层形成重新配置的晶片。 多个半导体芯片和晶片被嵌入到感光材料层中。 此外，在感光材料层中形成各种贯穿组装通孔。 嵌入在感光材料层中的每个半导体芯片通过由通孔组装通孔形成的连接路径连接到输入/输出焊盘。

公开(公告)号：US08308052B2

公开(公告)日：2012-11-13

申请号：US12954121

申请日：2010-11-24

申请人： Chih-Horng Chang ,  Yian-Liang Kuo ,  Chih-Hang Tung ,  Tsung-Fu Tsai

发明人： Chih-Horng Chang ,  Yian-Liang Kuo ,  Chih-Hang Tung ,  Tsung-Fu Tsai

IPC分类号： B23K31/02 ,  H01L21/44

CPC分类号： B23K1/0016 ,  B23K1/008 ,  B23K3/085 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2924/14 ,  H01L2924/00

摘要： A method includes heating a package structure including a first work piece and a second work piece to melt a plurality of solder bumps between the first and the second work pieces; and after the step of heating, allowing the plurality of solder bumps to solidify. During the step of solidifying, a first side of the package structure is maintained at a first temperature higher than a melting temperature of the plurality of solder bumps by using a heating source. During the step of solidifying, a second side of the package structure is maintained at a second temperature lower than the melting temperature by using a cooling source, wherein the second side is opposite the first side.

摘要翻译： 一种方法包括加热包括第一工件和第二工件的包装结构，以熔化第一和第二工件之间的多个焊料凸块; 并且在加热步骤之后，允许多个焊料凸点固化。 在固化步骤期间，使用加热源将封装结构的第一侧保持在比多个焊料凸块的熔化温度高的第一温度。 在固化步骤期间，通过使用冷却源将封装结构的第二面保持在低于熔融温度的第二温度，其中第二侧与第一侧相对。

公开(公告)号：US20120061059A1

公开(公告)日：2012-03-15

申请号：US13033840

申请日：2011-02-24

申请人： Yi-Li HSIAO ,  Chen-Hua Yu ,  Da-Yuan Shih ,  Chih-Hang Tung ,  Chun Hui Yu

发明人： Yi-Li HSIAO ,  Chen-Hua Yu ,  Da-Yuan Shih ,  Chih-Hang Tung ,  Chun Hui Yu

IPC分类号： F28D15/00

CPC分类号： F28D15/02 ,  H01L23/34 ,  H01L23/473 ,  H01L25/0657 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2224/0401

摘要： An apparatus for cooling a stacked die package comprises a first die provided above a substrate; a second die above the first die; a cooling fluid in fluid communication with the first die and the second die, the cooling fluid for absorbing thermal energy from the first and the second die; a housing containing the first and second dies, the housing sealing the first and second dies from an environment, wherein the housing further includes a first opening and a second opening, the first and second openings being vertically displaced from one another; a conduit having one end connected to the first opening and the other end connected to the second opening, the conduit allowing the cooling liquid to circulate from the first opening to the second opening; a first temperature sensor being arranged to provide an output that is dependent on a local temperature at the first opening; and a second temperature sensor being arranged to provide an output that is dependent on a local temperature at the second opening, wherein the outputs of the first and second temperature sensors relative to each other are indicative of a level of the cooling fluid.

摘要翻译： 一种用于冷却堆叠的管芯封装的设备，包括设置在衬底上的第一管芯; 第一个模具上方的第二个模具; 与第一模具和第二模具流体连通的冷却流体，用于从第一模具和第二模具吸收热能的冷却流体; 壳体，其包含第一和第二模具，所述壳体将环境中的第一和第二模具密封，其中所述壳体还包括第一开口和第二开口，所述第一和第二开口彼此垂直移位; 导管，其一端连接到第一开口，另一端连接到第二开口，导管允许冷却液从第一开口循环到第二开口; 第一温度传感器被布置成提供依赖于第一开口处的局部温度的输出; 并且第二温度传感器被布置成提供取决于第二开口处的局部温度的输出，其中第一和第二温度传感器相对于彼此的输出指示冷却流体的水平。

公开(公告)号：US20110186989A1

公开(公告)日：2011-08-04

申请号：US12883950

申请日：2010-09-16

申请人： Yi-Li Hsiao ,  Chen-Hua Yu ,  Shin-Puu Jeng ,  Chih-Hang Tung ,  Cheng-Chang Wei

发明人： Yi-Li Hsiao ,  Chen-Hua Yu ,  Shin-Puu Jeng ,  Chih-Hang Tung ,  Cheng-Chang Wei

IPC分类号： H01L23/52 ,  H01L21/44

CPC分类号： H01L24/11 ,  H01L21/44 ,  H01L21/76885 ,  H01L23/49811 ,  H01L23/52 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/11 ,  H01L2224/1147 ,  H01L2224/11823 ,  H01L2224/11825 ,  H01L2224/11849 ,  H01L2224/13018 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/80815 ,  H01L2224/81815 ,  H01L2924/01322 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device includes a solder bump overlying and electrically connected to a pad region, and a metal cap layer formed on at least a portion of the solder bump. The metal cap layer has a melting temperature greater than the melting temperature of the solder bump.

摘要翻译： 半导体器件包括覆盖并电连接到焊盘区域的焊料凸块和形成在焊料凸块的至少一部分上的金属盖层。 金属盖层的熔融温度大于焊料凸块的熔化温度。

公开(公告)号：US08803333B2

公开(公告)日：2014-08-12

申请号：US13544746

申请日：2012-07-09

申请人： Chen-Hua Yu ,  Da-Yuan Shih ,  Chih-Hang Tung

发明人： Chen-Hua Yu ,  Da-Yuan Shih ,  Chih-Hang Tung

IPC分类号： H01L29/40 ,  H01L23/48 ,  H01L23/52 ,  H01L23/488

CPC分类号： H01L23/48 ,  H01L23/3185 ,  H01L23/3192 ,  H01L23/488 ,  H01L23/52 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05676 ,  H01L2224/05681 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/11466 ,  H01L2224/11823 ,  H01L2224/11825 ,  H01L2224/1184 ,  H01L2224/13005 ,  H01L2224/13019 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13582 ,  H01L2224/13611 ,  H01L2224/13618 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/13669 ,  H01L2224/13673 ,  H01L2224/13676 ,  H01L2224/29011 ,  H01L2224/29035 ,  H01L2224/2919 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/81193 ,  H01L2224/81205 ,  H01L2224/8183 ,  H01L2224/81895 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/014 ,  H01L2924/01029 ,  H01L2924/206 ,  H01L2224/81 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552

摘要： A three dimensional (3D) chip stack includes a first chip bonded to a second chip. The first chip includes a first bump structure overlying the first substrate, and the second chip includes a second bump structure overlying the second substrate. The first bump structure is attached to the second bump structure, and a joining region is formed between the first bump structure and the second bump structure. The joining region is a solderless region which includes a noble metal.

摘要翻译： 三维（3D）芯片堆叠包括结合到第二芯片的第一芯片。 第一芯片包括覆盖第一基板的第一凸块结构，并且第二芯片包括覆盖第二基板的第二凸块结构。 第一凸块结构附接到第二凸块结构，并且在第一凸块结构和第二凸块结构之间形成接合区域。 接合区域是包括贵金属的无焊区域。

公开(公告)号：US08531032B2

公开(公告)日：2013-09-10

申请号：US13224487

申请日：2011-09-02

申请人： Chen-Hua Yu ,  Chih-Hang Tung ,  Tung-Liang Shao

发明人： Chen-Hua Yu ,  Chih-Hang Tung ,  Tung-Liang Shao

IPC分类号： H01L23/498

CPC分类号： H01L23/3675 ,  H01L21/4871 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/49816 ,  H01L23/5329 ,  H01L24/19 ,  H01L25/0657 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2225/06513 ,  H01L2225/06589 ,  H01L2924/15321 ,  H01L2924/15788 ,  H01L2924/181 ,  H05K1/181 ,  H01L2924/00

摘要： A multi-chip semiconductor device comprises a thermally enhanced structure, a first semiconductor chip, a second semiconductor chip, an encapsulation layer formed on top of the first semiconductor chip and the second semiconductor chip. The multi-chip semiconductor device further comprises a plurality of thermal vias formed in the encapsulation layer. The thermally enhanced structure comprises a heat sink block attached to a first semiconductor die. The heat sink block may further comprise a variety of thermal vias and thermal openings. By employing the thermal enhanced structure, the thermal performance of the multi-chip semiconductor device can be improved.