公开(公告)号：US20120164794A1

公开(公告)日：2012-06-28

申请号：US12980309

申请日：2010-12-28

Applicant: Yan Xun Xue ,  Jun Lu ,  Anup Bhalla

Inventor： Yan Xun Xue ,  Jun Lu ,  Anup Bhalla

IPC: H01L21/60 ,  H01L21/56

CPC classification number: H01L24/49 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0781 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method for making a wire bond package comprising the step of providing a lead frame array comprising a plurality of lead frame units therein, each lead frame unit comprises a first die pad and a second die pad each having a plurality of tie bars connected to the lead frame array, a plurality of reinforced bars interconnecting the first and second die pads; the reinforced bars are removed after molding compound encapsulation.

Abstract translation: 一种用于制造引线接合封装的方法，包括提供包括多个引线框架单元的引线框架阵列的步骤，每个引线框架单元包括第一管芯焊盘和第二管芯焊盘，每个引线框架单元具有连接到 引线框架阵列，互连第一和第二管芯焊盘的多个加强杆; 在模塑复合材料封装之后去除增强棒。

公开(公告)号：US20120146202A1

公开(公告)日：2012-06-14

申请号：US12968159

申请日：2010-12-14

Applicant: Yan Xun Xue ,  Yueh-Se Ho ,  Hamza Yilmaz ,  Anup Bhalla ,  Jun Lu ,  Kal Liu

Inventor： Yan Xun Xue ,  Yueh-Se Ho ,  Hamza Yilmaz ,  Anup Bhalla ,  Jun Lu ,  Kal Liu

IPC: H01L23/495 ,  H01L21/77

CPC classification number: H01L23/49562 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/49524 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/371 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/48247 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package and it manufacturing method includes a lead frame having a die pad, and a source lead with substantially a V groove disposed on a top surface. A semiconductor chip disposed on the die pad. A metal plate connected to a top surface electrode of the chip having a bent extension terminated in the V groove in contact with at least one of the V groove sidewalls.

Abstract translation: 半导体封装及其制造方法包括具有管芯焊盘的引线框架和设置在顶表面上的大致V形槽的源极引线。 设置在芯片焊盘上的半导体芯片。 连接到芯片的顶表面电极的金属板具有在V沟槽中终止的弯曲延伸部，与V沟槽侧壁中的至少一个接触。

公开(公告)号：US08156086B2

公开(公告)日：2012-04-10

申请号：US12248779

申请日：2008-10-09

Applicant: Jun Lu ,  Arun Amarendran

Inventor： Jun Lu ,  Arun Amarendran

IPC: G06F7/00 ,  G06F17/00

CPC classification number: G06F11/1448 ,  Y10S707/99943 ,  Y10S707/99953 ,  Y10S707/99955

Abstract: Methods and systems are described for verifying stored data by receiving a first set of metadata associated with a first set of stored data, generating a second set of metadata associated with a second set of stored data which is associated with the first set of stored data, and comparing the first set of metadata and second set of metadata. Alternatively, the storage system can also generate a first set of metadata associated with a first set of stored data, generate a second set of stored data which is a copy of the first set of stored data, generate a second set of metadata associated with the second set of stored data, and compare the first set of metadata and the second set of metadata.

Abstract translation: 描述了用于通过接收与第一组存储数据相关联的第一组元数据来生成与第一组存储数据相关联的与第二组存储数据相关联的第二组元数据来验证存储的数据的方法和系统， 以及比较第一组元数据和第二组元数据。 或者，存储系统还可以生成与第一组存储数据相关联的第一组元数据，生成作为第一组存储数据的副本的第二组存储数据，生成与第一组元数据相关联的第二组元数据 第二组存储数据，并比较第一组元数据和第二组元数据。

公开(公告)号：US20120049336A1

公开(公告)日：2012-03-01

申请号：US13289918

申请日：2011-11-04

Applicant: Yan Xun Xue ,  Jun Lu ,  Lei Shi ,  Liang Zhao

Inventor： Yan Xun Xue ,  Jun Lu ,  Lei Shi ,  Liang Zhao

IPC: H01L23/495

CPC classification number: H01L24/73 ,  H01L21/4842 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/49551 ,  H01L24/29 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/0603 ,  H01L2224/29339 ,  H01L2224/371 ,  H01L2224/37599 ,  H01L2224/48247 ,  H01L2224/73221 ,  H01L2224/83101 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/85 ,  H01L2224/92 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method is disclosed for attaching an interconnection plate to semiconductor die within leadframe package. A base leadframe is provided with die pad for attaching semiconductor die. An interconnection plate is provided for attachment to the base leadframe and semiconductor die. Add a base registration feature onto base leadframe and a plate registration feature onto interconnection plate with the registration features designed to match each other such that, upon approach of the interconnection plate to base leadframe, the two registration features would engage and guide each other causing concomitant self-aligned attachment of the interconnection plate to base leadframe. Next, the interconnection plate is brought into close approach to base leadframe to engage and lock plate registration feature to base registration feature hence completing attachment of the interconnection plate to semiconductor die and forming a leadframe package.

Abstract translation: 公开了一种将引线框封装内的互连板连接到半导体管芯的方法。 基座引线框架设置有用于附接半导体管芯的管芯焊盘。 提供互连板，用于附接到基底引线框架和半导体管芯。 将基准注册功能添加到基准引线框架和板对准特征到互连板上，其中配准特征被设计成彼此匹配，使得在互连板到基底引线框架的接近时，两个配准特征将相互接合并引导彼此引起伴随 互连板与基座引线框架的自对准连接。 接下来，使互连板靠近基底引线框架以将板对准特征接合并锁定到基准对准特征，从而完成互连板连接到半导体管芯并形成引线框封装。

公开(公告)号：US20120002505A1

公开(公告)日：2012-01-05

申请号：US13175817

申请日：2011-07-01

Applicant: Yun Wang ,  Jun Lu

Inventor： Yun Wang ,  Jun Lu

IPC: G01V1/28

CPC classification number: G01V1/286 ,  G01V2210/48 ,  G01V2210/586

Abstract: An approach is provided for a multi-component seismic data processing that separates P-type and S-type seismic waves in an affine coordinate system. A method for separating and composing seismic waves comprises: determining base vectors of the seismic waves; transforming and separating the seismic wave in an affine coordinate system; and obtaining a signal with true amplitudes and eliminating a mode leakage phenomenon. Therefore, the method achieves the wave separation and recovers the amplitudes of separated waves simultaneously, which reduces noises to provide more precisely seismic data and to satisfy the requirement of seismic data analysis and processing.

Abstract translation: 提供了一种用于在仿射坐标系中分离P型和S型地震波的多分量地震数据处理的方法。 一种用于分离和组合地震波的方法包括：确定地震波的基矢量; 在仿射坐标系中转换和分离地震波; 并获得具有真实幅度的信号并消除模式泄漏现象。 因此，该方法实现了波分离，同时恢复了分离波的振幅，减少了噪声，提供了更精确的地震数据，满足了地震数据分析与处理的要求。

公开(公告)号：US08086390B2

公开(公告)日：2011-12-27

申请号：US12629152

申请日：2009-12-02

Applicant: Christopher E. Whitney ,  Poh Fong Chin ,  William L. Aldrich, III ,  Anthony H. Heap ,  Jeffrey M. Kaiser ,  Jun Lu

Inventor： Christopher E. Whitney ,  Poh Fong Chin ,  William L. Aldrich, III ,  Anthony H. Heap ,  Jeffrey M. Kaiser ,  Jun Lu

IPC: G06F19/00

CPC classification number: F02D41/0005 ,  F02D41/0007 ,  F02D41/0215 ,  F02D41/0235 ,  F02D41/1497 ,  F02D2041/001 ,  F02D2200/0406 ,  F02D2200/0414 ,  F02D2200/0804 ,  F02D2200/1004 ,  F02D2250/18 ,  F02D2250/22 ,  Y02T10/42

Abstract: An engine control system comprises a base air per cylinder (APC) module, a catalyst temperature adjustment module, an ambient temperature adjustment module, and an APC adjustment module. The base APC module determines a base APC to reduce first engine pumping losses during a first deceleration fuel cutoff (DFCO) event relative to second engine pumping losses during a second DFCO event. The catalyst temperature adjustment module determines a catalyst temperature adjustment based on a catalyst temperature during the first DFCO event. The ambient temperature adjustment module determines an ambient temperature adjustment based on an ambient air temperature during the first DFCO event. The APC adjustment module selectively adjusts the base APC based on the catalyst temperature adjustment and the ambient temperature adjustment and controls at least one of the engine airflow actuators based on the adjusted base APC during the first DFCO event.

Abstract translation: 发动机控制系统包括每缸气体（APC）模块，催化剂温度调节模块，环境温度调节模块和APC调节模块。 在第二DFCO事件期间，基本APC模块确定基本APC以减少在第一减速燃料切断（DFCO）事件期间相对于第二发动机泵送损失的第一发动机泵送损失。 催化剂温度调节模块基于第一DFCO事件期间的催化剂温度来确定催化剂温度调节。 环境温度调节模块基于第一DFCO事件期间的环境空气温度来确定环境温度调节。 APC调节模块基于催化剂温度调节和环境温度调节来选择性地调节基座APC，并且在第一DFCO事件期间基于经调整的基座APC控制至少一个发动机气流致动器。

公开(公告)号：US20110309454A1

公开(公告)日：2011-12-22

申请号：US13077720

申请日：2011-03-31

Applicant: Yueh-Se Ho ,  Hamza Yilmaz ,  Yan Xun Xue ,  Jun Lu

Inventor： Yueh-Se Ho ,  Hamza Yilmaz ,  Yan Xun Xue ,  Jun Lu

IPC: H01L27/088

CPC classification number: H01L23/49524 ,  H01L23/3107 ,  H01L23/49537 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/84 ,  H01L25/074 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/371 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/4118 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48177 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/73221 ,  H01L2224/8385 ,  H01L2224/8485 ,  H01L2224/85399 ,  H01L2224/92 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/81 ,  H01L2224/84 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00012

Abstract: A combined packaged power semiconductor device includes a flipped top source low-side MOSFET electrically connected to a top surface of a die paddle, a first metal interconnection plate connecting between a bottom drain of a high-side MOSFET or a top source of a flipped high-side MOSFET to a bottom drain of the low-side MOSFET, and a second metal interconnection plate stacked on top of the high-side MOSFET chip. The high-side, low-side MOSFET and the IC controller can be packaged three-dimensionally that reduces the overall size of semiconductor devices and can maximize the chip's size within a package of the same size and improves the performance of the semiconductor devices. The top source of flipped low-side MOSFET is connected to the top surface of the die paddle and thus is grounded through the exposed bottom surface of die paddle, which simplifies the shape of exposed bottom surface of the die paddle and maximizes the area to facilitate heat dissipation.

Abstract translation: 组合封装的功率半导体器件包括电连接到管芯焊盘的顶表面的翻转顶部源极低侧MOSFET，连接在高侧MOSFET的底部漏极或翻转高电平的顶部源的第一金属互连板 的低端MOSFET的底部漏极和堆叠在高侧MOSFET芯片的顶部上的第二金属互连板。 高侧，低端MOSFET和IC控制器可以三维封装，从而减小半导体器件的总体尺寸，并可在相同尺寸的封装内最大限度地提高芯片的尺寸，并提高半导体器件的性能。 翻转的低侧MOSFET的顶部源极连接到管芯焊盘的顶表面，并且因此通过裸片的裸露的底表面接地，这简化了裸片焊盘的暴露的底面的形状，并使面积最大化 散热。

公开(公告)号：US20110280861A1

公开(公告)日：2011-11-17

申请号：US13058076

申请日：2009-08-10

Applicant: David Scadden ,  Shangqin Guo ,  Jun Lu

Inventor： David Scadden ,  Shangqin Guo ,  Jun Lu

IPC: A61K31/7105 ,  A61K31/7088 ,  A61K39/395 ,  A61P35/02 ,  A61K35/12 ,  A61P37/02 ,  A61P35/00 ,  C12N5/0789 ,  A61K38/02

CPC classification number: C12N15/113 ,  C12N5/0647 ,  C12N2310/14 ,  C12N2310/141 ,  C12N2501/65

Abstract: Embodiments of the invention relate to methods and compositions for the expansion of hematopoietic stem cell (HSC) self renewal. The microRNA-125a is a master control of HSC self-renewal. Increased expression of mir-125a increased HSC self-renewal by 6-30 folds. Increased expression of mir-125a can be used to expand HSC ex vivo and in vivo.

Abstract translation: 本发明的实施方案涉及用于扩增造血干细胞（HSC）自我更新的方法和组合物。 microRNA-125a是HSC自我更新的主要控制。 mir-125a的表达增加使HSC自我更新增加6-30倍。 mir-125a的增加的表达可用于离体和体内扩增HSC。

公开(公告)号：US20110270509A1

公开(公告)日：2011-11-03

申请号：US12769308

申请日：2010-04-28

Applicant: Christopher E. Whitney ,  Jun Lu ,  Michael J. Pitsch ,  Ryan Goode ,  Krishnendu Kar

Inventor： Christopher E. Whitney ,  Jun Lu ,  Michael J. Pitsch ,  Ryan Goode ,  Krishnendu Kar

IPC: F02D41/30 ,  F02P5/04

CPC classification number: F02D41/1497 ,  B60K6/20 ,  F02D13/0219 ,  F02D29/02 ,  F02D41/0087 ,  F02D41/123 ,  F02D41/307 ,  F02D2250/21 ,  F02D2250/22 ,  F02M26/05 ,  F02P5/045 ,  Y02T10/18

Abstract: An engine control system includes a fuel cutoff (FCO) module, a fuel control module, and a spark control module. The FCO module, when a FCO event is disabled, determines a feed-forward (FF) number of cylinders to offset a delay period associated with supplying fuel to the cylinders of an engine and selectively maintains a FCO torque request at a predetermined torque. The fuel control module commands fuel be supplied to the FF number of cylinders of the engine when the FCO event is disabled. The spark control module maintains a spark timing of the FF number of cylinders at a fully retarded spark timing based on the FCO torque request.

Abstract translation: 发动机控制系统包括燃料切断（FCO）模块，燃料控制模块和火花控制模块。 当FCO事件被禁用时，FCO模块确定前馈（FF）气缸数，以抵消与向发动机的气缸供应燃料相关联的延迟时段，并且以预定的扭矩选择性地维持FCO扭矩请求。 当FCO事件被禁用时，燃料控制模块将燃油供给到发动机的FF缸数。 火花控制模块基于FCO扭矩请求，在完全延迟的火花定时下维持FF气缸数的火花正时。

公开(公告)号：US20110233746A1

公开(公告)日：2011-09-29

申请号：US12749505

申请日：2010-03-29

Applicant: Kai Liu ,  Lei Shi ,  Jun Lu ,  Anup Bhalla

Inventor： Kai Liu ,  Lei Shi ,  Jun Lu ,  Anup Bhalla

IPC: H01L23/52 ,  H01L21/60

CPC classification number: H01L23/49575 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49537 ,  H01L23/49562 ,  H01L23/49589 ,  H01L24/29 ,  H01L24/32 ,  H01L24/34 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/24247 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49111 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/92246 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099

Abstract: A dual-leadframe multi-chip package comprises a first leadframe with a first die pad, and a second leadframe with a second die pad; a first chip mounted on the first die pad functioning as a high-side MOSFET and second chip mounted on the second die pad functioning as a low-side MOSFET. The package may further comprises a bypass capacity configured as a third chip mounted on the first die pad or integrated with the first chip. The package may further comprise a three-dimensional connecting plate formed as an integrated structure as the second die pad for electrically connecting a top contact area of the first chip to a bottom contact area of the second chip. A top connecting plate connects a top contact area of the second chip and a top contact area of the third chip to an outer pin of the first leadframe.

Abstract translation: 双引线框多芯片封装包括具有第一管芯焊盘的第一引线框架和具有第二管芯焊盘的第二引线框架; 安装在用作高边MOSFET的第一芯片焊盘上的第一芯片和安装在用作低端MOSFET的第二芯片焊盘上的第二芯片。 封装还可以包括配置为安装在第一裸片焊盘上或与第一芯片集成的第三芯片的旁路容量。 封装还可以包括形成为一体结构的三维连接板作为第二芯片焊盘，用于将第一芯片的顶部接触区域电连接到第二芯片的底部接触区域。 顶部连接板将第二芯片的顶部接触区域和第三芯片的顶部接触区域连接到第一引线框架的外部引脚。