公开(公告)号：US20070001293A1

公开(公告)日：2007-01-04

申请号：US11516243

申请日：2006-09-06

Applicant: Tongbi Jiang ,  Li Li ,  William Hiatt

Inventor： Tongbi Jiang ,  Li Li ,  William Hiatt

IPC: H01L23/34

CPC classification number: H01L21/486 ,  H01L21/4803 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/49816 ,  H01L24/10 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81801 ,  H01L2224/83005 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/0032 ,  H05K3/0052 ,  H05K3/0058 ,  H05K3/4644 ,  H05K3/4682 ,  H05K2203/016 ,  H05K2203/0384 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: Methods for creating redistribution layers for only selected dice, such as known good dice, to form relatively thin semiconductor component assemblies and packages, and the assemblies and packages created by the methods, are disclosed. A sacrificial layer is deposited on a support substrate. An etch stop layer having a lower etch is deposited on the sacrificial layer. Redistribution lines in a dielectric material are formed on the support substrate on the etch stop layer. Semiconductor dice, either singulated or at the wafer level, are connected to the redistribution lines. The assembly may be scribed to allow the sacrificial layer to be etched to enable removal of the semiconductor dice and associated redistribution layer from the support substrate. The etch stop layer is removed to allow access to the redistribution lines for conductive bumping.

Abstract translation: 公开了用于仅为所选择的骰子创建再分布层（例如已知的骰子）以形成相对薄的半导体元件组件和封装以及由该方法产生的组件和封装件的方法。 牺牲层沉积在支撑衬底上。 具有较低蚀刻的蚀刻停止层沉积在牺牲层上。 介电材料中的再分布线形成在蚀刻停止层上的支撑衬底上。 单片化或晶圆级的半导体管芯连接到再分配线。 可以对组件进行划线以允许蚀刻牺牲层，以便能够从支撑衬底去除半导体晶片和相关联的再分配层。 去除蚀刻停止层以允许进入用于导电凸起的再分配线。

公开(公告)号：US20060284319A1

公开(公告)日：2006-12-21

申请号：US11452122

申请日：2006-06-13

Applicant: Tongbi Jiang

Inventor： Tongbi Jiang

IPC: H01L23/52

CPC classification number: H01L24/32 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/4951 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/05599 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2224/85399 ,  H01L2224/92147 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10155 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An apparatus and method for preventing damage to tape attachment semiconductor assemblies due to encapsulation filler particles causing damage to a semiconductor die active surface and/or to a corresponding semiconductor substrate surface by providing an adhesive tape which extends across areas of contact between the semiconductor die active surface and the semiconductor substrate. The present invention also includes extending the adhesive tape beyond the areas of contact between the semiconductor die active surface and the semiconductor substrate to provide a visible surface of visual inspection of proper adhesive tape placement.

Abstract translation: 一种用于防止由于包封填料颗粒导致对半导体管芯有源表面和/或相应的半导体衬底表面的损坏而损坏带附接半导体组件的装置和方法，该粘合带延伸穿过半导体管芯激活的接触区域 表面和半导体衬底。 本发明还包括将粘合带延伸超过半导体管芯有源表面和半导体衬底之间的接触区域，以提供目视检查合适的胶带放置的可视表面。

公开(公告)号：US20060220243A1

公开(公告)日：2006-10-05

申请号：US11424502

申请日：2006-06-15

Applicant: Tongbi Jiang ,  Yong Du

Inventor： Tongbi Jiang ,  Yong Du

IPC: H01L23/48

CPC classification number: H01L24/83 ,  H01L23/49816 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48463 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic device package comprises a substrate, a die, and a material having a Young's modulus of between about 0.1 megapascals and about 20 megapascals (at a solder reflow temperature) for attaching the die to the substrate. In one embodiment, the package utilizes a material having a Young's modulus of between about 0.1 megapascals and about 20 megapascals (at a solder reflow temperature) for attaching the die to the substrate. In an alternate embodiment, the package utilizes a material having a coefficient of thermal expansion α2 of less than about 400 (four-hundred) ppm (parts per million)/° C. for attaching the die to the substrate. In another alternate embodiment, the package utilizes a rigid material for attaching the die to the substrate.

Abstract translation: 一种电子器件封装，包括衬底，裸片和具有约0.1兆帕至约20兆帕（焊料回流温度）的杨氏模量的材料，用于将裸片附接到衬底。 在一个实施例中，封装使用具有约0.1兆帕至约20兆帕（在焊料回流温度下）的杨氏模量的材料，用于将管芯附接至基板。 在替代实施例中，封装使用具有小于约400（四百分之一ppm）（百万分之几）/℃的热膨胀系数α2 2的材料，用于将管芯附接到 底物。 在另一个替代实施例中，封装使用刚性材料将裸片附接至基板。

公开(公告)号：US07087116B2

公开(公告)日：2006-08-08

申请号：US10361240

申请日：2003-02-10

Applicant: Walter L. Moden ,  Syed S. Ahmad ,  Gregory M. Chapman ,  Tongbi Jiang

Inventor： Walter L. Moden ,  Syed S. Ahmad ,  Gregory M. Chapman ,  Tongbi Jiang

IPC: B05C3/00

CPC classification number: H01L24/06 ,  H01L21/67132 ,  H01L23/4951 ,  H01L24/27 ,  H01L24/45 ,  H01L24/48 ,  H01L24/743 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method and apparatus for achieving a level exposed surface of a viscous material pool for applying viscous material to at least one semiconductor component by contacting at least a portion of the semiconductor component with viscous material within a reservoir. A level viscous material exposed surface is achieved by using at least one mechanism in association with the reservoir. The mechanism is configured to level the exposed surface of viscous material and maintain the exposed surface at a substantially constant level. The reservoir may be shaped such that the exposed surface of viscous material is supplied to a precise location.

公开(公告)号：US20060159947A1

公开(公告)日：2006-07-20

申请号：US11386208

申请日：2006-03-22

Applicant: Michael Connell ,  Tongbi Jiang

Inventor： Michael Connell ,  Tongbi Jiang

IPC: H01L21/44 ,  H01L21/50

CPC classification number: H01L21/6836 ,  H01L21/6835 ,  H01L21/78 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68322 ,  H01L2221/68327 ,  H01L2224/274 ,  H01L2224/29007 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/07802 ,  H01L2924/14 ,  Y10S438/976 ,  Y10T156/1082 ,  Y10T156/1092 ,  Y10T428/12535 ,  Y10T428/1443 ,  Y10T428/1457 ,  Y10T428/1471 ,  Y10T428/1495 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Manufacture of stacked microelectronic devices is facilitated by producing subassemblies wherein adhesive pads are applied to the back surfaces of a plurality of microelectronic components in a batch fashion. In one embodiment, an adhesive payer is applied on a rear surface of a wafer. A plurality of spaced-apart adhesive pads are defined within the adhesive layer. Each adhesive pad may cover less than the entire back surface area of the component to which it is attached. A mounting member (e.g., dicing tape) may be attached to the adhesive layer and, in some embodiments, the adhesive layer may be treated so that the mounting member is less adherent to the adhesive pads than to other parts of the adhesive layer, easing removal of the adhesive pads with the microelectronic components.

公开(公告)号：US07037756B1

公开(公告)日：2006-05-02

申请号：US10369849

申请日：2003-02-19

Applicant: Tongbi Jiang ,  Michael Connell

Inventor： Tongbi Jiang ,  Michael Connell

IPC: H01L21/50

CPC classification number: H01L24/32 ,  H01L24/33 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Certain methods of the invention permit spacerless manufacture of stacked microelectronic devices by mechanically supporting a second microelectronic component with a wire coating. This wire coating may be sufficiently adhesive to also mechanically bond the second microelectronic component to a first microelectronic component. Other embodiments of the invention provide spacerless stacked microelectronic devices wherein a second microelectronic component is mechanically supported by a wire coating.

Abstract translation: 本发明的某些方法允许通过机械地支撑具有线涂层的第二微电子部件来不间断地制造堆叠的微电子器件。 该线涂层可以是足够的粘合剂，以将第二微电子部件机械地结合到第一微电子部件。 本发明的其它实施例提供了无间隔堆叠的微电子器件，其中第二微电子部件由线涂机械地支撑。

公开(公告)号：US07037751B2

公开(公告)日：2006-05-02

申请号：US10933770

申请日：2004-09-02

Applicant: Michael E. Connell ,  Tongbi Jiang

Inventor： Michael E. Connell ,  Tongbi Jiang

IPC: H01L21/44

CPC classification number: H01L21/6836 ,  H01L21/6835 ,  H01L21/78 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68322 ,  H01L2221/68327 ,  H01L2224/274 ,  H01L2224/29007 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/07802 ,  H01L2924/14 ,  Y10S438/976 ,  Y10T156/1082 ,  Y10T156/1092 ,  Y10T428/12535 ,  Y10T428/1443 ,  Y10T428/1457 ,  Y10T428/1471 ,  Y10T428/1495 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Manufacture of stacked microelectronic devices is facilitated by producing subassemblies wherein adhesive pads are applied to the back surfaces of a plurality of microelectronic components in a batch fashion. In one embodiment, an adhesive payer is applied on a rear surface of a wafer. A plurality of spaced-apart adhesive pads are defined within the adhesive layer. Each adhesive pad may cover less than the entire back surface area of the component to which it is attached. A mounting member (e.g., dicing tape) may be attached to the adhesive layer and, in some embodiments, the adhesive layer may be treated so that the mounting member is less adherent to the adhesive pads than to other parts of the adhesive layer, easing removal of the adhesive pads with the microelectronic components.

Abstract translation: 堆叠的微电子器件的制造通过生产其中粘合垫以批次方式施加到多个微电子部件的背面的子组件而得到促进。 在一个实施例中，粘合剂支付者被施加在晶片的后表面上。 多个间隔开的粘合剂垫限定在粘合剂层内。 每个粘合垫可以覆盖小于其所附接的部件的整个后表面区域。 安装构件（例如，切割带）可以附接到粘合剂层，并且在一些实施例中，可以对粘合剂层进行处理，使得安装构件比粘合剂层的其它部分更不粘附到粘合剂垫，减轻 用微电子部件去除粘合垫。

公开(公告)号：US20060043364A1

公开(公告)日：2006-03-02

申请号：US10928666

申请日：2004-08-26

Applicant: Tongbi Jiang ,  Shijian Luo

Inventor： Tongbi Jiang ,  Shijian Luo

IPC: H01L23/58 ,  H01L21/50

CPC classification number: H01L24/12 ,  H01L23/3114 ,  H01L23/3185 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/94 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10157 ,  H01L2924/14

Abstract: Methods for applying a dielectric protective layer to a wafer in wafer-level chip scale package manufacture. A flowable dielectric protective material with fluxing capability is applied over the active surface of an unbumped semiconductor wafer to cover active device areas, bond pads, test socket contact locations, and optional pre-scribed wafer street trenches. Preformed solder balls are then disposed over the bond pads, and the wafer is subjected to a heating process to reflow the solder balls and at least partially cure the dielectric protective material. During the heating process, the dielectric protective material provides a fluxing capability to enable the solder balls to wet the bond pads. In other exemplary embodiments, the dielectric protective material is applied over only intended physical contact locations and/or pre-scribed wafer street trenches, in which case the dielectric protective material need not include flux material and may additionally include a filler material.

公开(公告)号：US07001795B2

公开(公告)日：2006-02-21

申请号：US10373785

申请日：2003-02-27

Applicant: Tongbi Jiang ,  Michael Connell ,  Jin Li

Inventor： Tongbi Jiang ,  Michael Connell ,  Jin Li

IPC: H01L21/00 ,  H01L31/0232

CPC classification number: H01L27/14625 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14643 ,  H01L27/14685

Abstract: The subject invention is directed to use of photoconductors as conductors of light to photo diodes in a CMOS chip, wherein said photoconductors are separated by at least one low refractive index material (i.e. air). The present invention offers advantages over previous CMOS imaging technology, including enhanced light transmission to photo diodes. The instant methods for producing a CMOS imaging device and CMOS imager system involve minimal power loss. Since no lens is required, the invention eliminates concerns about radius limitation and about damaging lenses during die attach, backgrind, and mount. The invention also provides little or no cross talk between photo diodes.

Abstract translation: 本发明涉及使用光电导体作为CMOS芯片中的光导体的光导体，其中所述光导体由至少一种低折射率材料（即空气）分开。 本发明提供了优于先前CMOS成像技术的优点，包括对光电二极管的增强的光传输。 用于制造CMOS成像装置和CMOS成像器系统的即时方法涉及最小的功率损耗。 由于不需要镜头，本发明消除了对于半径限制以及关于在芯片附着，后研磨和安装期间损坏的透镜的担忧。 本发明还提供了很少或没有光二极管之间的串扰。

公开(公告)号：US20060030078A1

公开(公告)日：2006-02-09

申请号：US11246755

申请日：2005-10-07

Applicant: Tongbi Jiang ,  Mike Connell

Inventor： Tongbi Jiang ,  Mike Connell

IPC: H01L21/78

CPC classification number: H01L21/78 ,  H01L21/31612 ,  H01L21/3185 ,  H01L21/561 ,  H01L21/76802 ,  H01L23/3192 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A substrate including a plurality of integrated circuitry die is fabricated or otherwise provided. The individual die have bond pads. A passivation layer comprising a silicone material is formed over the bond pads. Openings are formed through the silicone material to the bond pads. After the openings are formed, the die are singulated from the substrate. In one implementation, a method of fabricating integrated circuitry includes providing a substrate comprising a plurality of integrated circuitry die. Individual of the die have bond pads. A first blanket passivation layer is formed over the substrate in contact with the bond pads. A different second blanket passivation layer comprising silicone material is formed over the first passivation layer. Openings are formed through the first and second passivation layers to the bond pads. After the openings are formed, the die are singulated from the substrate. Other aspects and implementations are contemplated.

Abstract translation: 制造或提供包括多个集成电路管芯的基板。 单个模具具有接合垫。 在接合焊盘上形成包含硅酮材料的钝化层。 开口通过硅胶材料形成到接合垫。 在形成开口之后，从衬底上分离裸片。 在一个实现中，制造集成电路的方法包括提供包括多个集成电路管芯的衬底。 模具的个体具有接合垫。 第一覆盖钝化层形成在与接合焊盘接触的衬底上。 包含硅树脂材料的不同的第二覆盖钝化层形成在第一钝化层上。 开口通过第一和第二钝化层形成到接合焊盘。 在形成开口之后，从衬底上分离裸片。 考虑了其他方面和实现。