公开(公告)号：US20140021522A1

公开(公告)日：2014-01-23

申请号：US14034440

申请日：2013-09-23

申请人： Megica Corporation

发明人： Mou-Shiung Lin ,  Jin-Yuan Lee

IPC分类号： H01L23/532

CPC分类号： H01L23/5329 ,  H01L23/642 ,  H01L23/645 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19104 ,  H01L2924/30107 ,  H01L2924/3011 ,  Y10T307/406 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/01004

摘要： Chip packages having power management integrated circuits are described. Power management integrated circuits can be combined with on-chip passive devices, and can provide voltage regulation, voltage conversion, dynamic voltage scaling, and battery management or charging. The on-chip passive devices can include inductors, capacitors, or resistors. Power management using a built-in voltage regulator or converter can provide for immediate adjustment of the voltage range to that which is needed. This improvement allows for easier control of electrical devices of different working voltages and decreases response time of electrical devices. Related fabrication techniques are described.

摘要翻译： 描述具有电力管理集成电路的芯片封装。 电源管理集成电路可与片上无源器件相结合，可提供电压调节，电压转换，动态电压调节和电池管理或充电。 片上无源器件可以包括电感器，电容器或电阻器。 使用内置电压调节器或转换器的电源管理可以将电压范围立即调整到所需电压范围。 这种改进允许更容易地控制不同工作电压的电气设备并减少电气设备的响应时间。 描述了相关的制造技术。

公开(公告)号：US08618580B2

公开(公告)日：2013-12-31

申请号：US13735987

申请日：2013-01-07

申请人： Megica Corporation

发明人： Mou-Shiung Lin ,  Jin-Yuan Lee ,  Chien-Kang Chou

IPC分类号： H01L23/52 ,  H01L23/528 ,  H01L21/70

CPC分类号： H01L23/552 ,  H01L21/76816 ,  H01L21/76873 ,  H01L23/5283 ,  H01L23/5286 ,  H01L23/53238 ,  H01L23/5329 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L27/0251 ,  H01L2224/02166 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05664 ,  H01L2224/1148 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48664 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48764 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/48864 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/01039 ,  H01L2924/00 ,  H01L2224/05552

摘要： An integrated circuit chip includes a semiconductor substrate, a first circuit in or coupled to the semiconductor substrate, a second circuit device in or coupled the semiconductor substrate, a dielectric structure coupled the semiconductor substrate, a first interconnecting structure in the dielectric structure, a first pad connected to the first node of the voltage regulator through the first interconnecting structure, a second interconnecting structure in the dielectric structure, a second pad connected to the first node of the analog circuit through the second interconnecting structure, a passivation layer coupled the dielectric structure, wherein multiple openings in the passivation layer exposes the first and second pads, and a third interconnecting structure coupled the passivation layer and coupled the first and second pads.

摘要翻译： 集成电路芯片包括半导体衬底，半导体衬底中或耦合到半导体衬底的第一电路，位于或耦合于半导体衬底的第二电路器件，耦合半导体衬底的电介质结构，电介质结构中的第一互连结构，第一 焊盘通过第一互连结构连接到电压调节器的第一节点，电介质结构中的第二互连结构，通过第二互连结构连接到模拟电路的第一节点的第二焊盘，耦合绝缘结构的钝化层 ，其中所述钝化层中的多个开口暴露所述第一和第二焊盘，并且第三互连结构耦合所述钝化层并且耦合所述第一和第二焊盘。

公开(公告)号：US20130292849A1

公开(公告)日：2013-11-07

申请号：US13935135

申请日：2013-07-03

申请人： MEGICA CORPORATION

发明人： Mou-Shiung LIN ,  Jin-Yuan LEE

IPC分类号： H01L23/48

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/5389 ,  H01L23/60 ,  H01L24/16 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/82 ,  H01L24/94 ,  H01L24/96 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0251 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/24145 ,  H01L2224/24225 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/9202 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2924/013

摘要： System-in packages, or multichip modules, are described which can include multi-layer chips and multi-layer dummy substrates over a carrier, multiple through vias blindly or completely through the multi-layer chips and completely through the multi-layer dummy substrates, multiple metal plugs in the through vias, and multiple metal interconnects, connected to the metal plugs, between the multi-layer chips. The multi-layer chips can be connected to each other or to an external circuit or structure, such as mother board, ball grid array (BGA) substrate, printed circuit board, metal substrate, glass substrate, or ceramic substrate, through the metal plugs and the metal interconnects.

摘要翻译： 描述了系统包装或多芯片模块，其可以包括载体上的多层芯片和多层虚拟衬底，多个通孔盲目或完全穿过多层芯片并完全通过多层虚拟衬底， 通孔中的多个金属插头以及连接到金属插头的多层芯片之间的多个金属互连。 多层芯片可以通过金属插头彼此连接或外部电路或结构，例如母板，球栅阵列（BGA）基板，印刷电路板，金属基板，玻璃基板或陶瓷基板 和金属互连。

公开(公告)号：US20130214387A1

公开(公告)日：2013-08-22

申请号：US13851050

申请日：2013-03-26

申请人： Megica Corporation

发明人： Mou-Shiung Lin

IPC分类号： H01L27/04 ,  H01L21/82

CPC分类号： H01L27/04 ,  H01L21/768 ,  H01L21/82 ,  H01L23/5222 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/5286 ,  H01L23/5329 ,  H01L23/60 ,  H01L23/642 ,  H01L23/645 ,  H01L23/647 ,  H01L27/0676 ,  H01L27/08 ,  H01L28/20 ,  H01L2924/0002 ,  H01L2924/15174 ,  H01L2924/19104 ,  H01L2924/00

摘要： The present disclosure provides a method for forming a chip structure with a resistor. A semiconductor substrate is provided and has a surface. A plurality of electronic devices and a resistor is formed on the surface of the semiconductor substrate. A plurality of dielectric layers and a plurality of circuit layers are formed over the semiconductor substrate. The dielectric layers are stacked over the semiconductor substrate and have a plurality of via holes. Each of the circuit layers is disposed on corresponding one of the dielectric layers respectively, wherein the circuit layers are electrically connected with each other through the via holes and are electrically connected to the electronic devices. A passivation layer is formed over the dielectric layers and the circuit layers. A circuit line is formed over the passivation layer, wherein the circuit line passes through the passivation layer and is electrically connected to the resistor.

摘要翻译： 本公开提供了一种用电阻器形成芯片结构的方法。 提供半导体衬底并具有表面。 在半导体衬底的表面上形成多个电子器件和电阻器。 在半导体衬底上形成多个电介质层和多个电路层。 电介质层堆叠在半导体衬底上并具有多个通孔。 电路层中的每一个分别设置在相应的一个电介质层上，其中电路层通过通孔彼此电连接并与电子器件电连接。 在电介质层和电路层上形成钝化层。 在钝化层上形成电路线，其中电路线通过钝化层并与电阻器电连接。