公开(公告)号：US20090149219A1

公开(公告)日：2009-06-11

申请号：US12267808

申请日：2008-11-10

申请人： Do Young RHEE ,  Jeong Seok Lee ,  Seong Min Seo ,  Tae Mi Kim

发明人： Do Young RHEE ,  Jeong Seok Lee ,  Seong Min Seo ,  Tae Mi Kim

IPC分类号： H04B1/38

CPC分类号： H04M1/7253 ,  H04M1/0285 ,  H04M2250/12

摘要： A mobile input device of a mobile terminal includes: a selection unit for selecting an application program of the mobile terminal; an execution instruction unit for generating an instruction to execute the application program; and a wireless communication unit for transmitting the instruction to execute to the mobile terminal, wherein the mobile input device inputs information to the executed application program.

摘要翻译： 移动终端的移动输入装置包括：选择单元，用于选择移动终端的应用程序; 执行指令单元，用于生成执行应用程序的指令; 以及用于向所述移动终端发送要执行的指令的无线通信单元，其中，所述移动输入设备向所执行的应用程序输入信息。

公开(公告)号：US07446422B1

公开(公告)日：2008-11-04

申请号：US11115579

申请日：2005-04-26

申请人： Jong Sik Paek ,  Sung Su Park ,  Seong Min Seo

发明人： Jong Sik Paek ,  Sung Su Park ,  Seong Min Seo

IPC分类号： H01L29/40

CPC分类号： H01L23/3114 ,  H01L23/525 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/0236 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05541 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/11334 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13021 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/207 ,  H01L2224/05552

摘要： Disclosed are a wafer level chip scale package and a method for manufacturing the same. An RDL is formed on a semiconductor die through a sputtering process, and a UBM is formed on the RDL through an electroplating process by using the RDL as a seed layer. Thus, the RDL sputtering, UBM electroplating, RDL etching and leakage descum processes are carried out only one time, thereby simplifying the structure and manufacturing processes of the package. Since a copper layer of the RDL is formed with a relatively large thickness through the sputtering process, current density is uniformly distributed during the electroplating process, so it is possible to uniformly form the thickness of the UBM by using pure nickel.

摘要翻译： 公开了一种晶片级芯片级封装及其制造方法。 通过溅射工艺在半导体管芯上形成RDL，通过使用RDL作为种子层，通过电镀工艺在RDL上形成UBM。 因此，RDL溅射，UBM电镀，RDL蚀刻和泄漏除去过程仅进行一次，从而简化了封装的结构和制造工艺。 由于RDL的铜层通过溅射工艺形成相对较大的厚度，因此在电镀工艺期间电流密度均匀分布，因此可以通过使用纯镍均匀地形成UBM的厚度。

公开(公告)号：US07362038B1

公开(公告)日：2008-04-22

申请号：US11108359

申请日：2005-04-18

申请人： Ho Cheol Jang ,  Choon Heung Lee ,  Seong Min Seo

发明人： Ho Cheol Jang ,  Choon Heung Lee ,  Seong Min Seo

IPC分类号： H01L41/08

CPC分类号： H03H9/1085 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/181 ,  H01L2924/19105 ,  H03H9/0542 ,  H03H9/059 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A surface acoustic wave (SAW) device package and method for packaging a SAW device provide a surface excited device having a small footprint, low cost and streamlined manufacturing process. A substrate including a SAW active area on a first side is interconnected to external circuits and mechanically mounted via a plurality of metal pillars and an outer metal sealing wall. The sealing wall additionally provides protection from external environmental contamination and interference. The sealing wall may include a number of gaps to reduce stress due to differences in thermal expansion coefficients between the SAW substrate and the metal sealing wall and the gaps may be filled with a flexible sealant. The metal pillars may be round, square or other suitable shape and solder bump terminals may be added to the ends of the pillars and the bottom edge of the sealing wall.

摘要翻译： 用于封装SAW器件的表面声波（SAW）器件封装和方法提供具有小占地面积，低成本和流线型制造工艺的表面激励器件。 包括在第一侧上的SAW有源区的衬底互连到外部电路，并通过多个金属柱和外部金属密封壁机械地安装。 密封壁还提供防止外部环境污染和干扰的保护。 密封壁可以包括多个间隙，以减少由于SAW基底和金属密封壁之间的热膨胀系数的差异而产生的应力，并且间隙可填充有柔性密封剂。 金属支柱可以是圆形，正方形或其它合适的形状，并且焊料凸块端子可以被添加到柱的端部和密封壁的底部边缘。

公开(公告)号：US06987319B1

公开(公告)日：2006-01-17

申请号：US11006210

申请日：2004-12-06

申请人： Jong Sik Paek ,  In Bae Park ,  Seong Min Seo

发明人： Jong Sik Paek ,  In Bae Park ,  Seong Min Seo

IPC分类号： H01L23/485 ,  H01L21/60

CPC分类号： H01L24/03 ,  H01L23/3114 ,  H01L23/3192 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/11334 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/19041

摘要： A wafer-level chip-scale package includes a semiconductor die having planar top and bottom surfaces and a plurality of metal pads formed at the top surface in an area array. A first protective layer is formed on the top surface of the semiconductor die, the first protective layer having a plurality of first apertures for allowing the metal pads to be opened upward. A second protective layer is formed on a surface of the first protective layer, the second protective layer having a plurality of second apertures which are larger than and overly corresponding first apertures of the first protective layer so that regions of the metal pads and the first protective layer are exposed to the outside of the semiconductor die. Solder balls are fused to each metal pad, which are opened to the outside through the first apertures of the first protective layer and the second apertures of the second protective layer.

摘要翻译： 晶片级芯片级封装包括具有平面顶表面和底表面的半导体管芯和在区域阵列中形成在顶表面处的多个金属焊盘。 第一保护层形成在半导体管芯的顶表面上，第一保护层具有多个用于允许金属焊盘向上打开的第一孔。 在所述第一保护层的表面上形成第二保护层，所述第二保护层具有多个第二孔，所述多个第二孔大于所述第一保护层的第一孔，并且过度相应地使所述金属垫和所述第一保护层 层暴露于半导体管芯的外部。 焊球与每个金属焊盘熔合，每个金属焊盘通过第一保护层的第一孔和第二保护层的第二孔向外开口。

公开(公告)号：US06953988B2

公开(公告)日：2005-10-11

申请号：US10944241

申请日：2004-09-17

申请人： Seong Min Seo ,  Young Suk Chung ,  Jong Sik Paek ,  Jae Hun Ku ,  Jae Hak Yee

发明人： Seong Min Seo ,  Young Suk Chung ,  Jong Sik Paek ,  Jae Hun Ku ,  Jae Hak Yee

IPC分类号： H01L23/48 ,  H01L21/60 ,  H01L23/495

CPC分类号： H01L24/83 ,  H01L23/4951 ,  H01L23/49548 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/16245 ,  H01L2224/29101 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73203 ,  H01L2224/73265 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A semiconductor package is disclosed that bonds a semiconductor chip to a leadframe using a flip chip technology. An exemplary semiconductor package includes a semiconductor chip having a plurality of input-output pads at an active surface thereof. A plurality of leads are superimposed by the bond pads and active surface of the semiconductor chip. The leads have at least one exposed surface at a bottom surface of the package body. A plurality of conductive connecting means electrically connect the input-output pads of the chip to the leads. A package body is formed over the semiconductor chip and the conductive connecting means. The bottom surface portions of the leads are exposed to the outside.

摘要翻译： 公开了使用倒装芯片技术将半导体芯片连接到引线框的半导体封装。 示例性半导体封装包括在其有效表面上具有多个输入输出焊盘的半导体芯片。 多个引线由半导体芯片的接合焊盘和有源表面叠加。 引线在封装体的底表面具有至少一个暴露表面。 多个导电连接装置将芯片的输入 - 输出焊盘电连接到引线。 在半导体芯片和导电连接装置上形成封装体。 引线的底面部分暴露在外面。

公开(公告)号：US06858919B2

公开(公告)日：2005-02-22

申请号：US09816852

申请日：2001-03-23

申请人： Seong Min Seo ,  Young Suk Chung ,  Jong Sik Paek ,  Jae Hun Ku ,  Jae Hak Yee

发明人： Seong Min Seo ,  Young Suk Chung ,  Jong Sik Paek ,  Jae Hun Ku ,  Jae Hak Yee

IPC分类号： H01L23/48 ,  H01L21/60 ,  H01L23/495 ,  H01L23/28

CPC分类号： H01L24/83 ,  H01L23/4951 ,  H01L23/49548 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/16245 ,  H01L2224/29101 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73203 ,  H01L2224/73265 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A semiconductor package is disclosed that bonds a semiconductor chip to a leadframe using a flip chip technology. An exemplary semiconductor package includes a semiconductor chip having a plurality of input-output pads at an active surface thereof. A plurality of leads are superimposed by the bond pads and active surface of the semiconductor chip. The leads have at least one exposed surface at a bottom surface of the package body. A plurality of conductive connecting means electrically connect the input-output pads of the chip to the leads. A package body is formed over the semiconductor chip and the conductive connecting means. The bottom surface portions of the leads are exposed to the outside.

公开(公告)号：US20150014830A1

公开(公告)日：2015-01-15

申请号：US14063394

申请日：2013-10-25

申请人： Jong Sik Paek ,  Doo Hyun Park ,  Seong Min Seo ,  Won Chul Do ,  Pil Je Sung ,  Jin Hee Park ,  Do Hyung Kim ,  In Bae Park ,  Chang Min Lee ,  Yong Song ,  SungGeun Kang

发明人： Jong Sik Paek ,  Doo Hyun Park ,  Seong Min Seo ,  Won Chul Do ,  Pil Je Sung ,  Jin Hee Park ,  Do Hyung Kim ,  In Bae Park ,  Chang Min Lee ,  Yong Song ,  SungGeun Kang

IPC分类号： H01L23/538 ,  H01L25/00

CPC分类号： H01L24/03 ,  H01L21/563 ,  H01L23/3114 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/24 ,  H01L24/81 ,  H01L24/82 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02317 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/24146 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73209 ,  H01L2224/73217 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06568 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2224/83

摘要： A semiconductor device utilizing redistribution layers to couple stacked die is disclosed and may include a first semiconductor die with a first surface comprising bond pads, a second surface opposite the first surface, and sloped side surfaces between the first and second surfaces, such that a cross-section of the first die is trapezoidal in shape. A second semiconductor die with a first surface may be bonded to the second surface of the first die, wherein the first surface of the second die may comprise bond pads. A passivation layer may be formed on the first surface and sloped side surfaces of the first die and the first surface of the second die. A redistribution layer may be formed on the passivation layer, electrically coupling bond pads on the first and second die. A conductive pillar may extend from a bond pad on the second die to the second redistribution layer.

摘要翻译： 公开了一种利用再分配层耦合堆叠管芯的半导体器件，其可以包括第一半导体管芯，其具有包括接合焊盘的第一表面，与第一表面相对的第二表面以及第一和第二表面之间的倾斜侧表面， 第一个模具的截面形状为梯形。 具有第一表面的第二半导体管芯可以结合到第一管芯的第二表面，其中第二管芯的第一表面可以包括接合焊盘。 钝化层可以形成在第一模具的第一表面和倾斜的侧表面上以及第二模具的第一表面上。 可以在钝化层上形成再分配层，电耦合第一和第二裸片上的接合焊盘。 导电柱可以从第二管芯上的焊盘延伸到第二再分布层。

公开(公告)号：US20140131856A1

公开(公告)日：2014-05-15

申请号：US13726917

申请日：2012-12-26

申请人： Won Chul Do ,  Doo Hyun Park ,  Jong Sik Paek ,  Ji Hun Lee ,  Seong Min Seo

发明人： Won Chul Do ,  Doo Hyun Park ,  Jong Sik Paek ,  Ji Hun Lee ,  Seong Min Seo

IPC分类号： H01L21/56 ,  H01L23/498

CPC分类号： H01L21/4846 ,  H01L21/481 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/04 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3675 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5384 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0655 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2224/81801 ,  H01L2224/83005 ,  H01L2224/92125 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/1816 ,  H01L2924/18161 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014

摘要： Provided are a semiconductor device including an interposer having a relatively thin thickness without a through silicon via and a method of manufacturing the same. The method of manufacturing a semiconductor device includes forming an interposer including a redistribution layer and a dielectric layer on a dummy substrate, connecting a semiconductor die to the redistribution layer facing an upper portion of the interposer, encapsulating the semiconductor die by using an encapsulation, removing the dummy substrate from the interposer, and connecting a bump to the redistribution layer facing a lower portion of the interposer.

摘要翻译： 提供一种半导体器件及其制造方法，该半导体器件具有不具有通过硅通孔的相对较薄厚度的中介层。 制造半导体器件的方法包括在虚设衬底上形成包括再分配层和电介质层的插入件，将半导体管芯连接到面向插入件上部的再分配层，通过使用封装，去除 所述虚拟衬底从所述插入器连接，并且将凸块连接到面向所述插入件的下部的再分配层。

公开(公告)号：US20110157052A1

公开(公告)日：2011-06-30

申请号：US12977501

申请日：2010-12-23

申请人： Eun-Hwa LEE ,  Yu-Dong Bae ,  Jeong-Seok Lee ,  In-Kuk Yun ,  Seong-Min Seo ,  Po-Ra Kim

发明人： Eun-Hwa LEE ,  Yu-Dong Bae ,  Jeong-Seok Lee ,  In-Kuk Yun ,  Seong-Min Seo ,  Po-Ra Kim

IPC分类号： G06F9/00 ,  G06F3/041 ,  H04W88/02

CPC分类号： G06F1/1626 ,  G06F3/016 ,  G06F2200/1637 ,  G06F2203/013 ,  G06F2203/014

摘要： Control of vibrations generated in a portable terminal is disclosed. The vibration generating apparatus includes a plurality of vibrators mounted to the portable terminal to be spaced apart from each other by a predetermined interval and having different resonance frequencies; and a control unit configured to determine vibration generation patterns of the plurality of vibrators according to a vibration event and to drive the plurality of vibrators according to the vibration generation patterns.

摘要翻译： 公开了在便携式终端中产生的振动的控制。 振动发生装置包括安装在便携式终端上的多个振动器，以彼此隔开预定的间隔并具有不同的共振频率; 以及控制单元，被配置为根据振动事件确定多个振动器的振动产生模式，并且根据振动产生模式来驱动多个振动器。

公开(公告)号：US20080074156A1

公开(公告)日：2008-03-27

申请号：US11737777

申请日：2007-04-20

申请人： Ja-Won SEO ,  Seong-Min Seo

发明人： Ja-Won SEO ,  Seong-Min Seo

IPC分类号： H03B1/00

CPC分类号： H01S5/042 ,  H01S5/0427

摘要： Disclosed is a current driving type light source driving circuit in a CMOS optical transmitter, the current driving type light source driving circuit including a constant current source adjusted by bias voltage to supply operating current, first and second circuit units operating based on a differential input signal received from the constant current source and an external source, a light source for converting the input signal into an output optical signal and a load device for uniformly adjusting a load of the light source.

摘要翻译： 公开了一种CMOS光发射机中的电流驱动型光源驱动电路，该电流驱动型光源驱动电路包括通过偏置电压调节的恒流源以提供工作电流，第一和第二电路单元基于差分输入信号 从恒流源和外部源接收的光源，用于将输入信号转换为输出光信号的光源和用于均匀调整光源负载的负载装置。