公开(公告)号：US06888256B2

公开(公告)日：2005-05-03

申请号：US10032941

申请日：2001-10-31

申请人： Harry Hedler ,  Thorsten Meyer ,  Barbara Vasquez

发明人： Harry Hedler ,  Thorsten Meyer ,  Barbara Vasquez

IPC分类号： B81B7/00 ,  G01R31/28 ,  H01L21/68 ,  H01L23/13 ,  H01L23/48 ,  H01L23/40 ,  H01L23/52

CPC分类号： B81B7/0048 ,  G01R31/2863 ,  H01L21/6835 ,  H01L23/13 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/31 ,  H01L24/81 ,  H01L24/90 ,  H01L24/94 ,  H01L24/96 ,  H01L2221/68359 ,  H01L2224/02319 ,  H01L2224/02335 ,  H01L2224/0236 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/06136 ,  H01L2224/11003 ,  H01L2224/13099 ,  H01L2224/81801 ,  H01L2224/83194 ,  H01L2224/90 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/29099

摘要： A semiconductor structure includes a semiconductor substrate and a compliant interconnect element disposed on a first surface of the substrate. The compliant interconnect element defines a chamber between the first surface of the substrate and a surface of the compliant interconnect element. The compliant interconnect element can be a compliant layer. The compliant layer can be formed of a polymer, such as silicone. A conductive layer can be disposed on the compliant layer, in contact with a contact pad on the semiconductor substrate. A method for forming a semiconductor structure includes providing a semiconductor substrate and providing a compliant interconnect element on a first surface of the substrate, so that the compliant interconnect element defines a chamber between the compliant interconnect element and the first surface of the substrate.

摘要翻译： 半导体结构包括半导体衬底和布置在衬底的第一表面上的柔性互连元件。 柔性互连元件在衬底的第一表面和柔性互连元件的表面之间限定腔室。 兼容互连元件可以是兼容层。 柔性层可以由聚合物形成，例如聚硅氧烷。 导电层可以设置在柔性层上，与半导体衬底上的接触垫接触。 一种用于形成半导体结构的方法包括提供半导体衬底并在衬底的第一表面上提供柔性互连元件，使得柔性互连元件在柔性互连元件和衬底的第一表面之间限定腔室。

公开(公告)号：US06727576B2

公开(公告)日：2004-04-27

申请号：US10044000

申请日：2001-10-31

申请人： Harry Hedler ,  Thorsten Meyer ,  Barbara Vasquez

发明人： Harry Hedler ,  Thorsten Meyer ,  Barbara Vasquez

IPC分类号： H11L2302

CPC分类号： H01L21/568 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/5389 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/97 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/06136 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/73267 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00

摘要： A semiconductor structure and a method for forming the semiconductor structure, including a semiconductor chip and a conductive layer disposed over a portion of the chip, the conductive layer having a portion that extends beyond an edge of the chip. The chip includes a device, which can be an integrated circuit or a micro-mechanical device. The structure can also include a front layer extending beyond the edge of the chip, the conductive layer being disposed on the front layer.

摘要翻译： 一种用于形成半导体结构的半导体结构和方法，包括设置在芯片的一部分上的半导体芯片和导电层，该导电层具有延伸超出芯片边缘的部分。 该芯片包括可以是集成电路或微机械装置的装置。 该结构还可以包括延伸超过芯片边缘的前层，导电层设置在前层上。

公开(公告)号：US06916185B2

公开(公告)日：2005-07-12

申请号：US10464429

申请日：2003-06-18

申请人： Harry Hedler ,  Barbara Vasquez

发明人： Harry Hedler ,  Barbara Vasquez

IPC分类号： H01L23/48 ,  H01L21/60 ,  H05K3/34 ,  H01R12/00 ,  H05K1/00

CPC分类号： H01L24/81 ,  H01L24/14 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14505 ,  H01L2224/16106 ,  H01L2224/17517 ,  H01L2224/81136 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3436 ,  H05K2201/09781 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2224/05599 ,  H01L2224/05099

摘要： The present invention provides a method of connecting an integrated circuit to a substrate and a corresponding circuit arrangement. Connecting occurs by performing the steps of: providing a main area (HF1) of the integrated circuit (1), which has an electrical contacting region (2), with a mechanical supporting structure (3a, 3b; 33a, 33b, 33c; 43a, 43b, 43c); providing a solderable surface region (5a, 5b; 35a, 35b, 35c; 60a, 60b, 60c) of the mechanical supporting structure (3a, 3b; 33a, 33b, 33c; 43a, 43b, 43c); providing a solderable terminal region (10; 5, 30; 40, 50), which is electrically connected to the electrical contacting region (2), on the main area (HF1) of the integrated circuit (1); providing a main area (HF2) of the substrate (20) with a first soldering region (22′, 23′; 22′, 23′, 22″, 23″), which can be aligned with the solderable surface regions (5a, 5b; 35a, 35b, 35c; 60a, 60b, 60c), and with a second soldering region (22, 23), which can be aligned with the solderable terminal region (10; 5, 30; 40, 50); and simultaneous soldering of the surface regions (5a, 5b; 35a, 35b, 35c; 60a, 60b, 60c) to the first soldering region (22′, 23′; 22′, 23′, 22″, 23″) and of the terminal region (10; 5, 30; 40, 50) to the second soldering region (22, 23).

摘要翻译： 本发明提供了一种将集成电路连接到基板和相应的电路装置的方法。 通过执行以下步骤进行连接：提供具有电接触区域（2）的集成电路（1）的主区域（HF 1），其具有机械支撑结构（3a，3b; 33a，33b b，33c; 43a，43b，43c）; 提供机械支撑结构（3a，3b; 33a，33b，33c）的可焊接表面区域（5a，5b; 35a，35b，35c; 60a，60b，60c） ; 43 a，43 b，43 c）; 在所述集成电路（1）的主区域（HF 1）上提供与所述电接触区域（2）电连接的可焊接终端区域（10; 5,30; 40,50） 通过第一焊接区域（22'，23'; 22'，23'，22“，23”）提供基板（20）的主区域（HF 2），其可与可焊接表面区域 （5a，5b; 35a，35b，35c; 60a，60b，60c）以及可与可焊接终端区域（10; ...）对齐的第二焊接区域（22,23） 5，30; 40，50）; 以及将所述表面区域（5a，5b; 35a，35b，35c; 60a，60b，60c）同时焊接到所述第一焊接区域（22'，23'; 22'，23' 22“，23”）和端子区域（10; 5,30; 40,50）连接到第二焊接区域（22,23）。

公开(公告)号：US06744127B2

公开(公告)日：2004-06-01

申请号：US10159848

申请日：2002-05-31

申请人： Harry Hedler ,  Jochen Müller ,  Barbara Vasquez

发明人： Harry Hedler ,  Jochen Müller ,  Barbara Vasquez

IPC分类号： H01L2302

CPC分类号： H01L25/0657 ,  G11C29/48 ,  G11C29/56 ,  H01L25/0652 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2224/0401

摘要： A lowermost layer of control chips carries on it layers of memory chips. The memory chips are contacted via looped-through contacts that reach from one side of the other side of the memory chips and they are driven by the control chips that contain the test circuit for the memory chips.

摘要翻译： 最底层的控制芯片承载着多层存储器芯片。 存储器芯片通过从存储器芯片的另一侧的一侧到达的环形触点接触，并且它们由包含用于存储器芯片的测试电路的控制芯片驱动。

公开(公告)号：US07074696B1

公开(公告)日：2006-07-11

申请号：US10630632

申请日：2003-07-29

申请人： Gerd Frankowsky ,  Harry Hedler ,  Barbara Vasquez

发明人： Gerd Frankowsky ,  Harry Hedler ,  Barbara Vasquez

IPC分类号： H01L21/00 ,  H01L21/44 ,  H01L21/46

CPC分类号： H01L25/50 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2224/05599

摘要： The present invention provides a method for fabricating semiconductor circuit modules having the following steps: application of a patterned connection layer to a transfer substrate, application of active circuit devices and/or passive circuit devices with contact areas pointing toward the patterned connection layer, connection of the circuit devices to one another by means of a filler at least between the circuit devices, removal of the transfer substrate, and application of electrical connection devices for selective contact connection of the contact area of the circuit devices to one another.

摘要翻译： 本发明提供了一种制造半导体电路模块的方法，其具有以下步骤：将图案化连接层应用于转移衬底，施加有接触区域指向图案化连接层的有源电路器件和/或无源电路器件， 至少在电路装置之间通过填料相互连接的电路装置，去除转移基板以及施加用于使电路装置的接触区域彼此选择性接触连接的电连接装置。

公开(公告)号：US06861291B2

公开(公告)日：2005-03-01

申请号：US10135273

申请日：2002-04-30

申请人： Harry Hedler ,  Barbara Vasquez ,  Roland Irsigler

发明人： Harry Hedler ,  Barbara Vasquez ,  Roland Irsigler

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L23/498 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L24/29 ,  H01L23/49811 ,  H01L24/12 ,  H01L24/83 ,  H01L2224/13099 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29369 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/07811 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

摘要： A contact connection between a semiconductor chip and a substrate has a conductive adhesive extending between each contact of the chip and the substrate. The conductive adhesive includes a matrix component, a filler component, a hardener component and at least one decomposable component so that after curing at a curing temperature T1, the adhesive can be decomposed either by applying thermal energy at a temperature T2>T1 or by radiation so that the two contact surfaces can be separated smoothly. After separation the purposes of replacing a defective semiconductor chip, a second chip can be mechanically connected by applying the adhesive and curing it.

摘要翻译： 半导体芯片和基板之间的接触连接具有在芯片的每个接触件和基板之间延伸的导电粘合剂。 导电粘合剂包括基质组分，填料组分，硬化剂组分和至少一种可分解​​组分，使得在固化温度T1固化后，粘合剂可以通过在温度T2> T1或辐射下施加热能来分解 使得两个接触表面可以平滑地分离。 分离后更换有缺陷的半导体芯片的目的，可以通过施加粘合剂并固化第二芯片来机械地连接第二芯片。

公开(公告)号：US06756540B2

公开(公告)日：2004-06-29

申请号：US10155337

申请日：2002-05-24

申请人： Harry Hedler ,  Barbara Vasquez

发明人： Harry Hedler ,  Barbara Vasquez

IPC分类号： H01R909

CPC分类号： H01L24/98 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/72 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L24/91 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/10165 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/14505 ,  H01L2224/16237 ,  H01L2224/17517 ,  H01L2224/29019 ,  H01L2224/73103 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81141 ,  H01L2224/81899 ,  H01L2224/81901 ,  H01L2224/81903 ,  H01L2224/83898 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/72

摘要： An integrated circuit (chip) with attachment elements for attaching of the chip on a carrier, the attachment elements being designed in a way such that they can enter into a releasable connection with corresponding attachment elements formed on the carrier. To keep the package size of the chips as small as possible, the attachment elements are arranged directly on the unpackaged chip.

摘要翻译： 具有用于将芯片附接到载体上的附接元件的集成电路（芯片），附接元件被设计成使得它们能够进入与形成在载体上的相应附接元件的可释放连接。 为了保持芯片的封装尺寸尽可能小，连接元件直接布置在未封装的芯片上。

公开(公告)号：US06638870B2

公开(公告)日：2003-10-28

申请号：US10044136

申请日：2002-01-10

申请人： Axel Brintzinger ,  Barbara Vasquez ,  Harry Hedler

发明人： Axel Brintzinger ,  Barbara Vasquez ,  Harry Hedler

IPC分类号： H01L21311

CPC分类号： H01L24/10 ,  H01L22/34 ,  H01L24/13 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00

摘要： A method for fabricating a structure on an integrated circuit (IC) wafer, includes providing a material onto a surface of the wafer and shaping the material to have a shape corresponding to the structure. The method can also include removing a remaining portion of the material, depositing a seed layer onto the wafer and the material, and depositing a photoresist on the wafer. In addition, the method can include depositing a metal layer on top of the seed layer, removing the photoresist, etching the seed layer, and etching the material. The resulting structure is usable as a compression stop, a compliant element or a rerouting layer or a combination thereof.

摘要翻译： 一种用于在集成电路（IC）晶片上制造结构的方法，包括在晶片的表面上提供材料并使材料成形以具有与该结构相对应的形状。 该方法还可以包括去除材料的剩余部分，将晶种层沉积到晶片和材料上，以及在晶片上沉积光致抗蚀剂。 此外，该方法可以包括在种子层的顶部上沉积金属层，去除光致抗蚀剂，蚀刻种子层和蚀刻材料。 所得到的结构可用作压缩止挡，柔性元件或重路由层或其组合。

公开(公告)号：US07338843B2

公开(公告)日：2008-03-04

申请号：US10477967

申请日：2002-05-13

申请人： Harry Hedler ,  Roland Irsigler ,  Barbara Vasquez

发明人： Harry Hedler ,  Roland Irsigler ,  Barbara Vasquez

IPC分类号： H01L21/326 ,  H01L21/479 ,  H01L21/44

CPC分类号： H01L22/22 ,  H01L23/525 ,  H01L23/5258 ,  H01L2924/0002 ,  Y10S438/94 ,  H01L2924/00

摘要： A method for producing an electronic component, especially a memory chip, using a laser-induced correction to equalize an integrated circuit by means of at least one laser via in a layer at least partially covering the circuit. The component comprises a rewiring of the contact pads. The inventive method comprises the following steps: each laser via is closed by means of a separate covering layer which is to be applied locally; a rewiring extending between the local covering layers is created; the local covering layers are removed; and the laser-induced correction is carried out by means of the open laser vias.

摘要翻译： 一种用于制造电子部件，特别是存储芯片的方法，其使用激光诱导校正，以至少部分地覆盖电路的层中的至少一个激光通孔来均衡集成电路。 该部件包括接线垫的重新布线。 本发明的方法包括以下步骤：通过局部施加的单独的覆盖层封闭每个激光通孔; 创建在局部覆盖层之间延伸的重新布线; 移除局部覆盖层; 并且通过开放的激光通孔进行激光诱导的校正。

公开(公告)号：US06919232B2

公开(公告)日：2005-07-19

申请号：US10284649

申请日：2002-10-31

申请人： Harry Hedler ,  Roland Irsigler ,  Barbara Vasquez

发明人： Harry Hedler ,  Roland Irsigler ,  Barbara Vasquez

IPC分类号： H01L23/04 ,  H01L21/56 ,  H01L21/68 ,  H01L23/31 ,  H01L23/485 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L21/568 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3114 ,  H01L24/10 ,  H01L24/13 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0102 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/00

摘要： A process for producing a semiconductor chip having contact elements protruding on one chip side within the context of wafer level packaging, the chip side provided with the contact elements being coated with a covering compound forming a protective layer, from which the protruding contact element project.

摘要翻译： 一种制造半导体芯片的方法，所述半导体芯片具有在晶片级封装的上下文中在一个芯片侧突出的接触元件，所述芯片侧设置有形成保护层的覆盖化合物，所述覆盖化合物突出接触元件突出。