公开(公告)号：US20200381365A1

公开(公告)日：2020-12-03

申请号：US16994764

申请日：2020-08-17

Applicant: MEDIATEK Inc.

Inventor： Wen-Sung HSU ,  Tao CHENG ,  Nan-Cheng CHEN ,  Che-Ya CHOU ,  Wen-Chou WU ,  Yen-Ju LU ,  Chih-Ming HUNG ,  Wei-Hsiu HSU

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L25/10 ,  H01L23/31 ,  H01L25/065 ,  H01L25/16 ,  H01L23/50 ,  H01L23/498 ,  H01L21/683 ,  H01Q9/04 ,  H01L23/66 ,  H01Q1/22

Abstract: A semiconductor package includes a first substrate, a first layer structure, a second layer structure, a first antenna layer and an electronic component. The first antenna layer is formed on at least one of the first layer structure and the second layer structure, wherein the first antenna layer has an upper surface flush with a layer upper surface of the first layer structure or the second layer structure. The electronic component is disposed on a substrate lower surface of the first substrate and exposed from the first substrate. The first layer structure is formed between the first substrate and the second layer structure.

公开(公告)号：US20180082936A1

公开(公告)日：2018-03-22

申请号：US15700220

申请日：2017-09-11

Applicant: MEDIATEK INC.

Inventor： Shih-Yi SYU ,  Chia-Yu JIN ,  Che-Ya CHOU ,  Wen-Sung HSU ,  Nan-Cheng CHEN

IPC: H01L23/498 ,  H01L23/42 ,  H01L23/64 ,  H01L23/31 ,  H01L21/48

CPC classification number: H01L23/49833 ,  H01L21/4857 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/3675 ,  H01L23/42 ,  H01L23/4334 ,  H01L23/49816 ,  H01L23/642 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/164 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first carrier substrate having a first surface and an opposing second surface. A second carrier substrate is stacked on the first carrier substrate and has a first surface and an opposing second surface that faces the first surface of the first carrier substrate. A semiconductor die is mounted on the first surface of the second carrier substrate. A heat spreader is disposed on the first surface of the first carrier substrate to cover and surround the second carrier substrate and the semiconductor die. A method for forming the semiconductor package structure is also provided.

公开(公告)号：US20160358877A1

公开(公告)日：2016-12-08

申请号：US15238454

申请日：2016-08-16

Applicant: MediaTek Inc.

Inventor： Che-Ya CHOU ,  Wen-Sung HSU ,  Nan-Cheng CHEN

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/367 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L24/16 ,  H01L23/3128 ,  H01L23/3675 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05562 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/12042 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/0376 ,  H05K2201/09472 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A semiconductor package is provided. The semiconductor package includes a semiconductor device bonded to a base through a first conductive structure. The semiconductor device includes a carrier substrate including a conductive trace. A portion of the conductive trace is elongated. The semiconductor device also includes a second conductive structure above the carrier substrate. A portion of the second conductive structure is in contact with the portion of the conductive trace. The semiconductor device further includes a semiconductor body mounted above the conductive trace. The semiconductor body is connected to the second conductive structure.

Abstract translation: 提供半导体封装。 半导体封装包括通过第一导电结构结合到基底的半导体器件。 半导体器件包括包括导电迹线的载体衬底。 导电迹线的一部分是细长的。 半导体器件还包括载体衬底上方的第二导电结构。 第二导电结构的一部分与导电迹线的部分接触。 半导体器件还包括安装在导电迹线上方的半导体本体。 半导体本体连接到第二导电结构。

公开(公告)号：US20160307873A1

公开(公告)日：2016-10-20

申请号：US15006386

申请日：2016-01-26

Applicant: MediaTek Inc.

Inventor： Ying-Chih CHEN ,  Che-Ya CHOU ,  Min-Yu LIN ,  Chia-Hao YANG ,  Wen-Pin CHU

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/544 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L23/3171 ,  H01L23/4821 ,  H01L23/544 ,  H01L24/06 ,  H01L24/09 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L2223/5446 ,  H01L2224/05554 ,  H01L2224/16225 ,  H01L2224/4813 ,  H01L2224/49052 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/45099

Abstract: A semiconductor memory package is provided. The package includes a semiconductor die having a first die portion and a second die portion. A post-passivation layer is on the semiconductor die. A first post-passivation interconnect (PPI) structure includes pluralities of first and second pads arranged in first and second tiers, respectively. The first and second pads are disposed on a first die portion of the semiconductor die. A second PPI structure includes pluralities of third and fourth pads arranged in third and fourth tiers, respectively. The third and fourth pads are disposed on a second die portion of the semiconductor die. One of the first pads and one of the fourth pads are coupled to each other by a first bonding wire. One of the second pads and one of the third pads are coupled to each other.

Abstract translation: 提供半导体存储器封装。 该封装包括具有第一管芯部分和第二管芯部分的半导体管芯。 后半导体裸片上的钝化层。 第一后钝化互连（PPI）结构包括分别布置在第一和第二层中的多个第一和第二焊盘。 第一和第二焊盘设置在半导体管芯的第一管芯部分上。 第二PPI结构分别包括排列在第三和第四层中的多个第三和第四垫。 第三和第四焊盘设置在半导体管芯的第二管芯部分上。 第一焊盘之一和第四焊盘之一通过第一接合线彼此耦合。 第二焊盘中的一个和第三焊盘中的一个彼此耦合。

公开(公告)号：US20160268233A1

公开(公告)日：2016-09-15

申请号：US15012018

申请日：2016-02-01

Applicant: MediaTek Inc.

Inventor： Che-Hung KUO ,  Ying-Chih CHEN ,  Che-Ya CHOU

IPC: H01L25/065

CPC classification number: H01L25/0657 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/06 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/16 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05554 ,  H01L2224/06135 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48265 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/16235 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00

Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first substrate. A first semiconductor die is disposed on the first substrate. A passive device is located directly on the first semiconductor die. The passive device is disposed within a boundary of the first semiconductor die in a plan view.

Abstract translation: 本发明提供一种半导体封装组件。 半导体封装组件包括第一衬底。 第一半导体管芯设置在第一衬底上。 无源器件直接位于第一半导体管芯上。 无源器件在平面图中设置在第一半导体管芯的边界内。