公开(公告)号：US20060046351A1

公开(公告)日：2006-03-02

申请号：US11250356

申请日：2005-10-15

申请人： Todd Bolken ,  Chad Cobbley

发明人： Todd Bolken ,  Chad Cobbley

IPC分类号： H01L21/44 ,  H01L21/50 ,  H01L21/66

CPC分类号： H01L27/14618 ,  B33Y80/00 ,  H01L23/293 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L27/14603 ,  H01L27/14625 ,  H01L27/14683 ,  H01L31/0203 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/8592 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/014 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10S257/924 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00011

摘要： The invention provides methods for packaging for electronic devices that are light or other radiation-sensitive, such as image sensors including CCD or CMOS chips. In one embodiment of the invention, an image sensor package is assembled by surrounding a chip with a barrier of transfer mold compound and covering the chip with a transparent lid. In another embodiment of the invention, the perimeter area of a chip, including interconnections such as wire bonds and bond pads, is encapsulated with a liquid dispensed epoxy, and a transparent lid is attached. In yet another embodiment of the invention, chip encapsulation is accomplished with a unitary shell of entirely transparent material. In yet another embodiment of the invention, a substrate-mounted chip and a transparent lid are loaded into a transfer mold that holds them in optimal alignment. The transfer mold is then filled with molding compound.

摘要翻译： 本发明提供了用于轻或其它辐射敏感的电子设备的封装方法，例如包括CCD或CMOS芯片的图像传感器。 在本发明的一个实施例中，图像传感器封装通过围绕具有转移模具化合物的屏障的芯片组装并用透明盖覆盖芯片来组装。 在本发明的另一个实施例中，芯片的周边区域（包括诸如引线接合和接合焊盘的互连）用液体分配的环氧树脂封装，并且附着有透明盖。 在本发明的另一个实施例中，芯片封装通过完全透明材料的整体外壳完成。 在本发明的另一个实施例中，将衬底安装的芯片和透明盖子装载到转移模具中，以使它们保持最佳对准。 然后用模塑料填充转移模具。

公开(公告)号：US20060006518A1

公开(公告)日：2006-01-12

申请号：US11205572

申请日：2005-08-17

申请人： Todd Bolken ,  Chad Cobbley

发明人： Todd Bolken ,  Chad Cobbley

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  B33Y70/00 ,  B33Y80/00 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85424 ,  H01L2224/8547 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor component includes a substrate and multiple stacked, encapsulated semiconductor dice on the substrate. A first die is back bonded to the substrate and encapsulated in a first encapsulant, and a second die is back bonded to the first encapsulant. The first encapsulant has a planar surface for attaching the second die, and can also include locking features for the second die. The component also includes a second encapsulant encapsulating the second die and forming a protective body for the component. A method for fabricating the component includes the steps of attaching the first die to the substrate, forming the first encapsulant on the first die, attaching the second die to the first encapsulant, and forming the second encapsulant on the second die.

摘要翻译： 半导体部件包括衬底和在衬底上的多个堆叠的，封装的半导体晶片。 将第一管芯重新结合到衬底并封装在第一密封剂中，并且将第二管芯重新结合到第一密封剂上。 第一密封剂具有用于附接第二模具的平坦表面，并且还可以包括用于第二模具的锁定特征。 该组件还包括封装第二模具的第二密封剂并且形成用于该部件的保护体。 一种制造该部件的方法包括以下步骤：将第一管芯附接到基板上，在第一管芯上形成第一密封剂，将第二管芯附接到第一密封剂，以及在第二管芯上形成第二密封剂。

公开(公告)号：US20050106779A1

公开(公告)日：2005-05-19

申请号：US11021175

申请日：2004-12-23

申请人： Todd Bolken ,  Chad Cobbley

发明人： Todd Bolken ,  Chad Cobbley

IPC分类号： H01L23/31 ,  H01L23/538 ,  H01L25/065 ,  H01L25/10 ,  H01L21/44 ,  H01L23/34

CPC分类号： H01L25/50 ,  H01L23/3128 ,  H01L23/5383 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/85424 ,  H01L2224/85444 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： Techniques for fabricating multiple device components. Specifically, techniques for fabricating a stacked package comprising at least one I/C module and a multi-chip package. The multi-chip package includes a plurality of integrated circuit dices coupled to a carrier. The dice are encapsulated such that conductive elements are exposed through the encapsulant. The conductive elements are electrically coupled to the chips. The I/C module comprises an interposer having a plurality of integrated circuit dice disposed thereon. The dice of the I/C module are electrically coupled to the interposer via bondwires. The interposer is configured such that vias are aligned with the conductive elements on the multi-chip package. The multi-chip package and I/C module may be fabricated separately and subsequently coupled together to form a stacked package.

公开(公告)号：US20050059188A1

公开(公告)日：2005-03-17

申请号：US10664845

申请日：2003-09-17

申请人： Todd Bolken ,  Chad Cobbley

发明人： Todd Bolken ,  Chad Cobbley

IPC分类号： H01L21/50 ,  H01L23/31 ,  H01L31/0203

CPC分类号： H01L23/00 ,  B33Y80/00 ,  H01L21/50 ,  H01L23/02 ,  H01L23/3128 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14632 ,  H01L27/14636 ,  H01L27/14687 ,  H01L31/0203 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/16235 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/05599

摘要： Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with backside conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier.

摘要翻译： 用于光学交互式装置的包装组件和以有效方式形成包装组件的方法，其消除或减少工艺污染物的发生。 在第一实施例中，透明盖附着到包含多个光学交互装置的半导体材料的晶片上。 晶片被分离，并且光学交互设备安装在插入器上并与引线键合电连接。 在第二实施例中，光学交互式设备与背面导电元件电连接到插入器。 在第三实施例中，在附加透明盖之前，将光学交互式装置安装到插入器。 在该插入件上方形成一层密封材料，并且切断插入物和密封剂材料以提供单独的包装组件。 在第四实施例中，光学交互式装置安装在预先形成的无引线芯片载体中。

公开(公告)号：US20050023662A1

公开(公告)日：2005-02-03

申请号：US10928978

申请日：2004-08-27

申请人： Todd Bolken ,  Chad Cobbley

发明人： Todd Bolken ,  Chad Cobbley

IPC分类号： H01L23/538 ,  H01L25/065 ,  H01L23/02

CPC分类号： H01L23/5389 ,  H01L24/19 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92144 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401

摘要： A technique for packaging multiple devices to form a multi-chip module. Specifically, a multi-chip package is coupled to an interposer to form the multi-chip module. The multi-chip package includes a plurality of integrated circuit chips coupled to a carrier. The chips are encapsulated such that conductive elements are exposed through the encapsulant. The conductive elements are electrically coupled to the chips. The interposer is configured such that vias are aligned with the conductive elements. Conductive material may be disposed into the vias to provide signal paths from the integrated circuit chips to conductive balls disposed on the backside of the interposer.

摘要翻译： 一种用于封装多个器件以形成多芯片模块的技术。 具体地，多芯片封装耦合到插入器以形成多芯片模块。 多芯片封装包括耦合到载体的多个集成电路芯片。 芯片被封装，使得导电元件通过密封剂暴露。 导电元件电耦合到芯片。 插入器被配置为使得通孔与导电元件对准。 导电材料可以设置在通路中，以提供从集成电路芯片到设置在插入器的背面上的导电球的信号路径。

公开(公告)号：US20060267169A1

公开(公告)日：2006-11-30

申请号：US11481273

申请日：2006-07-05

申请人： Todd Bolken ,  Chad Cobbley

发明人： Todd Bolken ,  Chad Cobbley

IPC分类号： H01L23/02

CPC分类号： H01L27/14618 ,  B33Y80/00 ,  H01L23/293 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L27/14603 ,  H01L27/14625 ,  H01L27/14683 ,  H01L31/0203 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/8592 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/014 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10S257/924 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00011

摘要： The invention provides methods for packaging for electronic devices that are light or other radiation-sensitive, such as image sensors including CCD or CMOS chips. In one embodiment of the invention, an image sensor package is assembled by surrounding a chip with a barrier of transfer mold compound and covering the chip with a transparent lid. In another embodiment of the invention, the perimeter area of a chip, including interconnections such as wire bonds and bond pads, is encapsulated with a liquid dispensed epoxy, and a transparent lid is attached. In yet another embodiment of the invention, chip encapsulation is accomplished with a unitary shell of entirely transparent material. In yet another embodiment of the invention, a substrate-mounted chip and a transparent lid are loaded into a transfer mold that holds them in optimal alignment.

摘要翻译： 本发明提供了用于轻或其它辐射敏感的电子设备的封装方法，例如包括CCD或CMOS芯片的图像传感器。 在本发明的一个实施例中，图像传感器封装通过围绕具有转移模具化合物的屏障的芯片组装并用透明盖覆盖芯片来组装。 在本发明的另一个实施例中，芯片的周边区域（包括诸如引线接合和接合焊盘的互连）用液体分配的环氧树脂封装，并且附着有透明盖。 在本发明的另一个实施例中，芯片封装通过完全透明材料的整体外壳完成。 在本发明的另一个实施例中，将衬底安装的芯片和透明盖子装载到转移模具中，以使它们保持最佳对准。

公开(公告)号：US20060055020A1

公开(公告)日：2006-03-16

申请号：US11268095

申请日：2005-11-07

申请人： Todd Bolken ,  Cary Baerlocher ,  Chad Cobbley ,  David Corisis

发明人： Todd Bolken ,  Cary Baerlocher ,  Chad Cobbley ,  David Corisis

IPC分类号： H01L23/12

CPC分类号： H05K3/303 ,  H01L25/105 ,  H01L25/18 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K2201/10515 ,  H05K2201/10734 ,  H05K2203/167 ,  Y02P70/613 ,  H01L2924/00

摘要： A memory package having a plurality of vertically stacked ball grid arrays. Each of the vertically stacked ball grid arrays has a memory chip coupled thereto. Further, each of the plurality of ball grid arrays includes non-metal mateable alignment features. Each of the plurality of ball grid arrays is coupled to another of the plurality of ball grid arrays to from the vertically stacked memory package.

摘要翻译： 一种具有多个垂直堆叠的球栅阵列的存储器封装。 每个垂直堆叠的球栅阵列具有与其耦合的存储芯片。 此外，多个球栅阵列中的每一个包括非金属可对准的对准特征。 多个球栅阵列中的每一个耦合到多个球栅阵列中的另一个，以从垂直堆叠的存储器封装。

公开(公告)号：US20060023107A1

公开(公告)日：2006-02-02

申请号：US10910491

申请日：2004-08-02

申请人： Todd Bolken ,  Chad Cobbley

发明人： Todd Bolken ,  Chad Cobbley

IPC分类号： H04N5/225

CPC分类号： H04N5/2254 ,  G03B13/02 ,  G03B17/28 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15174 ,  H01L2924/00014

摘要： Microelectronic imagers comprising imaging units and optics units with optics supports having threadless interfaces and methods for packaging such microelectronic imagers are disclosed herein. In one embodiment, the imaging unit can include a microelectronic substrate and a microelectronic die on and/or in the substrate. A first referencing element having one or more inclined steps arranged about an axis is fixed to the imaging unit. The imager can further include an optics unit having an optic member. A second referencing element having one or more complementary inclined steps is fixed to the optics unit. The second referencing element is seated with the first referencing element and at least one of the referencing elements can be rotatably adjusted with respect to the other to position the optic member at a desired location relative to the image sensor.

摘要翻译： 包括具有光学支架的成像单元和光学单元的微电子成像器具有无螺纹接口和用于封装这种微电子成像器的方法。 在一个实施例中，成像单元可以包括微电子衬底和在衬底上和/或衬底中的微电子管芯。 具有围绕轴线布置的一个或多个倾斜台阶的第一参考元件被固定到成像单元。 成像器还可以包括具有光学构件的光学单元。 具有一个或多个互补倾斜台阶的第二参考元件固定到光学单元。 第二参考元件与第一参考元件配合，并且至少一个参考元件可以相对于另一参考元件可旋转地调节，以将光学构件相对于图像传感器定位在期望的位置。

公开(公告)号：US20050057883A1

公开(公告)日：2005-03-17

申请号：US10663959

申请日：2003-09-16

申请人： Todd Bolken ,  Cary Baerlocher ,  Steven Heppler ,  Chad Cobbley

发明人： Todd Bolken ,  Cary Baerlocher ,  Steven Heppler ,  Chad Cobbley

IPC分类号： H01G4/00 ,  H01L21/48 ,  H01L23/055 ,  H01L23/28 ,  H01L27/146 ,  H05K5/06

CPC分类号： H01L23/28 ,  B33Y80/00 ,  H01L21/4803 ,  H01L21/481 ,  H01L21/50 ,  H01L23/055 ,  H01L23/10 ,  H01L23/48 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/484 ,  H01L2224/48997 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/85399 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/00011 ,  H01L2224/45099 ,  H01L2924/00

摘要： Various embodiments for moisture-resistant image sensor packaging structures and methods of assembly are disclosed. Image sensor packages of the present invention include an interposer, a housing structure formed on the interposer for surrounding an image sensor chip, and a transparent cover. The housing structure may cover substantially all of the interposer chip surface. In another embodiment, the housing structure also covers substantially all of the interposer edge surfaces. The housing structure may also cover substantially all of the interposer attachment surface. An image sensor chip is electrically connected to the interposer with sealed wire bond connections or with sealed flip-chip connections. The housing structure may include runners that enable simultaneous sealing of the interior of the image sensor package and of the transparent cover.

公开(公告)号：US20060063283A1

公开(公告)日：2006-03-23

申请号：US11266972

申请日：2005-11-04

申请人： Chad Cobbley ,  Timothy Jackson

发明人： Chad Cobbley ,  Timothy Jackson

IPC分类号： H01L21/66

CPC分类号： H01L25/50 ,  H01L22/20 ,  H01L23/481 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/05599 ,  H01L2224/16 ,  H01L2224/32145 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06579 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  Y10T156/10 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments of the present technique relate to forming die stacks. Specifically, embodiments of the present technique include a method of forming and testing semiconductor die comprising forming a die stack of at least two semiconductor die without attaching either of the at least two semiconductor die to a substrate. Further, present embodiments include testing the semiconductor die in the die stack after the die stack is formed and prior to attaching either of the at least two semiconductor die to the substrate.

摘要翻译： 本技术的实施例涉及形成管芯堆叠。 具体地，本技术的实施例包括形成和测试半导体管芯的方法，其包括在不将至少两个半导体管芯中的任一个连接到衬底上的情况下形成至少两个半导体管芯的管芯堆叠。 此外，本实施例包括在形成管芯堆叠之后并且在将至少两个半导体管芯中的任一个连接到衬底之前，在管芯堆叠中测试半导体管芯。