Abstract:
A semiconductor package includes a semiconductor device, and a wiring board where the semiconductor device is mounted. The semiconductor device includes a semiconductor substrate, a piercing electrode configured to pierce the semiconductor substrate and electrically connect the wiring board and the semiconductor device, and a ring-shaped concave part provided so as to surround the piercing electrode, the ring-shaped concave part being configured to open to a wiring board side of the semiconductor substrate.
Abstract:
Embodiment of invention discloses a system and a method for determining a three-dimensional (3D) location of a folding point of a ray between a point in a scene (PS) and a center of projection (COP) of a camera of a catadioptric system. One embodiment maps the catadioptric system, including 3D locations of the PS and the COP on a two-dimensional (2D) plane defined by an axis of symmetry of a folding optical element and the PS to produce a conic and 2D locations of the PS and COP on the 2D plane, and determines a 2D location of the folding point on the 2D plane based on the conic, the 2D locations of the PS and the COP. Next, the embodiment determines the 3D location of the folding point from the 2D location of the folding point on the 2D plane.
Abstract:
It is a lighting apparatus 10 that has a light emitting element 16, a light emitting element housing 15 having a concave portion 28 that accommodates the light emitting element 16, and an optically transparent member 18 that airproofs a space B formed by the concave portion 28 and transmits light emitted from the light emitting element 16. The concave portion 28 is shaped to become wider toward the optically transparent member 18 from the bottom surface 28A of the concave portion 28. The lighting apparatus 10 is provided with a light shielding member 12 for shielding a part of light emitted from the light emitting element 16 is provided on the optically transparent member 18.
Abstract:
Embodiments of the invention disclose a system and a method for determining a pose of a probe relative to an object by probing the object with the probe, comprising steps of: determining a probability of the pose using Rao-Blackwellized particle filtering, wherein a probability of a location of the pose is represented by a location of each particle, and a probability of an orientation of the pose is represented by a Gaussian distribution over orientation of each particle conditioned on the location of the particle, wherein the determining is performed for each subsequent probing until the probability of the pose concentrates around a particular pose; and estimating the pose of the probe relative to the object based on the particular pose.
Abstract:
Log manipulation by a first administrator is prevented so that the reliability of system auditing can be improved.After receiving a service start request from a management computer, a storage subsystem creates a first resource group regarding which access by a host computer is permitted, and also creates a second resource group regarding which access by the management computer is permitted. The storage subsystem further creates a data storage area, to which data is to be written by the host computer, and makes the data storage area belong to the first resource group, while it also creates a log storage area, in which log information indicating past operation performed on the data storage area by the host computer is to be recorded, and makes the log storage area belong to the second resource group.
Abstract:
In a silicon substrate for a package, a through electrode is provided with which a through hole passing through from a bottom surface of a cavity for accommodating a chip of an electronic device to a back surface of the substrate is filled. An end part of the through electrode in the bottom surface side of the cavity has a connection part to a wiring that forms an electric circuit including the chip of the electronic device. The silicon substrate for a package is characterized in that (1) a thin film wiring is included as the wiring and the connection part is reinforced by a conductor connected to the thin film wiring and/or (2) a wire bonding part is included as the wiring and the connection part is formed by wire bonding the end part of the through electrode in the bottom surface side of the cavity.
Abstract:
The present invention calculates the power consumption of the storage system for each device which supplies power with a storage system, and controls the storage system to keep the power consumption not to exceed the upper limit. In order to achieve this, the power consumption of the chassis configuring the destination storage system is calculated with reference to the number of logical volumes configuring the pool which includes virtual logical volumes, and the logical volumes included in the source storage system are migrated to the virtual logical volumes included in the destination storage system, keeping the power consumption specified in advance per device supplying power to the chassis configuring the destination storage system not to exceed the upper limit value. (Refer to FIG. 27.)
Abstract:
There is provided a logical volume management method for storage system. When a logical volume is created on a flash memory drive, a management computer allocates logical volume while flash memory chip border of flash memory drive is taken into account. Specifically, a table for managing a correlation between each parity group and the flash memory chip of the flash memory drive is obtained and the logical volume is allocated in such a manner that a flash memory chip is not shared by a plurality of logical volumes. When complete erasing of logical volume data is performed, the management computer specifies a flash memory chip on which complete data erasing is to be performed, and the storage system completely erases data exclusively on the chip of interest with a use of a function of completely erasing data at a time by chip unit of the flash memory chip (chip erasing).
Abstract:
A semiconductor package in which an electronic device chip is provided in a cavity of a silicon substrate stacked product constituted by stacking a plurality of silicon substrates.
Abstract:
There is provided a data migrating method including the steps of: calculating, in a case where data stored in a volume is migrated to another volume, a required period of time for migrating the data based on a size of data to be migrated and volume configuration information on the volume in which the migrated data is stored and the volume to which the data is to be migrated; determining a start time at which the data migration starts to generate a volume migration plan; setting a priority of the generated volume migration plan; prioritizing, in a case where a periods of time during which the generated volume migration plan is executed and a period of time during which an existing volume migration plan is executed are overlapped with each other, and changing the start time of at least one of those volume migration plans having a lower priority.