公开(公告)号：US5158003A

公开(公告)日：1992-10-27

申请号：US585304

申请日：1990-09-19

Applicant: Ho Jin Lee

Inventor： Ho Jin Lee

IPC: G10B3/12 ,  G10H1/34

CPC classification number: G10H1/346

Abstract: Keys for an electronic musical instrument which is capable of giving an after-touch effect is disclosed. If a key is pressed, the point contact rubber is also pressed to point-contact-operate the circuit board, and at the same time, the point contact pin of the key is contacted with the point contact rubber, so that its contact with the circuit board should be transmitted to the hand of the player in the form of an after-touch effect.

Abstract translation: 公开了能够产生接触效果的电子乐器的键。 如果按下一个键，点接触橡胶也被按压点接触操作电路板，同时键的点接触针与点接触橡胶接触，使其与 电路板应以后接触效果的形式传输给玩家的手。

公开(公告)号：US09859191B2

公开(公告)日：2018-01-02

申请号：US15065903

申请日：2016-03-10

Applicant: Ho-Jin Lee ,  Byung Lyul Park ,  Jin Ho An

Inventor： Ho-Jin Lee ,  Byung Lyul Park ,  Jin Ho An

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/538 ,  H01L23/31 ,  H01L23/532

CPC classification number: H01L23/481 ,  H01L21/76831 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/53238 ,  H01L23/5384 ,  H01L23/5385 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012

Abstract: A semiconductor device includes a semiconductor substrate, a circuit layer including an interlayer insulating layer on an upper surface of the substrate, and a conductive via penetrating through the interlayer insulating layer and the substrate, and electrically connected to the circuit layer. The device further includes an insulating layer surrounding the conductive via, and located between the conductive via and the substrate and between the conductive via and interlayer insulating layer, and a buffer layer located between the insulating layer and the conductive via, and overlapping at least a portion of the interlayer insulating layer in a depth direction of the conductive via.

公开(公告)号：US20170047270A1

公开(公告)日：2017-02-16

申请号：US15204632

申请日：2016-07-07

Applicant: Ho-Jin Lee ,  Byung Lyul Park ,  Kwangjin Moon ,  Jisoon Park ,  Jin Ho An

Inventor： Ho-Jin Lee ,  Byung Lyul Park ,  Kwangjin Moon ,  Jisoon Park ,  Jin Ho An

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L2224/11 ,  H01L2224/16145 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Provided herein are semiconductor devices with through electrodes and methods of fabricating the same. The methods may include providing a semiconductor substrate having top and bottom surfaces facing each other, forming on the top surface of the semiconductor substrate a main via having a hollow cylindrical structure and a metal line connected to the main via, forming an interlayered insulating layer on the top surface of the semiconductor substrate to cover the main via and the metal line, removing a portion of the semiconductor substrate to form a via hole exposing a portion of a bottom surface of the main via, and forming in the via hole a through electrode that is electrically connected to the main via. The bottom surface of the main via is overlapped by a circumference of the via hole, when viewed in a plan view.

Abstract translation: 本文提供了具有通孔电极的半导体器件及其制造方法。 所述方法可以包括提供具有彼此面对的顶表面和底表面的半导体衬底，在半导体衬底的顶表面上形成具有中空圆柱形结构的主通孔和连接到主通路的金属线，在其上形成层间绝缘层 半导体衬底的顶表面覆盖主通孔和金属线，去除半导体衬底的一部分以形成露出主通孔的底表面的一部分的通孔，并且在通孔中形成通孔 电连接到主通路。 当在平面图中观察时，主通孔的底表面与通孔的圆周重叠。

公开(公告)号：US20160233155A1

公开(公告)日：2016-08-11

申请号：US15130904

申请日：2016-04-15

Applicant: Ho-Jin LEE ,  Tae-Je CHO ,  Dong-Hyeon JANG ,  Ho-Geon SONG ,  Se-Young JEONG ,  Un-Byoung KANG ,  Min-Seung YOON

Inventor： Ho-Jin LEE ,  Tae-Je CHO ,  Dong-Hyeon JANG ,  Ho-Geon SONG ,  Se-Young JEONG ,  Un-Byoung KANG ,  Min-Seung YOON

IPC: H01L23/498 ,  H01L23/48

CPC classification number: H01L23/49844 ,  H01L21/76831 ,  H01L21/76844 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/525 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/05009 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/06544 ,  H01L2924/15311

Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The second surface defines a redistribution trench. The substrate has a via hole extending therethrough. The semiconductor device also includes a through via disposed in the via hole. The through via may include a via hole insulating layer, a barrier layer, sequentially formed on an inner wall of the via hole. The through via may further include a conductive connector adjacent the barrier layer. The semiconductor device additionally includes an insulation layer pattern formed on the second surface of the substrate. The insulation layer pattern defines an opening that exposes a region of a top surface of the through via. The semiconductor devices includes a redistribution layer disposed in the trench and electrically connected to the through via. The insulation layer pattern overlaps a region of the conductive connector.

Abstract translation: 在一个实施例中，半导体器件包括具有第一表面的半导体衬底和与第一表面相对的第二表面。 第二表面限定再分布沟槽。 基板具有贯穿其中的通孔。 半导体器件还包括设置在通孔中的贯通孔。 通孔可以包括依次形成在通孔的内壁上的通孔绝缘层，阻挡层。 通孔还可以包括邻近阻挡层的导电连接器。 半导体器件还包括形成在衬底的第二表面上的绝缘层图案。 绝缘层图案限定了暴露通孔的顶表面的区域的开口。 半导体器件包括设置在沟槽中并与通孔电连接的再分配层。 绝缘层图案与导电连接器的区域重叠。

公开(公告)号：US09153489B2

公开(公告)日：2015-10-06

申请号：US13474992

申请日：2012-05-18

Applicant: Ho-Jin Lee ,  Byung Lyul Park ,  SeYoung Jeong ,  Hyunsoo Chung ,  Gilheyun Choi

Inventor： Ho-Jin Lee ,  Byung Lyul Park ,  SeYoung Jeong ,  Hyunsoo Chung ,  Gilheyun Choi

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/768

CPC classification number: H01L21/76898 ,  H01L21/7682 ,  H01L23/481 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05548 ,  H01L2224/06181 ,  H01L2224/13 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/13025

Abstract: A microelectronic device includes a substrate having a trench extending therethrough between an active surface thereof and an inactive surface thereof opposite the active surface, a conductive via electrode extending through the substrate between sidewalls of the trench, and an insulating layer extending along the inactive surface of the substrate outside the trench and extending at least partially into the trench. The insulating layer defines a gap region in the trench that separates the substrate and the via electrode. Related devices and methods of fabrication are also discussed.

Abstract translation: 微电子器件包括：衬底，其具有在其活性表面与其与有源表面相对的非活性表面之间延伸穿过的沟槽;在沟槽的侧壁之间延伸通过衬底的导电通孔电极，以及沿沟槽的非活性表面延伸的绝缘层 衬底在沟槽外部并且至少部分地延伸到沟槽中。 绝缘层限定沟槽中的间隙区域，其分离衬底和通孔电极。 还讨论了相关装置和制造方法。

公开(公告)号：US09053521B2

公开(公告)日：2015-06-09

申请号：US12929020

申请日：2010-12-22

Applicant: Young-Sun Jeon ,  Ho Jin Lee ,  Joon Hyuk Cha ,  Shi Hwa Lee ,  Young Su Moon ,  Hyun Sang Park

Inventor： Young-Sun Jeon ,  Ho Jin Lee ,  Joon Hyuk Cha ,  Shi Hwa Lee ,  Young Su Moon ,  Hyun Sang Park

IPC: G09G5/36 ,  G06F15/16 ,  G06F15/167 ,  G06T1/00

CPC classification number: G06T1/00

Abstract: An image processing apparatus is provided. The image processing apparatus for image signal processor (ISP) realization may include a Static Random Access Memory (SRAM) for each function module. A unified SRAM to store at least one line data of an input image for each of a plurality of functions modules within the image processing apparatus is further provided.

Abstract translation: 提供一种图像处理装置。 用于图像信号处理器（ISP）实现的图像处理装置可以包括用于每个功能模块的静态随机存取存储器（SRAM）。 还提供了用于存储图像处理装置内的多个功能模块中的每一个的输入图像的至少一行线数据的统一SRAM。

公开(公告)号：US08952543B2

公开(公告)日：2015-02-10

申请号：US13718580

申请日：2012-12-18

Applicant: Ho-Jin Lee ,  Pil-Kyu Kang ,  Kyu-Ha Lee ,  Byung-Lyul Park ,  Hyun-Soo Chung ,  Gil-Heyun Choi

Inventor： Ho-Jin Lee ,  Pil-Kyu Kang ,  Kyu-Ha Lee ,  Byung-Lyul Park ,  Hyun-Soo Chung ,  Gil-Heyun Choi

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/00

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/525 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05568 ,  H01L2224/06181 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A semiconductor device including a lower layer, an insulating layer on a first side of the lower layer, an interconnection structure in the insulating layer, a via structure in the lower layer. The via structure protrudes into the insulating layer and the interconnection structure.

Abstract translation: 一种半导体器件，包括下层，在下层的第一侧上的绝缘层，绝缘层中的互连结构，下层中的通孔结构。 通孔结构突出到绝缘层和互连结构中。

公开(公告)号：US08592988B2

公开(公告)日：2013-11-26

申请号：US13186049

申请日：2011-07-19

Applicant: Ho-Jin Lee ,  Sung-Dong Cho ,  Se-Young Jeong ,  Yeong-Lyeol Park ,  Sin-Woo Kang

Inventor： Ho-Jin Lee ,  Sung-Dong Cho ,  Se-Young Jeong ,  Yeong-Lyeol Park ,  Sin-Woo Kang

IPC: H01L23/48

CPC classification number: H01L21/76898 ,  H01L23/481 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/15311

Abstract: A semiconductor device may include a substrate and a through electrode. The substrate may have a first surface and a second surface opposite to the first surface, the substrate including circuit patterns formed on the first surface. The through electrode penetrates the substrate and may be electrically connected to the circuit pattern, the through electrode including a first plug that extends from the first surface in a thickness direction of the substrate and a second plug that extends from the second surface in the thickness direction of the substrate so as to be connected to the first plug.

Abstract translation: 半导体器件可以包括衬底和通孔。 衬底可以具有与第一表面相对的第一表面和第二表面，所述衬底包括形成在第一表面上的电路图案。 贯通电极穿透基板并且可以电连接到电路图案，所述通孔包括在基板的厚度方向上从第一表面延伸的第一插塞和在厚度方向上从第二表面延伸的第二插塞 以便连接到第一插头。

公开(公告)号：US08564139B2

公开(公告)日：2013-10-22

申请号：US13610068

申请日：2012-09-11

Applicant: Ho-Jin Lee ,  Pil-Kyu Kang ,  Seokho Kim ,  Byung Lyul Park ,  Kyu-Ha Lee ,  Hyunsoo Chung ,  Gilheyun Choi

Inventor： Ho-Jin Lee ,  Pil-Kyu Kang ,  Seokho Kim ,  Byung Lyul Park ,  Kyu-Ha Lee ,  Hyunsoo Chung ,  Gilheyun Choi

IPC: H01L23/48

CPC classification number: H01L23/3192 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L25/0657 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/03916 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05082 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05564 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/05684 ,  H01L2224/06181 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2224/05099 ,  H01L2224/05599 ,  H01L2224/05552

Abstract: Provided are semiconductor devices and methods of manufacturing the same. the device may include a semiconductor substrate, a first conductive pattern provided in the semiconductor substrate to have a first width at a surface level of the semiconductor substrate, a barrier pattern covering the first conductive pattern and having a second width substantially greater than the first width, a second conductive pattern partially covering the barrier pattern and having a third width substantially smaller than the second width, and an insulating pattern disposed on a sidewall of the second conductive pattern. The second width may be substantially equal to or less than to a sum of the third width and a width of the insulating pattern.

Abstract translation: 提供半导体器件及其制造方法。 所述器件可以包括半导体衬底，设置在所述半导体衬底中以在所述半导体衬底的表面电平处具有第一宽度的第一导电图案，覆盖所述第一导电图案并具有基本上大于所述第一宽度的第二宽度的阻挡图案 ，部分地覆盖所述阻挡图案并且具有基本上小于所述第二宽度的第三宽度的第二导电图案，以及设置在所述第二导电图案的侧壁上的绝缘图案。 第二宽度可以基本上等于或小于绝缘图案的第三宽度和宽度之和。

公开(公告)号：US08514770B2

公开(公告)日：2013-08-20

申请号：US12612311

申请日：2009-11-04

Applicant: Hee Wook Kim ,  Kunseok Kang ,  Do-Seob Ahn ,  Ho Jin Lee

Inventor： Hee Wook Kim ,  Kunseok Kang ,  Do-Seob Ahn ,  Ho Jin Lee

IPC: H04B7/185

CPC classification number: H04B7/18589 ,  H04B7/18545

Abstract: Provided is a method of establishing an uplink in a mobile satellite communication system, the method including: receiving a random uplink access signal from terminals included in a coverage of a satellite beam; estimating a location of each of the terminals; calculating an uplink transmission point in time when each of the terminals transmits an uplink signal, based on the estimated location of each of the terminals; transmitting, to each of the terminals, the calculated uplink transmission point in time; and receiving the uplink signal from each of the terminals at the calculated uplink transmission point in time.

Abstract translation: 提供了一种在移动卫星通信系统中建立上行链路的方法，所述方法包括：从包括在卫星波束覆盖范围内的终端接收随机上行接入信号; 估计每个终端的位置; 基于每个终端的估计位置，计算每个终端发送上行链路信号的时间上行链路传输点; 向每个终端发送所计算的上行链路传输点; 并且在所计算的上行链路传输点处接收来自每个终端的上行链路信号。