公开(公告)号：US07511579B2

公开(公告)日：2009-03-31

申请号：US11455730

申请日：2006-06-20

Applicant: Chung-Cheng Wang ,  Chao-Shi Chuang ,  Yi-Chuan Liu

Inventor： Chung-Cheng Wang ,  Chao-Shi Chuang ,  Yi-Chuan Liu

IPC: H03L7/08

CPC classification number: H03L7/113 ,  H03L7/1972

Abstract: A PLL is provided, comprising a first divider, a PFD, a loop filter, a VCO, a second divider and a controller. The first divider receives a reference signal and divides the reference signal by R to obtain a divided signal. The PFD compares the divided signal and a feedback signal to generate a compared The VCO selects one of a plurality of operating curves for oscillation based on a selection signal, and generates an oscillation signal based on an operating voltage generated by signal the loop filter. The second divider divides the oscillation signal by N to obtain the feedback signal. The controller operates in an initial mode to recursively determine the selection signal by calculating differences of the feedback signal and the divided signal. When the selection signal converges to stable, the PLL switches to a normal mode to operate on the corresponding operating curve.

Abstract translation: 提供PLL，包括第一分频器，PFD，环路滤波器，VCO，第二分频器和控制器。 第一分频器接收参考信号并将参考信号除以R以获得分频信号。 PFD比较分频信号和反馈信号以产生比较VCO基于选择信号选择多个用于振荡的操作曲线中的一个，并且基于由环路滤波器的信号产生的工作电压产生振荡信号。 第二分频器将振荡信号除以N以获得反馈信号。 控制器以初始模式工作，通过计算反馈信号和分频信号的差异递归地确定选择信号。 当选择信号收敛到稳定时，PLL切换到正常模式，以对相应的工作曲线进行操作。

公开(公告)号：US07129572B2

公开(公告)日：2006-10-31

申请号：US11199273

申请日：2005-08-09

Applicant: Chung-Cheng Wang

Inventor： Chung-Cheng Wang

IPC: H01L23/02

CPC classification number: H01L24/85 ,  H01L23/13 ,  H01L23/36 ,  H01L23/49833 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/48599 ,  H01L2224/49171 ,  H01L2224/49433 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/351 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

Abstract: A submember for electrical device is disclosed. Said submember is mounted on a chip of electrical device. An embodiment for the submember comprised of an insulator and a plurality of conductive elements, wherein the conductive elements embedded in the insulator and a portion of conductive element exposed to the insulator for electrical connection, then (i). the reliability of submember is enhanced; (ii). the material of insulator enables to be saved; and (iii). the thickness of submember is thinner and the heat dissipation of chip enhanced; moreover, a portion of the conductive element may be protruding the insulator for avoiding a short-circuited problem of conductive wire, moreover, the conductive element may be staircase-shaped, then, not only the reliability of submember is enhanced, but the short circuit problem of conductive wire is also avoided; the conductive element may further include an extending portion, furthermore, the conductive element may be placed in a cavity as required.

Abstract translation: 公开了一种用于电气设备的子部件。 所述子部件安装在电气设备的芯片上。 一种由绝缘体和多个导电元件组成的子元件的实施例，其中嵌入绝缘体中的导电元件和暴露于绝缘体的导电元件的一部分用于电连接，然后（i）。 次级成员的可靠性得到提升; （ii）。 绝缘体材料可以节省; 和（iii）。 子件的厚度较薄，芯片的散热增强; 此外，导电元件的一部分可以突出绝缘体，以避免导线的短路问题，此外，导电元件可以是阶梯形的，因此不仅可以提高子元件的可靠性，而且短路 也避免了导线问题; 导电元件还可以包括延伸部分，此外，导电元件可以根据需要放置在空腔中。

公开(公告)号：US20060097379A1

公开(公告)日：2006-05-11

申请号：US11268702

申请日：2005-11-08

Applicant: Chung-Cheng Wang

Inventor： Chung-Cheng Wang

IPC: H01L23/053 ,  H01L23/12

CPC classification number: H01L23/49805 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Substrate for electrical devices and methods of manufacturing such substrate are disclosed. An embodiment for the substrate comprised of an insulator and a plurality of conductive elements, wherein the conductive elements embedded in the insulator, and two surfaces of the conductive element exposed to two surfaces of the insulator for electrical connection respectively, meanwhile a portion of conductive element may protrude the insulator, in this manner, solder balls are not needed, moreover the conductive element of substrate may further include either an extending portion or a protruding portion, and the present invention may be capable of affording a thinner electrical device thickness, enhanced reliability, and a decreased cost in production.

Abstract translation: 公开了用于电气装置的基板和制造这种基板的方法。 用于由绝缘体和多个导电元件构成的衬底的实施例，其中嵌入绝缘体中的导电元件和暴露于绝缘体的两个表面的两个表面分别电连接，同时导电元件的一部分 可以以这种方式突出绝缘体，因此不需要焊球，此外，衬底的导电元件还可以包括延伸部分或突出部分，并且本发明可以提供更薄的电子器件厚度，增强的可靠性 ，生产成本降低。

公开(公告)号：US20050157819A1

公开(公告)日：2005-07-21

申请号：US11037912

申请日：2005-01-18

Applicant: Chung-Cheng Wang ,  John-San Yang ,  Yu-Hua Liu

Inventor： Chung-Cheng Wang ,  John-San Yang ,  Yu-Hua Liu

IPC: H04L27/36 ,  H04L5/12

CPC classification number: H04L27/364

Abstract: A receiver comprising an in-phase channel circuit, a quadrature channel circuit, and a gain imbalance calibration circuit comprising a first circuit and a second circuit. The first circuit provides testing signals to the in-phase channel circuit and the quadrature channel circuit. Test resultant signals output from the in-phase channel circuit and the quadrature channel circuit are input to the second circuit. The second circuit calibrates the gain of baseband amplifiers of the in-phase channel and the quadrature channel circuit according to the offset between the test resultant signals, thereby enabling the test resultant signal of the in-phase channel circuit to be substantially equal to the test resultant signal of the quadrature channel circuit.

Abstract translation: 一种接收机，包括同相信道电路，正交信道电路和包括第一电路和第二电路的增益不平衡校准电路。 第一个电路向同相通道电路和正交通道电路提供测试信号。 测试从同相通道电路和正交通道电路输出的合成信号输入到第二电路。 第二电路根据测试结果信号之间的偏移来校准同相信道和正交信道电路的基带放大器的增益，从而使得同相信道电路的测试结果信号基本上等于测试 正交信道电路的合成信号。

公开(公告)号：US20110272178A1

公开(公告)日：2011-11-10

申请号：US13188478

申请日：2011-07-22

Applicant: CHUNG-CHENG WANG

Inventor： CHUNG-CHENG WANG

IPC: H05K1/02

CPC classification number: H01L23/49805 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Substrate for electrical devices is disclosed. An embodiment for the substrate comprised of an insulator, a conductive element(s) and a conductive material(s), wherein the conductive element embedded in the insulator, and two surfaces of the conductive element exposed to two surfaces of the insulator for electrical connection respectively, wherein the upper surface of conductive element is below the upper surface of insulator and is plated by the conductive material, meanwhile the conductive element include a protruding portion which is protruded the insulator, in this manner, solder balls are not needed, moreover the conductive element can further include an extending portion; the present invention may be capable of affording a thinner electrical device thickness and enhanced reliability.

Abstract translation: 公开了用于电气设备的基板。 用于由绝缘体，导电元件和导电材料组成的衬底的实施例，其中嵌入绝缘体中的导电元件和暴露于绝缘体的两个表面的两个表面用于电连接 其中导电元件的上表面在绝缘体的上表面下方并被导电材料电镀，同时导电元件包括​​突出绝缘体的突出部分，以这种方式不需要焊球，此外， 导电元件还可以包括延伸部分; 本发明可以提供更薄的电气装置厚度和增强的可靠性。

公开(公告)号：US07994633B2

公开(公告)日：2011-08-09

申请号：US12852458

申请日：2010-08-07

Applicant: Chung-Cheng Wang

Inventor： Chung-Cheng Wang

IPC: H01L23/48 ,  H01L21/48

CPC classification number: H01L23/49805 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Substrate for electrical devices is disclosed. An embodiment for the substrate comprised of an insulator, a conductive element(s) and a conductive material(s), wherein the conductive element embedded in the insulator, and two surfaces of the conductive element exposed to two surfaces of the insulator for electrical connection respectively, wherein the upper surface of conductive element is below the upper surface of insulator and is plated by the conductive material, meanwhile the conductive element include a protruding portion which is protruded the insulator, in this manner, solder balls are not needed, moreover the conductive element can further include an extending portion; the present invention may be capable of affording a thinner electrical device thickness and enhanced reliability.

Abstract translation: 公开了用于电气设备的基板。 用于由绝缘体，导电元件和导电材料组成的衬底的实施例，其中嵌入绝缘体中的导电元件和暴露于绝缘体的两个表面的两个表面用于电连接 其中导电元件的上表面在绝缘体的上表面下方并被导电材料电镀，同时导电元件包括​​突出绝缘体的突出部分，以这种方式不需要焊球，此外， 导电元件还可以包括延伸部分; 本发明可以提供更薄的电气装置厚度和增强的可靠性。

公开(公告)号：US07317243B2

公开(公告)日：2008-01-08

申请号：US10944808

申请日：2004-09-21

Applicant: Chung-Cheng Wang

Inventor： Chung-Cheng Wang

IPC: H01L23/495 ,  H01L21/00

CPC classification number: H01L21/6835 ,  H01L23/24 ,  H01L23/3114 ,  H01L23/4334 ,  H01L23/4951 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/49 ,  H01L24/94 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19105 ,  H01L2924/3511 ,  H05K1/183 ,  H05K3/064 ,  H05K3/403 ,  H05K2201/09036 ,  H05K2201/09645 ,  H05K2201/09845 ,  H05K2203/0369 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Substrate for electrical devices and methods of manufacturing such substrate are disclosed. An embodiment for the substrate comprised of an insulator and a plurality of conductive elements, wherein the insulator having a recess. The conductive elements embedded in the insulator. The conductive elements extend from the insulator surface to the recess. There are two portions of the conductive elements for electrical connection respectively, wherein a portion of conductive element may protrude the insulator surface for electrical connection. In this manner, solder balls are not needed. Moreover, the substrate of the present invention may also comprise an adhesive mean, which is between the conductive elements and the insulator. In addition, the substrate may further comprise a submember such as a chip, heat spreader etc., and the present invention may be capable of affording a thinner electrical device thickness, enhanced reliability, and a decreased cost in production.

Abstract translation: 公开了用于电气装置的基板和制造这种基板的方法。 用于由绝缘体和多个导电元件组成的衬底的实施例，其中绝缘体具有凹部。 绝缘子中嵌入的导电元件。 导电元件从绝缘体表面延伸到凹槽。 用于电连接的导电元件分为两部分，其中导电元件的一部分可以突出绝缘体表面用于电连接。 以这种方式，不需要焊球。 此外，本发明的基底还可以包括位于导电元件和绝缘体之间的粘合剂。 此外，基板还可以包括诸如芯片，散热器等的子部件，并且本发明可以提供更薄的电气设备厚度，增强的可靠性和降低的生产成本。

公开(公告)号：US20070132517A1

公开(公告)日：2007-06-14

申请号：US11164924

申请日：2005-12-12

Applicant: Chung-Cheng Wang ,  Chao-Shi Chuang ,  Wen-Shih Lu ,  Yu-Chang Chen

Inventor： Chung-Cheng Wang ,  Chao-Shi Chuang ,  Wen-Shih Lu ,  Yu-Chang Chen

IPC: H03L7/00

CPC classification number: H03L7/10

Abstract: A method for automatic frequency tuning in a phase lock loop suitable for use in multi-band VCO wireless systems having very limited initial frequency lock times is disclosed. A predetermined subset of VCOs out of a larger bank of VCOs is selected to serve as interpolation points. The interpolation point VCOs are pre-calibrated with a predetermined voltage and the resultingly generated frequency for each of the interpolation point VCOs is stored into memory as a (frequency, VCO) pair, one pair for each interpolation point VCO. When a desired frequency then is given to the system, an appropriate VCO is selected by interpolation using the (frequency, VCO) pairs of the two most adjacent interpolation points for tracking and locking.

Abstract translation: 公开了一种适用于具有非常有限的初始频率锁定时间的多频带VCO无线系统的锁相环中的自动频率调谐方法。 选择较大的VCO组中的VCO的预定子集用作内插点。 内插点VCO以预定电压进行预校准，并且每个内插点VCO的最终产生的频率作为（频率，VCO）对存储到存储器中，对于每个内插点VCO为一对。 当给系统给出期望的频率时，通过使用用于跟踪和锁定的两个最相邻插值点的（频率，VCO）对进行插值来选择适当的VCO。

公开(公告)号：US20060281433A1

公开(公告)日：2006-12-14

申请号：US11451425

申请日：2006-06-13

Applicant: John-San Yang ,  Chung-Cheng Wang ,  Yu-Hua Liu

Inventor： John-San Yang ,  Chung-Cheng Wang ,  Yu-Hua Liu

IPC: H04B1/26

CPC classification number: H04B1/26

Abstract: A demodulation method and apparatus are provided. An RF signal is down converted to generate a first in-phase signal and a first quadrature signal of a first frequency. Limiting amplification is performed on the first in-phase signal and the first quadrature signal to generate a second in-phase signal and a second quadrature signal. The frequency of the second in-phase and quadrature signals are up converted to a third in-phase signal and a quadrature signal of a second frequency. The third in-phase and quadrature signals are up converted to generate an intermediate frequency (IF) signal of a third frequency.

Abstract translation: 提供了解调方法和装置。 RF信号被下变频以产生第一频率的第一同相信号和第一正交信号。 对第一同相信号和第一正交信号进行限幅放大以产生第二同相信号和第二正交信号。 第二同相和正交信号的频率被上变频为第三同相信号和第二频率的正交信号。 第三同相和正交信号被上变频以产生第三频率的中频（IF）信号。