公开(公告)号：US06999299B2

公开(公告)日：2006-02-14

申请号：US10918746

申请日：2004-08-16

申请人： Noriyoshi Shimizu ,  Tomoo Yamasaki ,  Kiyoshi Ooi ,  Akio Rokugawa

发明人： Noriyoshi Shimizu ,  Tomoo Yamasaki ,  Kiyoshi Ooi ,  Akio Rokugawa

IPC分类号： H01G4/228 ,  H01G4/236 ,  H01G4/005

CPC分类号： H01G4/232 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/66 ,  H01L24/10 ,  H01L24/13 ,  H01L24/83 ,  H01L2224/13 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/83851 ,  H01L2924/00011 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/4644 ,  H05K2201/09309 ,  H05K2201/09672 ,  H01L2924/00014 ,  H01L2224/29075 ,  H01L2924/00

摘要： A capacitor structure includes a first electrode provided on an insulating basic member, a dielectric member provided on the electrode, a second electrode provided on the dielectric member, and a plurality of electrode terminals aligned in a grid on the electrode. Respective electrode terminals are aligned such that opposite polarities (+,−) are alternately allocated to neighboring electrode terminals, and respective divided partial electrodes of the first and second electrodes are also aligned such that opposite polarities (+,−) are alternately allocated to neighboring electrode terminals. According to this structure, the inductance of the capacitor structure is reduced and thus the decoupling effect can be effectively achieved. This contributes to a stable operation in the high-frequency (GHz band) range.

摘要翻译： 电容器结构包括设置在绝缘基底构件上的第一电极，设置在电极上的电介质构件，设置在电介质构件上的第二电极和在电极上以栅格排列的多个电极端子。 排列相应的电极端子使得相邻的极性（+， - ）被交替地分配给相邻的电极端子，并且第一和第二电极的相应的分开的部分电极也被对准，使得相反的极性（+， - ）被交替地分配给相邻的 电极端子。 根据该结构，电容器结构的电感减小，从而可以有效地实现解耦效果。 这有助于在高频（GHz频带）范围内的稳定运行。

公开(公告)号：US06914322B2

公开(公告)日：2005-07-05

申请号：US10315468

申请日：2002-12-10

申请人： Takahiro Iijima ,  Akio Rokugawa

发明人： Takahiro Iijima ,  Akio Rokugawa

IPC分类号： H05K3/46 ,  H01L23/12 ,  H01L23/498 ,  H05K1/18 ,  H01L23/02

CPC分类号： H01L23/49822 ,  H01G4/33 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/01078 ,  H01L2924/15311 ,  H05K1/185 ,  H05K1/187

摘要： A semiconductor device including a semiconductor device package providing a capacitor in its circuit board and a semiconductor chip mounted on that package, wherein the capacitor is provided directly under a semiconductor chip mounting surface of the circuit board on which the semiconductor chip is to be mounted and the conductor circuit electrically connecting the semiconductor chip and capacitor is made the shortest distance by having the external connection terminals of the capacitor directly connected to the other surface of the connection pads exposed at one surface at the semiconductor chip mounting surface of the circuit board and to which the electrode terminals of the semiconductor chip are to be directly connected.

摘要翻译： 一种半导体器件，包括在其电路板中提供电容器的半导体器件封装和安装在该封装上的半导体芯片，其中电容器直接设置在其上要安装半导体芯片的电路板的半导体芯片安装表面下方， 电连接半导体芯片和电容器的导体电路通过使电容器的外部连接端子直接连接到在电路板的半导体芯片安装表面的一个表面处露出的连接焊盘的另一个表面而成为最短距离，并且 其中半导体芯片的电极端子将被直接连接。

公开(公告)号：US20050208705A1

公开(公告)日：2005-09-22

申请号：US11130845

申请日：2005-05-17

申请人： Takahiro Iijima ,  Akio Rokugawa

发明人： Takahiro Iijima ,  Akio Rokugawa

IPC分类号： H05K3/46 ,  H01L23/12 ,  H01L23/498 ,  H05K1/18 ,  H01L21/58

CPC分类号： H01L23/49822 ,  H01G4/33 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/01078 ,  H01L2924/15311 ,  H05K1/185 ,  H05K1/187

摘要： A semiconductor device including a semiconductor device package providing a capacitor in its circuit board and a semiconductor chip mounted on that package, wherein the capacitor is provided directly under a semiconductor chip mounting surface of the circuit board on which the semiconductor chip is to be mounted and the conductor circuit electrically connecting the semiconductor chip and capacitor is made the shortest distance by having the external connection terminals of the capacitor directly connected to the other surface of the connection pads exposed at one surface at the semiconductor chip mounting surface of the circuit board and to which the electrode terminals of the semiconductor chip are to be directly connected.

公开(公告)号：US07033934B2

公开(公告)日：2006-04-25

申请号：US10693374

申请日：2003-10-24

申请人： Takahiro Iijima ,  Akio Rokugawa

发明人： Takahiro Iijima ,  Akio Rokugawa

IPC分类号： H01L21/44

CPC分类号： H05K1/0222 ,  H01L23/49827 ,  H01L23/642 ,  H01L23/66 ,  H01L2223/6622 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01078 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/115 ,  H05K1/162 ,  H05K3/4046 ,  H05K2201/09809

摘要： A semiconductor package of superior high frequency characteristics enabling easy mounting of a large-sized capacitor and thereby enabling fluctuation of the power supply voltage to be suppressed and enabling a reduction of the inductance of the wiring portion connecting the capacitor and a connection terminal, that is, a semiconductor package mounting a capacitor for suppressing fluctuation of a power supply voltage, wherein the capacitor is comprised of, in an attachment hole passing through the board in the thickness direction, a conductor wire to be connected to a connection terminal of a semiconductor chip at one end, a high dielectric constant material covering the conductor wire at a predetermined thickness, and a conductor layer arranged between the outer circumference of the high dielectric constant material and the inner wall of the attachment hole, provided as a coaxial structure having the conductor wire at its center, and a method of production of the same.

摘要翻译： 具有优异的高频特性的半导体封装，能够容易地安装大型电容器，从而能够抑制电源电压的波动，并且能够降低连接电容器和连接端子的布线部分的电感，即 ，安装用于抑制电源电压波动的电容器的半导体封装，其中，所述电容器包括：在厚度方向穿过所述板的安装孔中，连接到半导体芯片的连接端子的导线 一端覆盖预定厚度的导体线的高介电常数材料，以及设置在高介电常数材料的外周与安装孔的内壁之间的导体层，其设置为具有导体的同轴结构 其中心线及其制造方法。

公开(公告)号：US07019404B2

公开(公告)日：2006-03-28

申请号：US10347602

申请日：2003-01-22

申请人： Akio Rokugawa ,  Takahiro Iijima

发明人： Akio Rokugawa ,  Takahiro Iijima

IPC分类号： H01L29/40

CPC分类号： H01L23/49531 ,  H01L21/4857 ,  H01L21/6835 ,  H01L24/48 ,  H01L25/0655 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/45099 ,  H01L2224/48247 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19107 ,  H05K1/113 ,  H05K3/0061 ,  H05K3/205 ,  H05K3/323 ,  H05K3/4602 ,  H05K3/4614 ,  H05K3/4682 ,  H05K2201/0133 ,  H05K2201/09527 ,  H05K2203/061 ,  Y10T29/49126 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： A multi-layered circuit substrate for a semiconductor device comprises a multi-layered circuit substrate body having first and second surfaces and comprising a plurality of conductive pattern layers integrally laminated one on the other from the first surface to the second surface, so that a plurality of semiconductor device elements can be arranged on the first surface of the substrate body; and a plate member, a rigidity thereof being higher than that of the substrate body, attached to the second surface of the substrate body. A plurality of semiconductor elements can be mounted on the semiconductor element mounting surface defined on the first surface of the substrate body.

公开(公告)号：US06340841B2

公开(公告)日：2002-01-22

申请号：US09488087

申请日：2000-01-20

申请人： Takahiro Iijima ,  Akio Rokugawa

发明人： Takahiro Iijima ,  Akio Rokugawa

IPC分类号： H01L23053

CPC分类号： H05K1/114 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K3/4602 ,  H05K2201/0195 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09845 ,  H05K2201/10734 ,  H01L2924/00

摘要： A package for semiconductor devices, comprising a core board having a front side with a front side base wiring pattern formed thereon and a back side with a back side base wiring pattern formed thereon, the front and back side wiring patterns being electrically connected to each other through a conductor segment penetrating the core board; a front side laminate of upper wiring patterns with intermediate insulating layers intervening therebetween on the front side base wiring pattern, in which each adjacent pair of the upper wiring patterns are electrically connected to each other through a via plated coating on a side wall of viaholes penetrating one of the intermediate insulating layers that intervenes between the adjacent pair and in which an outermost one of the upper wiring patterns is patterned for electrical connection to a semiconductor chip; a back side laminate of insulating layers on the back side base wiring pattern; an external connection wiring pattern including external connection terminals on the back side laminate of insulating layers; wherein the external connection wiring pattern is electrically connected to the back side base wiring pattern through a via penetrating the back side laminate of insulating layers.

摘要翻译： 一种用于半导体器件的封装，包括：芯板，其具有形成在其上的前侧基部布线图案的正面和形成在其上的背面基底布线图案的背面，所述前侧布线图案和所述背面布线图案彼此电连接 通过穿透核心板的导体段; 上侧布线图案与前侧基布线图案之间介于其间的中间绝缘层的上侧布线图案的前侧层压体，其中每个相邻的一对上布线图案通过贯通孔的侧壁上的通孔镀层彼此电连接 介于相邻对之间的中间绝缘层之一，其中最上面的一个上布线图案被图案化以与半导体芯片电连接; 背面基底布线图案上的绝缘层的背面层压体; 绝缘层的背面叠层体上具有外部连接端子的外部连接布线图案; 其中所述外部连接布线图案通过穿过绝缘层的背面层叠体的通孔电连接到所述背面基底布线图案。

公开(公告)号：US07335531B2

公开(公告)日：2008-02-26

申请号：US11130845

申请日：2005-05-17

申请人： Takahiro Iijima ,  Akio Rokugawa

发明人： Takahiro Iijima ,  Akio Rokugawa

IPC分类号： H01L21/44

CPC分类号： H01L23/49822 ,  H01G4/33 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/01078 ,  H01L2924/15311 ,  H05K1/185 ,  H05K1/187

摘要： A semiconductor device including a semiconductor device package providing a capacitor in its circuit board and a semiconductor chip mounted on that package, wherein the capacitor is provided directly under a semiconductor chip mounting surface of the circuit board on which the semiconductor chip is to be mounted and the conductor circuit electrically connecting the semiconductor chip and capacitor is made the shortest distance by having the external connection terminals of the capacitor directly connected to the other surface of the connection pads exposed at one surface at the semiconductor chip mounting surface of the circuit board and to which the electrode terminals of the semiconductor chip are to be directly connected.

摘要翻译： 一种半导体器件，包括在其电路板中提供电容器的半导体器件封装和安装在该封装上的半导体芯片，其中电容器直接设置在要安装半导体芯片的电路板的半导体芯片安装表面下方， 电连接半导体芯片和电容器的导体电路通过使电容器的外部连接端子直接连接到在电路板的半导体芯片安装表面的一个表面处露出的连接焊盘的另一个表面而成为最短距离，并且 其中半导体芯片的电极端子将被直接连接。

公开(公告)号：US20060110838A1

公开(公告)日：2006-05-25

申请号：US11324220

申请日：2006-01-04

申请人： Akio Rokugawa ,  Takahiro Iijima

发明人： Akio Rokugawa ,  Takahiro Iijima

IPC分类号： H01L21/66

CPC分类号： H01L23/49531 ,  H01L21/4857 ,  H01L21/6835 ,  H01L24/48 ,  H01L25/0655 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/45099 ,  H01L2224/48247 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19107 ,  H05K1/113 ,  H05K3/0061 ,  H05K3/205 ,  H05K3/323 ,  H05K3/4602 ,  H05K3/4614 ,  H05K3/4682 ,  H05K2201/0133 ,  H05K2201/09527 ,  H05K2203/061 ,  Y10T29/49126 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： A multi-layered circuit substrate for a semiconductor device comprises a multi-layered circuit substrate body having first and second surfaces and comprising a plurality of conductive pattern layers integrally laminated one on the other from the first surface to the second surface, so that a plurality of semiconductor device elements can be arranged on the first surface of the substrate body; and a plate member, a rigidity thereof being higher than that of the substrate body, attached to the second surface of the substrate body. A plurality of semiconductor elements can be mounted on the semiconductor element mounting surface defined on the first surface of the substrate body.

公开(公告)号：US07763809B2

公开(公告)日：2010-07-27

申请号：US10920270

申请日：2004-08-18

申请人： Akio Rokugawa ,  Masayuki Sasaki ,  Yuichi Matsuda

发明人： Akio Rokugawa ,  Masayuki Sasaki ,  Yuichi Matsuda

IPC分类号： H05K1/16

CPC分类号： H05K3/4682 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49822 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3025 ,  H05K1/113 ,  H05K3/007 ,  H05K3/045 ,  H05K3/108 ,  H05K3/20 ,  H05K3/205 ,  H05K3/388 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2201/09563 ,  H05K2203/0152 ,  H05K2203/0376 ,  H05K2203/0384 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49345

摘要： A substrate of multilayered structure having a plurality of sets of an insulation layer and a wiring line layer, and having one face for mounting a semiconductor element thereon and the other face on which external connection terminals are to be provided, the face for mounting a semiconductor element being provided with pads to be bonded to an electrode terminal of the semiconductor element, the other face being provided with pads to be bonded to an external connection terminal, such as a terminal formed of a solder ball, and the wiring line layers on both sides of an insulation layer being connected with each other by vias piercing the insulation layer, wherein the surfaces of the pads to be bonded to an electrode terminal of a semiconductor element are flat and are in the same plane. A method of manufacturing such a multilayered substrate is also disclosed.

摘要翻译： 一种多层结构的基板，具有多组绝缘层和布线层，并且具有用于安装半导体元件的一个面和将要设置外部连接端子的另一个面，用于安装半导体的面 元件设置有要接合到半导体元件的电极端子的焊盘，另一个面设置有焊接到外部连接端子，例如由焊球形成的端子，并且两个布线层 绝缘层的侧面通过穿过绝缘层的通孔相互连接，其中要结合到半导体元件的电极端子的焊盘的表面是平坦的并且在同一平面中。 还公开了制造这种多层基板的方法。

公开(公告)号：US07402900B2

公开(公告)日：2008-07-22

申请号：US10811768

申请日：2004-03-29

申请人： Kiyoshi Ooi ,  Yasuyoshi Horikawa ,  Akio Rokugawa

发明人： Kiyoshi Ooi ,  Yasuyoshi Horikawa ,  Akio Rokugawa

IPC分类号： H01L23/06

CPC分类号： H01L23/49816 ,  H01L21/4857 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/50 ,  H01L23/562 ,  H01L24/81 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16265 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06582 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00

摘要： A method of manufacturing a semiconductor device substrate includes the steps of: arranging on a base a temporary fixing member for temporarily fixing an electronic component; temporarily fixing the electronic component on the base by the temporary fixing member; forming a substrate body on the base and the electronic component; removing a portion of the base which portion corresponds to the electronic component, thereby exposing the temporary fixing member; and removing the temporary fixing member, thereby enabling the electronic component to make an external connection.