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Patent Agency Ranking
公开(公告)号：US09355881B2
公开(公告)日：2016-05-31
申请号：US14182689
申请日：2014-02-18
Applicant: Infineon Technologies AG
Inventor： Bernhard Goller , Eva-Maria Hess , Edward Fuergut , Christian Schweiger
IPC: H01L21/683 , H01L21/268 , H01L21/304 , H01L21/762 , H01L21/78 , H01L23/00 , H01L21/56 , H01L23/31
CPC classification number: H01L21/6835 , H01L21/268 , H01L21/304 , H01L21/561 , H01L21/568 , H01L21/76251 , H01L21/78 , H01L23/3114 , H01L24/02 , H01L24/24 , H01L24/82 , H01L24/97 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/0231 , H01L2224/04105 , H01L2224/24011 , H01L2224/24105 , H01L2224/24226 , H01L2224/245 , H01L2224/82106 , H01L2224/96 , H01L2224/97 , H01L2924/06 , H01L2924/0665 , H01L2924/12042 , H01L2924/181 , H01L2924/201 , H01L2924/20108 , H01L2924/20109 , H01L2924/2011 , H01L2924/20111 , H01L2924/2064 , H01L2924/20641 , H01L2924/20642 , H01L2924/00 , H01L2224/82 , H05K3/467 , H01L2224/03 , H01L2924/01029
Abstract: A method for manufacturing a semiconductor device includes providing a carrier and a semiconductor wafer having a first side and a second side opposite to the first side. The method includes applying a dielectric material to the carrier or the semiconductor wafer and bonding the semiconductor wafer to the carrier via the dielectric material. The method includes processing the semiconductor wafer and removing the carrier from the semiconductor wafer such that the dielectric material remains on the semiconductor wafer to provide a semiconductor device comprising the dielectric material.
Abstract translation: 一种制造半导体器件的方法包括提供具有第一侧和与第一侧相对的第二侧的载流子和半导体晶片。 该方法包括将介电材料施加到载体或半导体晶片，并通过电介质材料将半导体晶片接合到载体上。 该方法包括处理半导体晶片并从半导体晶片去除载体，使得介电材料保留在半导体晶片上，以提供包括电介质材料的半导体器件。
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公开(公告)号：US20160141266A1
公开(公告)日：2016-05-19
申请号：US14800613
申请日：2015-07-15
Applicant: HYUNDAI MOTOR COMPANY
Inventor： Kyoung-Kook HONG , Hyun Woo NOH , Youngkyun JUNG , Dae Hwan CHUN , Jong Seok LEE , Su Bin KANG
CPC classification number: H01L24/83 , B23K20/026 , B23K20/16 , B23K20/233 , B23K35/025 , B23K35/264 , B23K35/3006 , B23K2101/42 , B23K2103/166 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/81 , H01L2224/13294 , H01L2224/13313 , H01L2224/13339 , H01L2224/16227 , H01L2224/16505 , H01L2224/29294 , H01L2224/29313 , H01L2224/29339 , H01L2224/32227 , H01L2224/32505 , H01L2224/81191 , H01L2224/81192 , H01L2224/81825 , H01L2224/8184 , H01L2224/83191 , H01L2224/83192 , H01L2224/83825 , H01L2224/8384 , H01L2924/00015 , H01L2924/10272 , H01L2924/201 , H01L2924/2075 , H01L2924/20751 , H05K3/341 , H05K3/3463 , H05K2201/10166 , H05K2203/1131 , H01L2224/29388 , H01L2924/00014 , H01L2224/13388 , H01L2924/00012
Abstract: A method for bonding with a silver paste includes coating a semiconductor device or a substrate with the silver paste. The silver paste contains a plurality of silver particles and a plurality of bismuth particles. The method further includes disposing the semiconductor on the substrate and forming a bonding layer by heating the silver paste, wherein the semiconductor and the substrate are bonded to each other by the bonding layer.
Abstract translation: 用银膏粘合的方法包括用银膏涂覆半导体器件或衬底。 银糊含有多个银颗粒和多个铋颗粒。 该方法还包括将半导体布置在衬底上并通过加热银膏形成接合层，其中半导体和衬底通过接合层彼此接合。
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23.发明申请公开(公告)号：US20160104687A1
公开(公告)日：2016-04-14
申请号：US14893789
申请日：2015-03-31
Inventor： Takashi YAMADA , Daizo ODA , Ryo OISHI , Teruo HAIBARA , Tomohiro UNO
CPC classification number: H01L24/45 , B21C1/00 , B21C1/003 , C22C5/06 , C22C5/08 , C22F1/00 , C22F1/14 , H01L24/43 , H01L2224/4321 , H01L2224/43848 , H01L2224/43986 , H01L2224/45012 , H01L2224/45015 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2924/00011 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01046 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/201 , H01L2924/20108 , H01L2924/20109 , H01L2924/2011 , H01L2924/20111 , H01L2924/00 , H01L2924/01201 , H01L2924/01016 , H01L2924/01017 , H01L2924/20751 , H01L2924/20752 , H01L2924/12044 , H01L2924/00015 , H01L2224/45664 , H01L2924/01049 , H01L2924/01045 , H01L2924/01004 , H01L2924/01005
Abstract: Bonding wire for semiconductor device use where both leaning failures and spring failures are suppressed by (1) in a cross-section containing the wire center and parallel to the wire longitudinal direction (wire center cross-section), there are no crystal grains with a ratio a/b of a long axis “a” and a short axis “b” of 10 or more and with an area of 15 μm2 or more (“fiber texture”), (2) when measuring a crystal direction in the wire longitudinal direction in the wire center cross-section, the ratio of crystal direction with an angle difference with respect to the wire longitudinal direction of 15° or less is, by area ratio, 10% to less than 50%, and (3) when measuring a crystal direction in the wire longitudinal direction at the wire surface, the ratio of crystal direction with an angle difference with respect to the wire longitudinal direction of 15° or less is, by area ratio, 70% or more. During the drawing step, a drawing operation with a rate of reduction of area of 15.5% or more is performed at least once. The final heat treatment temperature and the pre-final heat treatment temperature are made predetermined ranges.
Abstract translation: 用于半导体器件的接合线，其中通过（1）在包含线中心并且平行于线纵向（线中心横截面）的横截面中抑制倾斜故障和弹簧故障，不存在具有 长轴“a”的比率a / b和短轴“b”为10以上，面积为15μm2以上（“纤维织构”），（2）当测定线材纵向的晶体方向 线中心横截面的方向，晶体方向<100>相对于导线纵向方向的角度差为15°以下的面积比为10％以上且小于50％，（3 ）当在线表面测量线长度方向的晶体方向时，晶体方向<100>与线长度方向的角度差为15°以下的面积比为70％以上 。 在拉伸步骤中，至少进行一次具有15.5％以上的面积减小率的拉拔操作。 将最终的热处理温度和预热处理温度设定为预定范围。
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公开(公告)号：US20140110740A1
公开(公告)日：2014-04-24
申请号：US14144111
申请日：2013-12-30
Applicant: Nichia Corporation
Inventor： Masafumi KURAMOTO , Satoru OGAWA , Miki NIWA
CPC classification number: H01L33/44 , H01L23/08 , H01L23/293 , H01L23/49579 , H01L23/49582 , H01L24/17 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/83 , H01L33/62 , H01L2224/05568 , H01L2224/16 , H01L2224/16225 , H01L2224/2712 , H01L2224/2745 , H01L2224/275 , H01L2224/29023 , H01L2224/2908 , H01L2224/29083 , H01L2224/29101 , H01L2224/29111 , H01L2224/29139 , H01L2224/29187 , H01L2224/2919 , H01L2224/29339 , H01L2224/32225 , H01L2224/45144 , H01L2224/73265 , H01L2224/83048 , H01L2224/83055 , H01L2224/83075 , H01L2224/83201 , H01L2224/83203 , H01L2224/83205 , H01L2224/83207 , H01L2224/83439 , H01L2224/83487 , H01L2224/8383 , H01L2224/8384 , H01L2224/83894 , H01L2224/83895 , H01L2224/83896 , H01L2224/83907 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/0102 , H01L2924/01022 , H01L2924/01024 , H01L2924/01025 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01045 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01056 , H01L2924/01057 , H01L2924/01058 , H01L2924/01063 , H01L2924/01064 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01105 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/0541 , H01L2924/0665 , H01L2924/09701 , H01L2924/12035 , H01L2924/12036 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/15747 , H01L2924/1576 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/201 , H01L2924/20105 , H01L2924/20106 , H01L2924/20107 , H01L2924/20108 , H01L2924/20109 , H01L2924/2011 , H01L2924/20111 , H01L2924/3025 , H01L2933/0066 , H01S5/0226 , H01L2924/00015 , H01L2924/00 , H01L2924/3512 , H01L2224/48 , H01L2224/05599
Abstract: An object of the invention is to provide a method for producing a conductive member having low electrical resistance, and the conductive member is obtained using a low-cost stable conductive material composition that does not contain an adhesive. A method for producing a semiconductor device in which silver or silver oxide provided on a surface of a base and silver or silver oxide provided on a surface of a semiconductor element are bonded, includes the steps of arranging a semiconductor element on a base such that silver or silver oxide provided on a surface of the semiconductor element is in contact with silver or silver oxide provided on a surface of the base, temporarily bonding the semiconductor element and the base by applying a pressure or an ultrasonic vibration to the semiconductor element or the base, and permanently bonding the semiconductor element and the base by applying heat having a temperature of 150 to 900° C. to the semiconductor device and the base.
Abstract translation: 本发明的目的是提供一种用于制造具有低电阻的导电构件的方法，并且使用不含粘合剂的低成本稳定的导电材料组合物获得导电构件。 一种制造半导体器件的方法，其中设置在基底表面上的银或氧化银和设置在半导体元件的表面上的银或银氧化物结合，包括以下步骤：将半导体元件布置在基底上，使得银 或设置在半导体元件的表面上的氧化银与设置在基板的表面上的银或氧化银接触，通过向半导体元件或基底施加压力或超声波振动来临时接合半导体元件和基座 并且通过向半导体器件和基底施加温度为150至900℃的热而将半导体元件和基底永久地接合。
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公开(公告)号：US08642392B2
公开(公告)日：2014-02-04
申请号：US12691947
申请日：2010-01-22
Applicant: Masafumi Kuramoto , Satoru Ogawa , Miki Niwa
Inventor： Masafumi Kuramoto , Satoru Ogawa , Miki Niwa
IPC: H01L21/44
CPC classification number: H01L33/44 , H01L23/08 , H01L23/293 , H01L23/49579 , H01L23/49582 , H01L24/17 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/83 , H01L33/62 , H01L2224/05568 , H01L2224/16 , H01L2224/16225 , H01L2224/2712 , H01L2224/2745 , H01L2224/275 , H01L2224/29023 , H01L2224/2908 , H01L2224/29083 , H01L2224/29101 , H01L2224/29111 , H01L2224/29139 , H01L2224/29187 , H01L2224/2919 , H01L2224/29339 , H01L2224/32225 , H01L2224/45144 , H01L2224/73265 , H01L2224/83048 , H01L2224/83055 , H01L2224/83075 , H01L2224/83201 , H01L2224/83203 , H01L2224/83205 , H01L2224/83207 , H01L2224/83439 , H01L2224/83487 , H01L2224/8383 , H01L2224/8384 , H01L2224/83894 , H01L2224/83895 , H01L2224/83896 , H01L2224/83907 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/0102 , H01L2924/01022 , H01L2924/01024 , H01L2924/01025 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01045 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01056 , H01L2924/01057 , H01L2924/01058 , H01L2924/01063 , H01L2924/01064 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01105 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/04941 , H01L2924/0541 , H01L2924/0665 , H01L2924/09701 , H01L2924/12035 , H01L2924/12036 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/15747 , H01L2924/1576 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/201 , H01L2924/20105 , H01L2924/20106 , H01L2924/20107 , H01L2924/20108 , H01L2924/20109 , H01L2924/2011 , H01L2924/20111 , H01L2924/3025 , H01L2933/0066 , H01S5/0226 , H01L2924/00015 , H01L2924/00 , H01L2924/3512 , H01L2224/48 , H01L2224/05599
Abstract: An object of the invention is to provide a method for producing a conductive member having low electrical resistance, and the conductive member is obtained using a low-cost stable conductive material composition that does not contain an adhesive. A method for producing a semiconductor device in which silver or silver oxide provided on a surface of a base and silver or silver oxide provided on a surface of a semiconductor element are bonded, includes the steps of arranging a semiconductor element on a base such that silver or silver oxide provided on a surface of the semiconductor element is in contact with silver or silver oxide provided on a surface of the base, temporarily bonding the semiconductor element and the base by applying a pressure or an ultrasonic vibration to the semiconductor element or the base, and permanently bonding the semiconductor element and the base by applying heat having a temperature of 150 to 900° C. to the semiconductor device and the base.
Abstract translation: 本发明的目的是提供一种用于制造具有低电阻的导电构件的方法，并且使用不含粘合剂的低成本稳定的导电材料组合物获得导电构件。 一种制造半导体器件的方法，其中设置在基底表面上的银或氧化银和设置在半导体元件的表面上的银或银氧化物结合，包括以下步骤：将半导体元件布置在基底上，使得银 或设置在半导体元件的表面上的氧化银与设置在基板的表面上的银或氧化银接触，通过向半导体元件或基底施加压力或超声波振动来临时接合半导体元件和基座 并且通过向半导体器件和基底施加温度为150至900℃的热而将半导体元件和基底永久地接合。
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