公开(公告)号：US07742314B2

公开(公告)日：2010-06-22

申请号：US11513034

申请日：2006-08-31

Applicant: Kazuhiro Urashima ,  Shinji Yuri ,  Manabu Sato ,  Kohki Ogawa

Inventor： Kazuhiro Urashima ,  Shinji Yuri ,  Manabu Sato ,  Kohki Ogawa

IPC: H05K1/11

CPC classification number: H05K1/185 ,  H01G2/06 ,  H01G4/40 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H05K1/0233 ,  H05K1/0234 ,  H05K3/4602 ,  H05K2201/10045 ,  H05K2201/10674 ,  H05K2201/10712 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A wiring board comprising: a board core (11) having a core main surface (12) and a core reverse surface (13); a capacitor (101, 101A, 101B, 101C, 101D, 101E, 101F, 101G, 101H, 101J, 1101, 1101′, 1101″, 1101′″, 1101″″, 1101′″″) having a capacitor main surface (102) and a capacitor reverse surface (103) and having a structure in which first inner electrode layers (141) and second inner electrode layers (142) are alternately laminated and arranged via a dielectric layer (105), the capacitor (101, 101A, 101B, 101C, 101D, 101E, 101F, 101G, 101H, 101J, 1101, 1101′, 1101″, 1101′″, 1101″″, 1101′″″) being accommodated in the board core (11) in a state in which the core main surface (12) and the capacitor main surface (102) are oriented on a same side; and a wiring laminated portion (31) having a structure in which interlayer insulating layers (33, 35) and conductor layers (42) are alternately laminated on the core main surface (12) and the capacitor main surface (102), wherein an inductor (251, 252, 253) or a resistor (301, 302, 311, 312, 321, 322) is formed on or in the capacitor (101, 101A, 101B, 101C, 101D, 101E, 101F, 101G, 101H, 101J, 1101, 1101′, 1101″, 1101′″, 1101″″, 1101′″″).

Abstract translation: 一种布线板，包括：具有芯主表面（12）和芯反向表面（13）的板芯（11）; 具有电容器主表面的电容器（101,101A，101B，101C，101D，101E，101F，101G，101H，101J，1101,1101,1101,1101“，1101”，1101“”，1101“ 102）和电容器反面（103），并且具有通过电介质层（105）交替层叠配置第一内电极层（141）和第二内电极层（142）的结构，电容器（101,101A ，101B，101C，101D，101E，101F，101G，101H，101J，1101,1101'，1101“，1101”“，1101”“，1101”“）被容纳在板芯（11） 其中所述芯主表面（12）和所述电容器主表面（102）位于同一侧; 以及具有层间绝缘层（33,35）和导体层（42）交替层叠在芯主表面（12）和电容器主表面（102）上的结构的布线层叠部分（31），其中电感器 （101,101A，101B，101C，101D，101E，101F，101G，101H，101J）中的电容器（251,102,253）或电阻器（301,302,311,312,321,322） ，1101,1101'，1101“，1101”“，1101”“，1101”“）。

公开(公告)号：US07715164B2

公开(公告)日：2010-05-11

申请号：US11984559

申请日：2007-11-20

Applicant: Chien-Hao Huang ,  Wen-Chih Li

Inventor： Chien-Hao Huang ,  Wen-Chih Li

IPC: H02H5/04

CPC classification number: H05K1/0234 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/141 ,  H05K1/167 ,  H05K1/185 ,  H05K3/3442 ,  H05K3/4611 ,  H05K3/4688 ,  H05K2201/09181 ,  H05K2201/09309 ,  H05K2201/10045 ,  Y10T428/239

Abstract: An embedded type multifunctional integrated structure and a method for manufacturing the same are disclosed. The present invention utilizes the concept of multi-layer design to integrated more than two passive components on a component structure that would be adhered to a substrate. Hence, the embedded type multifunctional integrated structure has an OCP function, an OVP function, an anti-EMI function, and an anti-ESD function at the same time. Therefore, the present invention effectively integrated two or more than one passive components in order to increase function of the embedded type multifunctional integrated structure. Moreover, the present invention effectively reduces the size of the passive components on a PCB and reduces the number of solder joints.

Abstract translation: 公开了一种嵌入式多功能一体化结构及其制造方法。 本发明利用多层设计的概念将多于两个的无源部件集成在将粘附到基板上的部件结构上。 因此，嵌入式多功能一体化结构同时具有OCP功能，OVP功能，抗EMI功能和抗ESD功能。 因此，为了增加嵌入式多功能一体化结构的功能，本发明有效地集成了两个或多个无源部件。 此外，本发明有效地减小了PCB上的无源部件的尺寸，并且减少了焊点的数量。

公开(公告)号：US07601920B2

公开(公告)日：2009-10-13

申请号：US10579680

申请日：2004-11-12

Applicant: Koji Fujimoto

Inventor： Koji Fujimoto

IPC: H05K1/02

CPC classification number: H05K3/3442 ,  H01C1/16 ,  H01C13/02 ,  H01C17/006 ,  H01C17/28 ,  H05K2201/10045 ,  Y02P70/613

Abstract: The present invention provides a surface mount composite electronic component which can be made compact. The structure of the surface mount composite electronic component is one in which a circuit element is formed on each of a set of opposing surfaces of an insulating substrate composed of a hexahedron, with electrodes that make up the circuit elements also functioning as external terminals. For example, a pair of first electrodes disposed on both ends of a front surface of the insulating substrate composed of a hexahedron, a pair of second electrodes disposed on a rear surface of the insulating substrate opposite the first electrodes, a first resistor disposed so as to contact both of the first pair of electrodes, and a second resistor disposed so as to contact both of the second electrodes.

Abstract translation: 本发明提供一种可以制成紧凑的表面安装复合电子部件。 表面安装复合电子部件的结构是其中在由六面体组成的绝缘基板的一组相对表面的每一个上形成电路元件的结构，其中构成电路元件的电极也用作外部端子。 例如，设置在由六面体构成的绝缘基板的前表面的两端上的一对第一电极，设置在与第一电极相对的绝缘基板的后表面上的一对第二电极，第一电阻器设置为 以接触第一对电极中的两个，以及设置成接触两个第二电极的第二电阻器。

公开(公告)号：US20080298031A1

公开(公告)日：2008-12-04

申请号：US12119800

申请日：2008-05-13

Applicant: Gheorghe Korony

Inventor： Gheorghe Korony

IPC: H05K1/16 ,  H05K3/00

CPC classification number: H01P1/20 ,  H01L2224/48091 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/16 ,  H05K3/0052 ,  H05K3/403 ,  H05K2201/0317 ,  H05K2201/09154 ,  H05K2201/10045 ,  Y10T29/49155 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Shaped integrated passive devices and corresponding methodologies relate to construction and mounting of shaped passive devices on substrates so as to provide both mechanical and electrical connection. Certain components and component assemblies are associated with the implementation of surface mountable devices. Specially shaped integrated passive device are capable of providing simplified mounting on and simultaneous connection to selected electrical pathways on a printed circuit board or other mounting substrate. Shaped, plated side filter devices have plated sides which provide both mounting and grounding/power coupling functions. Thin film filters may be constructed on silicon wafers, which are then diced from the top surface with an angular dicing saw to produce a shaped groove in the top surface. The groove may be v-shaped or other shape, and is then plated with a conductive material. Individual pieces are separated by grinding the back surface of the wafer down to where the grooves are intercepted. The plated grooves serve as ground or power connection points for the filter circuit. The metallized slopes of the plated grooves are used in securing the individual pieces to a mounting surface, by soldering or using conductive epoxy.

Abstract translation: 形状的集成无源器件和相应的方法涉及在基底上的成形无源器件的结构和安装，以便提供机械和电连接。 某些组件和组件组件与表面可安装设备的实现相关联。 特殊形状的集成无源器件能够简化安装在印刷电路板或其他安装基板上的选定电路上并同时连接。 成型的电镀侧过滤器装置具有电镀侧面，其提供安装和接地/电力耦合功能。 薄膜过滤器可以构造在硅晶片上，然后用角切割锯从顶表面切割，以在顶表面中产生成形凹槽。 凹槽可以是v形或其他形状，然后用导电材料镀覆。 通过将晶片的后表面向下研磨到凹槽被截取的地方分开各个片段。 电镀槽用作滤波电路的接地或电源连接点。 电镀槽的金属化斜坡用于通过焊接或使用导电环氧树脂将各个片固定到安装表面。

公开(公告)号：US07227443B2

公开(公告)日：2007-06-05

申请号：US10533035

申请日：2003-10-28

Applicant: Takahiro Kuriyama

Inventor： Takahiro Kuriyama

IPC: H01C1/02

CPC classification number: H05K3/3442 ,  H01C1/16 ,  H01C13/02 ,  H05K2201/09172 ,  H05K2201/10045 ,  Y02P70/613

Abstract: A fixed resistor network has an insulating substrate, a plurality of film resistors arranged on a top surface of the insulating substrate, terminal electrodes formed for the film resistors on each lengthwise sidewall of the insulating substrate at a given pitch along the sidewall, and recesses provided between the terminal electrodes. The occurrence of solder bridges between the terminal electrodes during solder mounting and the occurrence of chipping in the terminal-electrode-forming areas between the recesses on the lengthwise sidewall are both reduced by making the width of the recesses along the lengthwise sidewall either 0.44 to 0.48 times or 0.525 to 0.625 times the pitch.

Abstract translation: 固定电阻网络具有绝缘基板，布置在绝缘基板的顶表面上的多个薄膜电阻器，沿着侧壁以给定的间距为绝缘基板的每个纵向侧壁上的薄膜电阻器形成的端子电极和设置的凹部 在端子电极之间。 在焊接安装期间在端子电极之间出现焊接桥，并且在纵向侧壁上的凹部之间的端子电极形成区域中发生切屑的情况都通过使沿着纵向侧壁的凹部的宽度为0.44至0.48 次或0.525到0.625倍。

公开(公告)号：US20060072881A1

公开(公告)日：2006-04-06

申请号：US11133782

申请日：2005-05-20

Applicant: Nikolaus Schunk

Inventor： Nikolaus Schunk

IPC: G02B6/36

CPC classification number: G02B6/305 ,  G02B6/02033 ,  G02B6/3885 ,  G02B6/421 ,  G02B6/4246 ,  H05K1/0203 ,  H05K1/147 ,  H05K2201/10045 ,  H05K2201/10121 ,  H05K2201/1056

Abstract: An opto-electronic transceiver having: a transmitting component for converting electrical signals into optical signals; a first circuitry module for the transmitting component; a receiving component for converting optical signals into electrical signals; a second circuitry module for the receiving component; a printed circuitboard with conductor tracks, on which the transmitting component, the receiving component, the first circuitry module and the second circuitry module are arranged; and a transceiver housing including a nonconductive material and has a connector receptacle for receiving and coupling an optical connector. The transmitting component, the first circuitry module, the receiving component and the second circuitry module form at least one subassembly, the subassembly having: an encapsulation composition, in which the components of the subassembly are embedded, and a wiring layer embodied using thin-film technology, the wiring layer providing an electrical contact connection between the subassembly components and to associated contacts of the printed circuit board.

Abstract translation: 一种光电收发器，具有：用于将电信号转换为光信号的发送部件; 用于所述发射部件的第一电路模块; 用于将光信号转换成电信号的接收部件; 用于所述接收部件的第二电路模块; 具有导体轨迹的印刷电路板，其上布置有发射部件，接收部件，第一电路模块和第二电路模块; 以及收发器壳体，其包括非导电材料并且具有用于接收和耦合光学连接器的连接器插座。 发射部件，第一电路模块，接收部件和第二电路模块形成至少一个子组件，该子组件具有：嵌入组件的部件的封装组合物，以及使用薄膜实现的布线层 技术，布线层提供子组件部件之间的电接触连接和印刷电路板的相关联的接触。

公开(公告)号：US06734373B2

公开(公告)日：2004-05-11

申请号：US10176521

申请日：2002-06-24

Applicant: Hideki Seki

Inventor： Hideki Seki

IPC: H05K116

CPC classification number: H05K1/184 ,  H05K3/045 ,  H05K3/301 ,  H05K3/403 ,  H05K3/4046 ,  H05K3/429 ,  H05K2201/096 ,  H05K2201/09645 ,  H05K2201/10045 ,  H05K2201/10583 ,  H05K2201/10636 ,  H05K2203/0242 ,  Y02P70/611 ,  Y10T29/49165 ,  Y10T29/49169

Abstract: When an electrode component is inserted into a through hole from one side and then rotated, parts of a conductive film are cut by a cutting blade. Another electrode component including a chip component whose one terminal is connected to an electrode of this electrode component is inserted into the through hole from the other side. When compression bonding is applied to the both electrode components so as to be joined together, an electrode of the former electrode component and the electrode of the latter electrode component are spread within the through hole with the pressure. The spread electrode of the former electrode component contacts a portion of the conductive film that is electrically connected to a front surface wiring, and the spread electrode of the latter electrode component contacts another portion of the conductive film that is electrically connected to a back surface wiring.

Abstract translation: 当电极组件从一侧插入通孔中然后旋转时，导电膜的一部分被切割刀片切割。 包括其一个端子连接到该电极部件的电极的芯片部件的另一个电极部件从另一侧插入到通孔中。 当对两个电极部件进行压接以便接合在一起时，前一电极部件的电极和后一电极部件的电极在该压力下在通孔内扩散。 前电极部件的扩散电极与导电膜的与前面布线电连接的部分接触，后一电极部件的扩散电极与电连接到背面布线的导电膜的另一部分接触 。

公开(公告)号：US20020196613A1

公开(公告)日：2002-12-26

申请号：US10176521

申请日：2002-06-24

Applicant: NEC CORPORATION

Inventor： Hideki Seki

IPC: H05K003/30 ,  H05K003/32

CPC classification number: H05K1/184 ,  H05K3/045 ,  H05K3/301 ,  H05K3/403 ,  H05K3/4046 ,  H05K3/429 ,  H05K2201/096 ,  H05K2201/09645 ,  H05K2201/10045 ,  H05K2201/10583 ,  H05K2201/10636 ,  H05K2203/0242 ,  Y02P70/611 ,  Y10T29/49165 ,  Y10T29/49169

Abstract: When an electrode component is inserted into a through hole from one side and then rotated, parts of a conductive film are cut by a cutting blade Another electrode component including a chip component whose one terminal is connected to an electrode of this electrode component is inserted into the through hole from the other side. When compression bonding is applied to the both electrode components so as to be joined together, an electrode of the former electrode component and the electrode of the latter electrode component are spread within the through hole with the pressure. The spread electrode of the former electrode component contacts a portion of the conductive film that is electrically connected to a front surface wiring, and tho spread electrode of the latter electrode component contacts another portion of the conductive film that is electrically connected to a back surface wiring.

Abstract translation: 当电极组件从一侧插入到通孔中然后旋转时，导电膜的一部分被切割刀片切割。另外，包括其一个端子连接到该电极部件的电极的芯片部件的电极部件插入到 通孔从另一边。 当对两个电极部件进行压接以便接合在一起时，前一电极部件的电极和后一电极部件的电极在该压力下在通孔内扩散。 前电极部件的扩散电极与导电膜的与前面布线电连接的部分接触，后电极部件的扩散电极与电连接到背面布线的导电膜的另一部分接触 。

公开(公告)号：US06326677B1

公开(公告)日：2001-12-04

申请号：US09146826

申请日：1998-09-04

Applicant: Terry R. Bloom ,  Stephen W. Burry ,  Lewis L. Seffernick ,  Robert M. VandenBoom ,  John Zdanys, Jr.

Inventor： Terry R. Bloom ,  Stephen W. Burry ,  Lewis L. Seffernick ,  Robert M. VandenBoom ,  John Zdanys, Jr.

IPC: H01L101

CPC classification number: H01C1/144 ,  H01C1/16 ,  H01L2924/15311 ,  H05K1/092 ,  H05K1/095 ,  H05K1/141 ,  H05K1/167 ,  H05K2201/10045 ,  H05K2201/10734 ,  H05K2203/041

Abstract: A ball grid array resistor network has a substrate that has top and bottom surfaces. Resistors are disposed on the top surface. Conductors are disposed on the top surface, and each conductor is electrically connected to an end of each resistor. Vias extend through the substrate and are electrically connected to the conductors. Solder spheres are disposed on the bottom surface, and are electrically connected to the vias. A cover coat is disposed over the conductors and resistors. In an alternative embodiment, the vias are eliminated and the resistor network is formed on the bottom surface of the substrate. The resistor network provides a high density of resistors per unit area.

Abstract translation: 球栅阵列电阻网络具有具有顶表面和底表面的基底。 电阻器设置在顶表面上。 导体设置在顶表面上，并且每个导体电连接到每个电阻器的一端。 通孔延伸穿过基板并与导体电连接。 焊球设置在底表面上，并且电连接到通孔。 导体和电阻器上设置覆盖层。 在替代实施例中，消除了通孔，并且电阻网络形成在衬底的底表面上。 电阻网络提供每单位面积的高密度电阻。

公开(公告)号：US06246312B1

公开(公告)日：2001-06-12

申请号：US09620396

申请日：2000-07-20

Applicant: David L. Poole ,  Robert L. Reinhard ,  Richard O. Cooper ,  Richard S. DeMars

Inventor： David L. Poole ,  Robert L. Reinhard ,  Richard O. Cooper ,  Richard S. DeMars

IPC: H01C1012

CPC classification number: H05K1/0246 ,  H01C13/02 ,  H05K2201/10022 ,  H05K2201/10045 ,  H05K2201/10734

Abstract: A resistor network for terminating active electronic circuits such as stub series terminated logic and emitter coupled logic circuits. The network has a substrate with top and bottom surfaces and a common via extending through the substrate. Several resistor pairs are located on the first surface surrounding the common via. Each resistor pair has first and second vias. Resistors are connected between the first and second vias. Several solder spheres are located on the bottom surface. Each of the solder spheres are electrically connected to one of the first, second or common vias.

Abstract translation: 用于端接有源电子电路的电阻网络，例如短截线端接逻辑和发射极耦合逻辑电路。 网络具有具有顶表面和底表面的基底以及延伸穿过基底的公共通孔。 几个电阻对位于围绕公共通孔的第一表面上。 每个电阻对具有第一和第二通孔。 电阻器连接在第一和第二通孔之间。 几个焊球位于底面。 每个焊球都电连接到第一，第二或共用通孔之一。