公开(公告)号：US08141241B2

公开(公告)日：2012-03-27

申请号：US12379684

申请日：2009-02-26

Applicant: Myung Sam Kang ,  Jeong Woo Park ,  Ok Tae Kim ,  Kil Yong Yun

Inventor： Myung Sam Kang ,  Jeong Woo Park ,  Ok Tae Kim ,  Kil Yong Yun

IPC: H01R9/00 ,  H01R43/16 ,  H01R43/00 ,  H05K3/00 ,  H05K3/02 ,  H05K3/10 ,  H05K1/11

CPC classification number: H05K1/111 ,  H05K1/09 ,  H05K1/115 ,  H05K3/205 ,  H05K3/28 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2203/0323 ,  H05K2203/0376 ,  Y02P70/611 ,  Y10T29/49124 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49204 ,  Y10T29/49222

Abstract: A method of manufacturing a printed circuit board having a metal bump, including: forming a recess for creation of the metal bump on a metal carrier; forming a barrier layer on the metal carrier including the recess; forming an upper circuit layer on the barrier layer, the upper circuit layer including the metal bump charged in the recess and a circuit pattern; preparing an insulating layer, and transferring the upper circuit layer to the insulating layer; and removing the metal carrier and the barrier layer.

Abstract translation: 一种制造具有金属凸块的印刷电路板的方法，包括：在金属载体上形成用于形成金属凸块的凹槽; 在包括所述凹部的所述金属载体上形成阻挡层; 在所述阻挡层上形成上层电路层，所述上层电路层包括填充在所述凹部中的所述金属凸块和电路图案; 制备绝缘层，并将上电路层转移到绝缘层; 并移除金属载体和阻挡层。

公开(公告)号：US08124880B2

公开(公告)日：2012-02-28

申请号：US11976207

申请日：2007-10-22

Applicant: Shuhichi Okabe ,  Myung-Sam Kang ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jeong-Woo Park ,  Ji-Eun Kim

Inventor： Shuhichi Okabe ,  Myung-Sam Kang ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jeong-Woo Park ,  Ji-Eun Kim

IPC: H05K1/03

CPC classification number: H05K1/0265 ,  H05K1/116 ,  H05K3/107 ,  H05K3/108 ,  H05K3/205 ,  H05K3/421 ,  H05K2201/0379 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09736 ,  H05K2203/0361

Abstract: A method of manufacturing a circuit board that includes: forming a conductive relievo pattern, including a first plating layer, a first metal layer, and a second plating layer stacked sequentially in correspondence with a first circuit pattern, on a seed layer stacked on a carrier; stacking and pressing together the carrier and an insulator, such that a surface of the carrier having the conductive relievo pattern faces the insulator; transcribing the conductive relievo pattern into the insulator by removing the carrier; forming a conduction pattern, including a third plating layer and a second metal layer stacked sequentially in correspondence with a second circuit pattern, on the surface of the insulator having the conductive relievo pattern transcribed; removing the first plating layer and seed layer; and removing the first and second metal layers, can provide a circuit board that has high-density circuit patterns without an increased amount of insulator.

Abstract translation: 一种电路板的制造方法，其特征在于，包括：在堆叠在载体上的种子层上，形成导电消除图案，所述导电解像图案包括依次与第一电路图案对应地层叠的第一镀层，第一金属层和第二镀层 ; 将载体和绝缘体堆叠并压在一起，使得具有导电缓冲图案的载体的表面面向绝缘体; 通过移除载体将导电释放图案转印到绝缘体中; 在具有转印的导电消除图案的绝缘体的表面上形成包括与第二电路图案顺序堆叠的第三镀层和第二金属层的导电图案; 去除第一镀层和籽晶层; 并且去除第一和第二金属层可以提供具有高密度电路图案而不增加绝缘体量的电路板。

公开(公告)号：US20120027336A1

公开(公告)日：2012-02-02

申请号：US12975161

申请日：2010-12-21

Applicant: Jeong Woo PARK ,  Gyungock Kim

Inventor： Jeong Woo PARK ,  Gyungock Kim

IPC: G02F1/035

CPC classification number: G02F1/025 ,  G02F1/2257 ,  G02F2001/212 ,  G02F2201/12 ,  G02F2202/105

Abstract: Provided is a Mach-Zehnder modulator. The Mach-Zehnder modulator comprises an input wave guide and an output wave guide arranged on a substrate, a first branch wave guide and a second branch wave guide connected in parallel between the input and output wave guides, and a connecting region configured to connect the first branch wave guide and the second branch wave guide. Each of the first and second branch wave guides comprises first doped regions doped with a first dopant and second doped regions doped with a second dopant having different conductivity from the first dopant, and the connecting region is doped with the first dopant and arranged between the first regions of the first and second branch wave guides.

Abstract translation: 提供了马赫 - 曾德尔调制器。 马赫 - 策德尔调制器包括布置在基板上的输入波导和输出波导，在输入和输出波导之间并联连接的第一分支波导和第二分支波导，以及连接区域， 第一分支波导和第二分支波导。 第一和第二分支波导中的每一个包括掺杂有第一掺杂物的第一掺杂区域和掺杂有与第一掺杂剂不同导电性的第二掺杂剂的第二掺杂区域，并且连接区域掺杂有第一掺杂剂并且布置在第一掺杂区域之间 第一和第二分支波导的区域。

公开(公告)号：US07960273B2

公开(公告)日：2011-06-14

申请号：US12292827

申请日：2008-11-26

Applicant: Kyu-Ha Lee ,  Cha-Je Jo ,  Jeong-Woo Park

Inventor： Kyu-Ha Lee ,  Cha-Je Jo ,  Jeong-Woo Park

IPC: H01L21/44 ,  H01L21/4763

CPC classification number: H01L23/53238 ,  H01L21/76843 ,  H01L21/76865 ,  H01L21/76873 ,  H01L21/76879 ,  H01L21/76885 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a metal interconnection of a semiconductor device includes forming a base layer with at least one groove, the at least one groove having an open upper portion, forming a first metal layer in the at least one groove, forming a seed metal layer on the first metal layer in the at least one groove, the seed metal layer being only on a bottom surface of the at least one groove, and forming a metal pattern grown from the seed metal layer to fill the at least one grove.

Abstract translation: 一种制造半导体器件的金属互连的方法包括：形成具有至少一个沟槽的基底层，所述至少一个沟槽具有开放的上部，在所述至少一个沟槽中形成第一金属层，形成种子金属层 在所述至少一个沟槽中的所述第一金属层上，所述籽晶金属层仅在所述至少一个沟槽的底表面上，并且形成从种子金属层生长以填充所述至少一个沟槽的金属图案。

公开(公告)号：US20110109955A1

公开(公告)日：2011-05-12

申请号：US12771939

申请日：2010-04-30

Applicant: Jeong Woo PARK ,  Jongbum You ,  Gyungock Kim

Inventor： Jeong Woo PARK ,  Jongbum You ,  Gyungock Kim

IPC: G02F1/015 ,  H01L33/00

CPC classification number: G02F1/025 ,  G02F1/2257 ,  G02F2001/212

Abstract: Provided is an electro-optic device. Sine the electro-optic device includes a plurality of first conductive type semiconductor layers and a plurality of depletion layers formed by a third semiconductor disposed between the plurality of first conductive type semiconductor layers, an electro-optic device optimized for a high speed and low power consumption can be provided.

Abstract translation: 提供了一种电光装置。 所述电光装置一般包括多个第一导电类型半导体层和由设置在多个第一导电类型半导体层之间的第三半导体层形成的多个耗尽层，为高速和低功率优化的电光装置 可以提供消费。

公开(公告)号：US20110051222A1

公开(公告)日：2011-03-03

申请号：US12652623

申请日：2010-01-05

Applicant: Jeong Woo Park ,  Jongbum You ,  Gyungock Kim

Inventor： Jeong Woo Park ,  Jongbum You ,  Gyungock Kim

IPC: G02F1/015 ,  H01L33/00

CPC classification number: G02F1/025 ,  G02F1/2257 ,  G02F2001/212

Abstract: An electro-optic device is provided. The electro-optic device includes a junction layer disposed between a first conductivity type semiconductor layer and a second conductivity type semiconductor layer to which a reverse vias voltage is applied. The first conductivity type semiconductor layer and the second conductivity type semiconductor layer have an about 2 to 4-time doping concentration difference therebetween, thus making it possible to provide the electro-optic device optimized for high speed, low power consumption and high integration.

Abstract translation: 提供了一种电光装置。 电光器件包括设置在第一导电类型半导体层和施加反向通孔电压的第二导电类型半导体层之间的结层。 第一导电型半导体层和第二导电类型半导体层之间具有约2至4倍的掺杂浓度差，因此可以提供优化用于高速度，低功耗和高集成度的电光装置。

公开(公告)号：US20100278477A1

公开(公告)日：2010-11-04

申请号：US12746167

申请日：2008-06-03

Applicant: Jeong-Woo Park ,  Gyung-Ock Kim ,  Mi-Ran Park ,  Jong-Bum You

Inventor： Jeong-Woo Park ,  Gyung-Ock Kim ,  Mi-Ran Park ,  Jong-Bum You

IPC: G02B6/12 ,  G02B6/34

CPC classification number: G02F1/218 ,  G02F2001/212 ,  G02F2201/302

Abstract: Provided is a semiconductor integrated circuit. The semiconductor integrated circuit includes a semiconductor pattern disposed on a substrate and including an optical waveguide part and a pair of recessed portions. The optical waveguide part has a thickness ranging from about 0.05 m to about 0.5 μm. The recessed portions are disposed on both sides of the optical waveguide part and have a thinner thickness than the optical waveguide part. A first doped region and a second doped region are disposed in the recessed portions, respectively. The first and second doped regions are doped with a first conductive type dopant and a second conductive type dopant, respectively. An intrinsic region is formed in at least the optical waveguide part to contact the first and second doped regions.

Abstract translation: 提供了一种半导体集成电路。 半导体集成电路包括设置在基板上并且包括光波导部分和一对凹部的半导体图案。 光波导部分的厚度范围为约0.05μm至约0.5μm。 凹部设置在光波导部分的两侧，并且具有比光波导部分更薄的厚度。 第一掺杂区域和第二掺杂区域分别设置在凹部中。 第一和第二掺杂区域分别掺杂有第一导电型掺杂剂和第二导电型掺杂剂。 在至少光波导部分中形成本征区域以接触第一和第二掺杂区域。

公开(公告)号：US20090207472A1

公开(公告)日：2009-08-20

申请号：US12374261

申请日：2007-04-24

Applicant: Hyun-Soo Kim ,  Jeong-Woo Park ,  Bongki Mheen ,  Young-Ahn Leem ,  Gyungock Kim

Inventor： Hyun-Soo Kim ,  Jeong-Woo Park ,  Bongki Mheen ,  Young-Ahn Leem ,  Gyungock Kim

IPC: G02F1/015 ,  H01L29/786

CPC classification number: G02F1/025 ,  G02F2203/50 ,  G11C13/04

Abstract: Provided is an optical device having an edge effect with improved phase shift and propagation loss of light without decreasing the dynamic characteristics of the optical device. The optical device includes a first semiconductor layer which is doped with a first type of conductive impurities, and has a recessed groove in an upper portion thereof; a gate insulating layer covering the groove and a portion of the first semiconductor layer; and a second semiconductor layer which covers an upper surface of the gate insulating layer and is doped with a second type of conductive impurities opposite to the first type of conductive impurities.

Abstract translation: 提供一种具有边缘效应的光学器件，具有改善的相移和光的传播损耗，而不会降低光学器件的动态特性。 光学器件包括掺杂有第一类导电杂质的第一半导体层，并且在其上部具有凹槽; 覆盖所述沟槽和所述第一半导体层的一部分的栅极绝缘层; 以及覆盖所述栅极绝缘层的上表面并且掺杂有与所述第一类型的导电杂质相反的第二类导电杂质的第二半导体层。

公开(公告)号：US20090154868A1

公开(公告)日：2009-06-18

申请号：US12117707

申请日：2008-05-08

Applicant: Mi-Ran PARK ,  O-Kyun Kwon ,  Jeong-Woo Park ,  Gyung-Ock Kim

Inventor： Mi-Ran PARK ,  O-Kyun Kwon ,  Jeong-Woo Park ,  Gyung-Ock Kim

IPC: G02F1/295

CPC classification number: G02F1/01708 ,  B82Y20/00 ,  G02F1/025 ,  G02F2001/0152 ,  G02F2201/302 ,  G02F2201/34 ,  G02F2203/02

Abstract: Provided are semiconductor opto-electronic integrated circuits and methods of forming the same. The semiconductor opto-electronic integrated circuit includes: an optical waveguide disposed on a substrate and including an input terminal and an output terminal; an optical grating formed on the optical waveguide; and an optical active device disposed on the optical grating and receiving an optical signal from the optical waveguide through the optical grating to modulate the optical signal.

Abstract translation: 提供半导体光电集成电路及其形成方法。 半导体光电集成电路包括：设置在基板上并包括输入端子和输出端子的光波导; 形成在光波导上的光栅; 以及设置在光栅上的光学有源器件，并通过光栅从光波导接收光信号，以调制光信号。

公开(公告)号：US20080222848A1

公开(公告)日：2008-09-18

申请号：US12066351

申请日：2006-09-07

Applicant: Jeong-Woo Park

Inventor： Jeong-Woo Park

IPC: B42D3/10

CPC classification number: B42D3/10 ,  B42D5/043 ,  B42P2241/12 ,  Y10T24/11

Abstract: A multipurpose supportable cover having improved portability and usability, the cover including a front cover 20, a filler page portion 30, and a rear cover 40 that are bound by a binder 10, wherein a first iron piece 21 is installed on a lower end of the front cover 20, the rear cover 40 includes a main rear cover 42, a first sub-rear cover 43, and a second sub-rear cover 44 that are partitioned by first and second folding lines 40a and 40b, and a magnet piece 41 to be attached to the first iron piece 21 is installed on a lower end of the second sub-rear cover 44.

Abstract translation: 具有改进的便携性和可用性的多用途可支撑盖，盖包括由粘合剂10结合的前盖20，填充页部分30和后盖40，其中第一铁件21安装在 前盖20，后盖40包括由第一和第二折叠线40,4a分隔的主后盖42，第一副后盖43和第二副后盖44以及磁铁 安装在第一铁片21上的片41安装在第二副后盖44的下端。