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公开(公告)号：US06995043B2
公开(公告)日：2006-02-07
申请号：US10299504
申请日：2002-11-18
CPC分类号： H05K1/141 , H01L23/5385 , H01L24/48 , H01L2224/05599 , H01L2224/45099 , H01L2224/48091 , H01L2224/4824 , H01L2224/85399 , H01L2924/00014 , H01L2924/09701 , H01L2924/12044 , H01L2924/19041 , H05K1/147 , H05K3/305 , H05K3/4084 , H05K2201/048 , H05K2203/049 , Y10T29/49124 , Y10T29/49126 , Y10T29/49204 , H01L2224/45015 , H01L2924/207
摘要： A routing element for use with a multichip module that includes a substrate that carries conductive traces that provide either additional electrical paths or shorter electrical paths than those provided by a multichip module substrate. The conductive traces may be carried upon a single surface of the routing element substrate, be carried internally by the routing element substrate, or include externally and internally carried portions. The routing element also includes a contact pad positioned at each end of each conductive trace thereof to facilitate electrical connection of each conductive trace to a corresponding terminal of the substrate or to a corresponding bond pad of a semiconductor device of the multichip module. Multichip modules are also disclosed, as are methods for designing the routing element and methods in which the routing element is used.
摘要翻译： 一种用于多芯片模块的布线元件，其包括承载提供比由多芯片模块基板提供的导电路径或更短电路径的导电迹线的基板。 导电迹线可以承载在路由元件衬底的单个表面上，由路由元件衬底在内部承载，或包括外部和内部承载的部分。 路由元件还包括位于其每个导电迹线的每一端处的接触焊盘，以便于将每个导电迹线电连接到衬底的对应端子或多芯片模块的半导体器件的对应接合焊盘。 还公开了多芯片模块，以及用于设计路由元件的方法和使用路由元件的方法。
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32.发明授权Bond pad rerouting element and stacked semiconductor device assemblies including the rerouting element 失效焊盘重路由元件和包括重新路由元件的堆叠半导体器件组件公开(公告)号：US06987325B2
公开(公告)日：2006-01-17
申请号：US10646966
申请日：2003-08-22
CPC分类号： H01L25/0657 , H01L24/73 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/73265 , H01L2224/92247 , H01L2225/0651 , H01L2225/06527 , H01L2225/06555 , H01L2225/06562 , H01L2225/06572 , H01L2225/06586 , H01L2924/01079 , H01L2924/09701 , H01L2924/15311 , H01L2924/3011 , H01L2924/30111 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A rerouting element for a semiconductor device that includes a dielectric film that carries conductive vias, conductive elements, and contact pads. The conductive vias are positioned at locations that correspond to the locations of bond pads of a semiconductor device with which the rerouting element is to be used. The conductive elements, which communicate with corresponding conductive vias, reroute the bond pad locations to corresponding contact pad locations adjacent to one peripheral edge or two adjacent peripheral edges of the rerouted semiconductor device. The rerouting element is particularly useful for rerouting centrally located bond pads of a semiconductor device, as well as for rerouting the peripheral locations of bond pads of a semiconductor device to one or two adjacent peripheral edges thereof. Methods for designing and using the rerouting element are also disclosed, as are semiconductor device assemblies including one or more rerouting elements.
摘要翻译： 一种用于半导体器件的重新路由元件，其包括承载导电通孔，导电元件和接触焊盘的电介质膜。 导电通孔位于对应于要使用重新路由元件的半导体器件的接合焊盘的位置的位置处。 与相应的导电通孔连通的导电元件将接合焊盘位置重新路由到与被重新路由的半导体器件的一个外围边缘或两个相邻外围边缘相邻的相应接触焊盘位置。 重新路由元件对于重新布置半导体器件的中心位置的接合焊盘以及将半导体器件的接合焊盘的外围位置重新路由到其一个或两个相邻的外围边缘是特别有用的。 还公开了用于设计和使用重新路由元件的方法，半导体器件组件包括一个或多个重新布线元件。
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公开(公告)号：US06577018B1
公开(公告)日：2003-06-10
申请号：US09648316
申请日：2000-08-25
IPC分类号： H01L2328
CPC分类号： H01L23/495 , H01L23/3107 , H01L23/49805 , H01L23/562 , H01L2924/0002 , H01L2924/19041 , H01L2924/00
摘要： An integrated circuit device includes a semiconductor component coupled with a lead frame, and an integrated circuit package encompassing at least a portion of the semiconductor component. The package has a first surface and a second surface, and side surfaces, where the first surface is opposite the second surface. A parting line of the integrated circuit package is offset toward the second surface of the package, where the first surface optionally comprises the bottom surface of the package. The first surface of the package has one or more recessed areas.
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34.发明授权Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices 有权用于制造封装的微电子器件的封装的微电子器件和方法公开(公告)号：US08866272B2
公开(公告)日：2014-10-21
申请号：US13155203
申请日：2011-06-07
IPC分类号： H01L21/44 , H01L21/56 , H01L23/00 , H01L23/498 , H01L23/31
CPC分类号： H01L24/03 , H01L21/56 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L24/06 , H01L24/09 , H01L24/17 , H01L24/28 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L2224/0401 , H01L2224/11011 , H01L2224/13111 , H01L2224/1405 , H01L2224/16225 , H01L2224/29111 , H01L2224/2919 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48235 , H01L2224/73204 , H01L2224/73257 , H01L2224/73265 , H01L2224/81192 , H01L2224/81801 , H01L2224/81815 , H01L2224/83102 , H01L2224/83192 , H01L2224/83801 , H01L2224/85 , H01L2224/92125 , H01L2224/92247 , H01L2924/00014 , H01L2924/01005 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/10158 , H01L2924/10253 , H01L2924/14 , H01L2924/15174 , H01L2924/15184 , H01L2924/15311 , H01L2924/1579 , H01L2924/181 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed. In one embodiment, a method for forming a microelectronic device includes attaching a microelectronic die to a support member by forming an attachment feature on at least one of a back side of the microelectronic die and the support member. The attachment feature includes a volume of solder material. The method also includes contacting the attachment feature with the other of the microelectronic die and the support member, and reflowing the solder material to join the back side of the die and the support member via the attachment feature. In several embodiments, the attachment feature is not electrically connected to internal active structures of the die.
摘要翻译： 公开了用于制造封装的微电子器件的封装的微电子器件和方法。 在一个实施例中，用于形成微电子器件的方法包括通过在微电子管芯的背面和支撑构件的至少一个上形成附着特征来将微电子管芯附接到支撑构件。 附件特征包括一定量的焊料。 该方法还包括使附接特征与另一个微电子管芯和支撑构件接触，以及回流焊料材料以经由附接特征连接到管芯的背面和支撑构件。 在几个实施例中，附接特征不与管芯的内部有源结构电连接。
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公开(公告)号：US08048715B2
公开(公告)日：2011-11-01
申请号：US12616526
申请日：2009-11-11
CPC分类号： H01L23/3128 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L2224/05599 , H01L2224/32145 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06517 , H01L2225/06555 , H01L2225/06575 , H01L2225/06586 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A substrate includes first and second regions over which first and second semiconductor devices are to be respectively positioned. The first region is located at least partially within the second region. Contact areas are located external to the first region but within the second region. In one embodiment, in which semiconductor devices are to be stacked over and secured to the substrate in a flip-chip type arrangement, the contact areas correspond to bond pads of an upper, second semiconductor device, while other contact areas located within the first region correspond to bond pads of a lower, first semiconductor device. In another embodiment, the contact areas correspond to bond pads of the first semiconductor device, which are electrically connected thereto by way of laterally extending discrete conductive elements, while other contact areas that are located external to the second region correspond to bond pads of the upper, second semiconductor device.
摘要翻译： 衬底包括第一和第二区域，第一和第二半导体器件将分别定位在第一和第二区域上。 第一区域至少部分地位于第二区域内。 接触区域位于第一区域外部但位于第二区域内。 在一个实施例中，其中半导体器件将以倒装芯片类型布置堆叠并固定到衬底，接触区域对应于上部，第二半导体器件的接合焊盘，而位于第一区域内的其它接触区域 对应于下部第一半导体器件的接合焊盘。 在另一个实施例中，接触区域对应于第一半导体器件的接合焊盘，其通过横向延伸的分立导电元件与其电连接，而位于第二区域外部的其它接触区域对应于上部的接合焊盘 ，第二半导体器件。
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36.发明授权公开(公告)号：US07868440B2
公开(公告)日：2011-01-11
申请号：US11509990
申请日：2006-08-25
CPC分类号： H01L23/538 , H01L21/50 , H01L23/3121 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/81 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/1134 , H01L2224/1308 , H01L2224/13082 , H01L2224/13144 , H01L2224/16 , H01L2224/81203 , H01L2224/81205 , H01L2224/81801 , H01L2224/8183 , H01L2224/8383 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2224/13099 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： Microdevices and methods for packaging microdevices. One embodiment of a packaged microdevice includes a substrate having a mounting area, contacts in the mounting area, and external connectors electrically coupled to corresponding contacts. The microdevice also includes a die located across from the mounting area and spaced apart from the substrate by a gap. The die has an integrated circuit and pads electrically coupled to the integrated circuit. The microdevice further includes first and second conductive elements in the gap that form interconnects between the contacts of the substrate and corresponding pads of the die. The first conductive elements are electrically connected to contacts on the substrate, and the second conductive elements are electrically coupled to corresponding pads of the die. The first conductive elements are attached to the second conductive elements at corresponding interfaces such that the interconnects connect the contacts of the substrate directly to corresponding pads on the die within the gap.
摘要翻译： 微型设备的微型设备和方法。 封装的微型器件的一个实施例包括具有安装区域的基板，安装区域中的触点和电耦合到相应触点的外部连接器。 微型装置还包括位于安装区域两侧的模具，并与基板间隔开间隙。 芯片具有集成电路和电耦合到集成电路的焊盘。 微型器件还包括在间隙中的第一和第二导电元件，其形成衬底的触点和芯片的相应焊盘之间的互连。 第一导电元件电连接到衬底上的触点，并且第二导电元件电耦合到管芯的相应焊盘。 第一导电元件在对应的接口处附接到第二导电元件，使得互连将衬底的触点直接连接到间隙内的芯片上的相应焊盘。
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公开(公告)号：US07372131B2
公开(公告)日：2008-05-13
申请号：US11076740
申请日：2005-03-10
IPC分类号： H01L23/53
CPC分类号： H05K1/141 , H01L23/5385 , H01L24/48 , H01L2224/05599 , H01L2224/45099 , H01L2224/48091 , H01L2224/4824 , H01L2224/85399 , H01L2924/00014 , H01L2924/09701 , H01L2924/12044 , H01L2924/19041 , H05K1/147 , H05K3/305 , H05K3/4084 , H05K2201/048 , H05K2203/049 , Y10T29/49124 , Y10T29/49126 , Y10T29/49204 , H01L2224/45015 , H01L2924/207
摘要： A routing element for use in a semiconductor device assembly includes a substrate that carries conductive traces that provide either additional electrical paths or shorter electrical paths than those provided by a carrier substrate of the semiconductor device assembly. The conductive traces may be carried upon a single surface of the routing element substrate, be carried internally by the routing element substrate, or include externally and internally carried portions. The routing element may also include a contact pad positioned at each end of each conductive trace thereof to facilitate electrical connection of each conductive trace to a corresponding terminal of the substrate or to a corresponding bond pad of a semiconductor device of the multichip module. Multichip modules are also disclosed, as are methods for designing the routing element and methods in which the routing element is used.
摘要翻译： 用于半导体器件组件的布线元件包括承载导电迹线的衬底，该衬底提供比由半导体器件组件的载体衬底提供的电路更短的电路径或更短的电路径。 导电迹线可以承载在路由元件衬底的单个表面上，由路由元件衬底在内部承载，或包括外部和内部承载的部分。 布线元件还可以包括位于其每个导电迹线的每一端处的接触垫，以便于将每个导电迹线电连接到衬底的对应端子或多芯片模块的半导体器件的相应接合焊盘。 还公开了多芯片模块，以及用于设计路由元件的方法和使用路由元件的方法。
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38.发明授权公开(公告)号：US07344921B2
公开(公告)日：2008-03-18
申请号：US11358268
申请日：2006-02-21
CPC分类号： H01L23/495 , H01L23/3107 , H01L23/49805 , H01L23/562 , H01L2924/0002 , H01L2924/19041 , H01L2924/00
摘要： An integrated circuit device includes a semiconductor component coupled with a lead frame, and an integrated circuit package encompassing at least a portion of the semiconductor component. The package has a first surface and a second surface, and side surfaces, where the first surface is opposite the second surface. A parting line of the integrated circuit package is offset toward the second surface of the package, where the first surface optionally comprises the bottom surface of the package. The first surface of the package has one or more recessed areas.
摘要翻译： 集成电路器件包括与引线框架耦合的半导体部件和包含半导体部件的至少一部分的集成电路封装。 包装具有第一表面和第二表面以及侧表面，其中第一表面与第二表面相对。 集成电路封装的分型线朝向封装的第二表面偏移，其中第一表面任选地包括封装的底表面。 包装的第一表面具有一个或多个凹陷区域。
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39.发明授权公开(公告)号：US07263768B2
公开(公告)日：2007-09-04
申请号：US10927253
申请日：2004-08-25
申请人： Brad D. Rumsey , Matt E. Schwab
发明人： Brad D. Rumsey , Matt E. Schwab
CPC分类号： H01L24/49 , B33Y10/00 , B33Y80/00 , H01L23/544 , H01L24/45 , H01L24/48 , H01L2223/5442 , H01L2223/54473 , H01L2224/05553 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48463 , H01L2224/4847 , H01L2224/4911 , H01L2224/49175 , H01L2224/49433 , H01L2224/73215 , H01L2224/85207 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19107 , H01L2924/3025 , H05K1/0266 , H05K3/0008 , H05K3/0052 , H05K3/3452 , H05K2201/0989 , H05K2201/09918 , Y10T29/49121 , Y10T29/4913 , Y10T29/49133 , Y10T29/49144 , Y10T29/49146 , Y10T29/49147 , Y10T29/49149 , Y10T29/49155 , Y10T29/49156 , Y10T29/49169 , Y10T29/49171 , Y10T29/49172 , Y10T29/49222 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： The present invention features a novel design for a fiducial and pin one indicator that utilizes a single solder resist opening in a die mounting substrate to perform the combined functions of prior art fiducials and pin one indicators. Methods of fabricating a carrier substrate and fabricating a semiconductor device package using the combination pin one indicator and alignment fiducial of the present invention are also provided.
摘要翻译： 本发明的特征在于用于基准和引脚一指示器的新颖设计，其利用管芯安装衬底中的单个阻焊剂开口来执行现有技术基准和引脚一指示器的组合功能。 还提供了使用组合销一个指示器和本发明的对准基准来制造载体基板并制造半导体器件封装的方法。
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