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    Glass wafer assembly
    35.
    发明授权
    Glass wafer assembly 有权

    公开(公告)号：US09688529B2

    公开(公告)日：2017-06-27

    申请号：US14718408

    申请日：2015-05-21

    Applicant: RF Micro Devices, Inc.

    Inventor： Jan Edward Vandemeer ,  Jonathan Hale Hammond

    IPC: B81B3/00 ,  B81B7/00 ,  B81C1/00

    CPC classification number: B81B7/0006 ,  B81B2201/014 ,  B81B2207/092 ,  B81B2207/095 ,  B81B2207/096 ,  B81C1/00269 ,  B81C1/00301 ,  B81C2203/0109 ,  B81C2203/035 ,  H01L2224/48137

    Abstract: A glass wafer assembly is disclosed. In one aspect, the glass wafer assembly comprises a first glass wafer and a second glass wafer that are bonded by a conductive sealing ring. The conductive sealing ring defines a substantially hermetically sealed cavity between the first glass wafer and the second glass wafer. In another aspect, the first glass wafer and the second glass wafer each comprise a plurality of conductive through glass vias (TGVs). At least one active device is disposed in the substantially hermetically sealed cavity and can be electrically coupled to a conductive TGV in the first glass wafer and a conductive TGV in the second glass wafer to enable flexible electrical routing through the glass wafer assembly without wire bonding and over molding. As a result, it is possible to reduce footprint and height while improving radio frequency (RF) performance of the glass wafer assembly.

    Envelope tracking with reduced circuit area and power consumption
    36.
    发明授权
    Envelope tracking with reduced circuit area and power consumption 有权

    公开(公告)号：US09634620B2

    公开(公告)日：2017-04-25

    申请号：US14959954

    申请日：2015-12-04

    Applicant: RF Micro Devices, Inc.

    Inventor： Nadim Khlat ,  Michael R. Kay

    IPC: H04B1/04 ,  H03F1/02 ,  H03F3/19 ,  H03F3/24

    CPC classification number: H03F3/19 ,  H03F1/0227 ,  H03F3/245 ,  H03F2200/102 ,  H03F2200/451

    Abstract: The present disclosure relates to envelope tracking with reduced circuit area and power consumption. In one embodiment, an envelope power converter includes a switching power converter configured to receive a supply voltage and provide an output based on a switching control signal. A holding inductor is coupled between the switching power converter and envelope power supply output node. An offset capacitor is coupled between the envelope power supply output node and control node. In response to a target envelope power supply output voltage, a control circuit is configured to generate the switching control signal and a control voltage to maintain envelope power supply signal at target voltage level. The control circuit is configured to generate switching control signal and control voltage such that supply voltage is provided by switching power converter to holding inductor and offset capacitor is charged to target level without changing voltage of envelope power supply signal.

    TCSAW WITH IMPROVED RELIABILITY
    38.
    发明申请
    TCSAW WITH IMPROVED RELIABILITY 有权

    公开(公告)号：US20170099042A1

    公开(公告)日：2017-04-06

    申请号：US14954224

    申请日：2015-11-30

    Applicant: RF Micro Devices, Inc.

    Inventor： Kurt G. Steiner ,  Curtiss Hella ,  Benjamin P. Abbott ,  Daniel Chesire ,  Chad Thompson ,  Alan S. Chen

    IPC: H03H9/64

    CPC classification number: H03H9/6489 ,  H03H3/04 ,  H03H3/10 ,  H03H9/02622 ,  H03H9/02834 ,  H03H9/02921 ,  H03H9/02929 ,  H03H9/02937 ,  H03H9/131 ,  H03H9/14541

    Abstract: Embodiments of a Surface Acoustic Wave (SAW) device, or filter, and methods of fabrication thereof are disclosed. In some embodiments, the SAW filter comprises a piezoelectric substrate and an Interdigitated Transducer (IDT) on a surface of the piezoelectric substrate. The IDT includes multiple fingers, each comprising a metal stack. The SAW filter further includes a cap layer on a surface of the IDT opposite the piezoelectric substrate and on areas of the surface of the piezoelectric substrate exposed by the IDT. The cap layer has a thickness in a range of and including 10 to 500 Angstroms and a high electrical resistivity (and thus a low electrical conductivity). For instance, in some embodiments, the electrical resistivity of the cap layer is greater than 10 kilo-ohm meters (KΩ·m). The SAW filter further includes an oxide overcoat layer on a surface of the cap layer opposite the IDT and the piezoelectric substrate.

    RF front end architecture
    39.
    发明授权
    RF front end architecture 有权

    公开(公告)号：US09602146B2

    公开(公告)日：2017-03-21

    申请号：US14611850

    申请日：2015-02-02

    Applicant: RF Micro Devices, Inc.

    Inventor： Marcus Granger-Jones ,  Nadim Khlat

    IPC: H04B1/00 ,  H04L5/14 ,  H04L5/00

    CPC classification number: H04B1/0057 ,  H04B1/006 ,  H04L5/001 ,  H04L5/0023 ,  H04L5/14

    Abstract: RF front end circuitry includes mid/high-band switching circuitry and a carrier-aggregation diplexer. The mid/high-band switching circuitry is configured to receive and selectively route mid-band and high-band signals between a mid/high-band output port and a number of mid/high-band transceiver ports. The carrier-aggregation diplexer is coupled to a first one of the mid/high-band transceiver ports. Further, the carrier-aggregation diplexer is configured to pass mid-band signals between a mid-band diplexer port and the first one of the mid/high-band transceiver ports while attenuating other signals, and pass high-band signals between a high-band diplexer port and the first one of the mid/high-band transceiver ports while attenuating other signals.

    Substrate with embedded sintered heat spreader and process for making the same
    40.
    发明授权
    Substrate with embedded sintered heat spreader and process for making the same 有权
    带嵌入式烧结散热器的基板及其制造方法

    公开(公告)号：US09589864B2

    公开(公告)日：2017-03-07

    申请号：US14937550

    申请日：2015-11-10

    Applicant: RF Micro Devices, Inc.

    Inventor： Tarak A. Railkar

    IPC: H01L23/373 ,  H01L23/00 ,  H01L21/48

    CPC classification number: H01L23/3736 ,  H01L21/4871 ,  H01L21/4882 ,  H01L23/3677 ,  H01L24/83 ,  H01L2224/8385

    Abstract: The present disclosure relates to a substrate with an embedded sintered heat spreader and a process for making the same. According to an exemplary process, at least one cavity is created through the substrate. Sinterable paste including metal particulates and binder material is then dispensed into the at least one cavity. Next, the sinterable paste is sintered to create a sintered heat spreader, which is characterized by high thermal conductivity. The sintered heat spreader adheres to the inside walls of the at least one cavity, enhancing the overall thermal conductivity of the substrate.

    Abstract translation: 本发明涉及具有嵌入式烧结散热器的基板及其制造方法。 根据示例性工艺，通过衬底产生至少一个空腔。 然后将包括金属微粒和粘合剂材料的可烧结糊剂分配到至少一个空腔中。 接下来，将可烧结糊料烧结以产生热导率高的烧结散热器。 烧结散热器附着在至少一个空腔的内壁上，增强了基板的整体导热性。

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