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公开(公告)号:US20240274437A1
公开(公告)日:2024-08-15
申请号:US18644475
申请日:2024-04-24
Applicant: ASM IP Holding B.V.
Inventor: Amir Kajbafvala , Joe Margetis , Xin Sun , David Kohen , Dieter Pierreux
IPC: H01L21/02 , C23C16/08 , C23C16/24 , C23C16/42 , C23C16/455 , C23C16/52 , C30B25/16 , C30B25/18 , C30B29/06 , C30B29/52 , H01L29/06 , H01L29/423 , H01L29/786
CPC classification number: H01L21/0262 , C23C16/08 , C23C16/24 , C23C16/42 , C23C16/45523 , C23C16/52 , C30B25/165 , C30B25/18 , C30B29/06 , C30B29/52 , H01L21/02507 , H01L21/02532 , H01L21/02576 , H01L21/02579 , H01L21/02603 , H01L29/0673 , H01L29/42392 , H01L29/78696
Abstract: Methods and systems for forming structures including one or more layers comprising silicon germanium and one or more layers comprising silicon are disclosed. Exemplary methods can include using a surfactant, using particular precursors, and/or using a transition step to improve an interface between adjacent layers comprising silicon germanium and comprising silicon.
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公开(公告)号:US20240175137A1
公开(公告)日:2024-05-30
申请号:US18517837
申请日:2023-11-22
Applicant: ASM IP Holding B.V.
Inventor: Dieter Pierreux , Jan Deckers , Theodorus G.M. Oosterlaken
IPC: C23C16/52 , C23C16/08 , C23C16/448 , C23C16/455
CPC classification number: C23C16/52 , C23C16/08 , C23C16/448 , C23C16/45561
Abstract: A vapor phase precursor delivery system for delivering a vapor phase precursor for depositing a layer in a vapor phase deposition apparatus is disclosed. The vapor phase precursor delivery system having: a plurality of vessels constructed and arranged to store and vaporize the same precursor; and a gas inlet and a gas outlet operably connected with one or more of the plurality of vessels. A vapor phase deposition apparatus, such as for example a vertical furnace may have such a vapor phase precursor delivery system for depositing a layer on a substrate.
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公开(公告)号:US11990333B2
公开(公告)日:2024-05-21
申请号:US18208398
申请日:2023-06-12
Applicant: ASM IP Holding B.V.
Inventor: Viljami Pore , Werner Knaepen , Bert Jongbloed , Dieter Pierreux , Gido van Der Star , Toshiya Suzuki
IPC: H01L21/02 , C23C16/04 , C23C16/455 , C23C16/50 , H01L21/762
CPC classification number: H01L21/0228 , C23C16/045 , C23C16/45525 , C23C16/45527 , C23C16/45536 , C23C16/50 , H01L21/02164 , H01L21/0217 , H01L21/02178 , H01L21/02211 , H01L21/02219 , H01L21/02274 , H01L21/76224
Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.
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34.
公开(公告)号:US11887857B2
公开(公告)日:2024-01-30
申请号:US17235990
申请日:2021-04-21
Applicant: ASM IP Holding B.V.
Inventor: Dieter Pierreux , Bert Jongbloed , Qi Xie , Giuseppe Alessio Verni
IPC: H01L21/285 , C23C16/455 , C23C16/52 , H01L21/02 , C23C16/34 , H01L21/3205 , H10B43/35 , H01L23/535 , H01L29/786 , H01L49/02 , H01L29/06 , H01L29/423 , H01L29/49 , H01L29/775 , H10B41/27 , H10B43/27
CPC classification number: H01L21/28568 , C23C16/34 , C23C16/45544 , C23C16/52 , H01L21/02697 , H01L21/28556 , H01L21/32051 , H10B43/35 , H01L23/535 , H01L28/60 , H01L29/0673 , H01L29/42392 , H01L29/4908 , H01L29/775 , H01L29/78696 , H10B41/27 , H10B43/27
Abstract: Disclosed are methods and systems for depositing layers comprising vanadium, nitrogen, and element selected from the list consisting of molybdenum, tantalum, niobium, aluminum, and silicon. The layers are deposited onto a surface of a substrate. The deposition process may be a cyclical deposition process. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors.
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35.
公开(公告)号:US11851755B2
公开(公告)日:2023-12-26
申请号:US16952363
申请日:2020-11-19
Applicant: ASM IP Holding B.V.
Inventor: Jan Willem Maes , Werner Knaepen , Krzysztof Kamil Kachel , David Kurt de Roest , Bert Jongbloed , Dieter Pierreux
IPC: C23C16/04 , C23C16/455 , C23C16/44 , H01L21/033 , C23C16/448 , C23C16/26 , C23C16/52 , C23C16/56
CPC classification number: C23C16/45523 , C23C16/04 , C23C16/042 , C23C16/045 , C23C16/26 , C23C16/448 , C23C16/4412 , C23C16/4485 , C23C16/45527 , C23C16/52 , C23C16/56 , H01L21/0332 , H01L21/0337
Abstract: A sequential infiltration synthesis apparatus comprising:
a reaction chamber constructed and arranged to hold at least a first substrate;
a precursor distribution and removal system to provide to and remove from the reaction chamber a vaporized first or second precursor; and,
a sequence controller operably connected to the precursor distribution and removal system and comprising a memory provided with a program to execute infiltration of an infiltrateable material provided on the substrate when run on the sequence controller by:
activating the precursor distribution and removal system to provide and maintain the first precursor for a first period T1 in the reaction chamber;
activating the precursor distribution and removal system to remove a portion of the first precursor from the reaction chamber for a second period T2; and,
activating the precursor distribution and removal system to provide and maintain the second precursor for a third period T3 in the reaction chamber. The program in the memory is programmed with the first period T1 longer than the second period T2.-
公开(公告)号:US20230335397A1
公开(公告)日:2023-10-19
申请号:US18208398
申请日:2023-06-12
Applicant: ASM IP Holding B.V.
Inventor: Viljami Pore , Werner Knaepen , Bert Jongbloed , Dieter Pierreux , Gido van Der Star , Toshiya Suzuki
IPC: H01L21/02 , C23C16/04 , C23C16/455 , C23C16/50 , H01L21/762
CPC classification number: H01L21/0228 , C23C16/045 , C23C16/45527 , C23C16/45536 , H01L21/02164 , H01L21/0217 , H01L21/02178 , H01L21/02211 , H01L21/02219 , C23C16/45525 , C23C16/50 , H01L21/02274 , H01L21/76224
Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.
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公开(公告)号:US20230220588A1
公开(公告)日:2023-07-13
申请号:US18153254
申请日:2023-01-11
Applicant: ASM IP Holding B.V.
Inventor: Steven Van Aerde , Wilco Verweij , Dieter Pierreux , Kelly Houben , Bert Jongbloed , Peter Westrom
CPC classification number: C30B29/68 , H01L21/67742 , H01L21/02532 , H01L21/0245 , H01L21/02507 , H01L21/0262 , C30B25/165 , C30B29/06 , C30B29/52 , H01L21/02381 , H01L21/02433
Abstract: A method of forming an epitaxial stack on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing a semiconductor processing apparatus. This semiconductor processing apparatus comprises a process chamber and a carousel for stationing a wafer boat before or after processing in the process chamber. The method further comprises loading the wafer boat into the process chamber, the wafer boat comprising the plurality of substrates. The method further comprises processing the plurality of substrates in the process chamber, thereby forming, on the plurality of substrates, the epitaxial stack. This epitaxial stack has a pre-determined thickness. The processing comprises unloading the wafer boat, one or more times, from the process chamber to the carousel until the epitaxial stack reaches the pre-determined thickness.
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公开(公告)号:US11088002B2
公开(公告)日:2021-08-10
申请号:US15940759
申请日:2018-03-29
Applicant: ASM IP Holding B.V.
Inventor: Dieter Pierreux , Werner Knaepen , Bert Jongbloed , Cornelis Thaddeus Herbschleb , Hessel Sprey
IPC: H01L21/673 , H01L21/306 , H01L21/67 , C23C16/48 , H01L21/02
Abstract: The invention relates to a substrate rack and a substrate processing system for processing substrates in a reaction chamber. The substrate rack may be used for introducing a plurality of substrates in the reaction chamber. The substrate rack may have a plurality of spaced apart substrate holding provisions configured to hold the substrates in a spaced apart relationship. The rack may have an illumination system to irradiate radiation with a range from 100 to 500 nanometers onto a top surface of the substrates.
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39.
公开(公告)号:US11056353B2
公开(公告)日:2021-07-06
申请号:US15994236
申请日:2018-05-31
Applicant: ASM IP Holding B.V.
Inventor: Dieter Pierreux , Werner Knaepen , Bert Jongbloed
IPC: H01L21/3213 , C23F1/16 , H01L21/306 , H01L21/02 , H01L21/311 , H01L21/308
Abstract: The disclosure relates generally to the field of processing substrates, for example comprising materials such as quartz, glass or silicon. The disclosure more particular relates to providing wet etch protection layers comprising boron and carbon and etching the substrate in a hydrogen fluoride aqueous solution. One or more of the boron and carbon containing films can have a thickness of at least 5, preferably 10 and, more preferably 30 nm. The method comprises wet etching the substrate in a hydrofluoric acid solution with a hydrogen fluoride concentration of at least 10 wt. % for at least 5 minutes.
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公开(公告)号:US20190295837A1
公开(公告)日:2019-09-26
申请号:US16317774
申请日:2017-07-14
Applicant: ASM IP Holding B.V.
Inventor: Viljami Pore , Werner Knaepen , Bert Jongbloed , Dieter Pierreux , Gido Van Der Star , Toshiya Suzuki
IPC: H01L21/02 , C23C16/455 , C23C16/04 , H01L21/762 , C23C16/50
Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.
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